KR900017300A - Device operation protection circuit - Google Patents

Device operation protection circuit Download PDF

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Publication number
KR900017300A
KR900017300A KR1019890004542A KR890004542A KR900017300A KR 900017300 A KR900017300 A KR 900017300A KR 1019890004542 A KR1019890004542 A KR 1019890004542A KR 890004542 A KR890004542 A KR 890004542A KR 900017300 A KR900017300 A KR 900017300A
Authority
KR
South Korea
Prior art keywords
voltage
drain
protection circuit
device operation
gate
Prior art date
Application number
KR1019890004542A
Other languages
Korean (ko)
Inventor
김은수
최종완
이희
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019890004542A priority Critical patent/KR900017300A/en
Publication of KR900017300A publication Critical patent/KR900017300A/en

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Abstract

내용 없음No content

Description

디바이스 동작 보호회로Device operation protection circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명 디바이스 동작 보호 회로도.2 is a device operation protection circuit diagram of the present invention.

Claims (1)

게이트가 콘트롤 신호 입력단자(A)(B)에 각각 접속됨과 아울러 소오스가 서로 접속된 P채널 트랜지스터(T1)(T2)의 드레인이 각각 다른 전압원(V1)(V2)에 접속된 구동회로(1)에 있어서, P채널 트랜지스터(T2)의 드레인이 외부 입력단자에서 오는 전압원(V1)의 전압(V′1)을 드레인 전압으로 하는 P채널 트랜지스터(T3)(T4)로된 인버터(Inv1)의 게이트에 접속되고, 그 인버터(Inv1)의 출력전압을 게이트 입력 전압으로 함과 아울러 전압원(V1)의 전압(V′1)을 드레인 전압으로 하는 트랜스미션 게이트(T5)의 나머지 한쪽단자를 트랜지스터(T1)의 드레인에 접속하여 구성됨을 특징으로하는 디바이스 동작 보호회로.The gates are connected to the control signal input terminals (A) and (B), respectively, and the drains of the P-channel transistors T 1 and T 2 connected to the sources are connected to different voltage sources V 1 and V 2 . in the drive circuit (1), P-channel transistor to the drain of P-channel transistor (T 2) to a voltage (V '1) of the voltage source (V 1) which comes from the external input terminal to the drain voltage (T 3) (T 4 ) is connected to the gate of the inverter (I nv1) in, that also the output voltage of the inverter (I nv1) as a gate input voltage, as well as a voltage source (the transmission gate to a voltage (V '1) of the V 1) as the drain voltage And the other terminal of (T 5 ) is connected to the drain of transistor (T 1 ). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890004542A 1989-04-06 1989-04-06 Device operation protection circuit KR900017300A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890004542A KR900017300A (en) 1989-04-06 1989-04-06 Device operation protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890004542A KR900017300A (en) 1989-04-06 1989-04-06 Device operation protection circuit

Publications (1)

Publication Number Publication Date
KR900017300A true KR900017300A (en) 1990-11-16

Family

ID=67776866

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890004542A KR900017300A (en) 1989-04-06 1989-04-06 Device operation protection circuit

Country Status (1)

Country Link
KR (1) KR900017300A (en)

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A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application