KR900005619A - Manufacturing method of high performance bipolar transistor - Google Patents

Manufacturing method of high performance bipolar transistor

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Publication number
KR900005619A
KR900005619A KR1019880012329A KR880012329A KR900005619A KR 900005619 A KR900005619 A KR 900005619A KR 1019880012329 A KR1019880012329 A KR 1019880012329A KR 880012329 A KR880012329 A KR 880012329A KR 900005619 A KR900005619 A KR 900005619A
Authority
KR
South Korea
Prior art keywords
region
oxide film
nitride film
manufacturing
bipolar transistor
Prior art date
Application number
KR1019880012329A
Other languages
Korean (ko)
Other versions
KR910005404B1 (en
Inventor
고장만
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019880012329A priority Critical patent/KR910005404B1/en
Publication of KR900005619A publication Critical patent/KR900005619A/en
Application granted granted Critical
Publication of KR910005404B1 publication Critical patent/KR910005404B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Abstract

내용 없음No content

Description

고성능 바이폴라 트랜지스터의 제조방법Manufacturing method of high performance bipolar transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도의 (A)-(E)도는 본 발명의 바이폴라 트랜지스터의 제조방법을 설명하기 위한 각 공정별 수직구조도.(A)-(E) of FIG. 2 is a vertical structure diagram for each process for demonstrating the manufacturing method of the bipolar transistor of this invention.

Claims (2)

바이폴라 트랜지스터의 제조방법에 있어서, 에미터영역을 한정하는 질화막 (2)에서의 인디킷을 이용하여 인트린식 베이스영역(4)과 엑스트린식 베이스영역(5)을 연결시켜주는 링크영역(6)을 자기정함방식으로 형성하는 것을 특징으로 하는 고성능 바이폴라 트랜지스터의 제조방법.In the method of manufacturing a bipolar transistor, a link region (6) connecting an intrinsic base region (4) and an extrinsic base region (5) using an indikit in a nitride film (2) defining an emitter region A method of manufacturing a high performance bipolar transistor, characterized in that to form a self-determination method. 제1항에 있어서, 액티브영역에 1차 산화막(1)을 형성하고 그 위에 질화막(2)과 산화막(3)의 적층구조로 에미터영역을 차폐한다음 액스트린식 베이스영역용 이온을 주입하는 공정과, 상기 산화막(3)을 마스크로하여 질화막(2)ㅇ-ㅔ 인디컷을 형성화는 공정과, 상기 산화막(3)을 제거하고 링크영역(6)용 이온을 주입하는 공정과, 상기 질화막(2)을 마스크로 필드산화하는 공정과, 상기 질화막(2)과 패도산화막(1)을 제거하고 폴리실리콘(7) 데포지션-이온주입-내화성금속(8) 데포지션을 차례로 실행하는 공정과, 통상의 금속배선 형성공정과로 되는 것을 특징으로 하는 고성능 바이폴라 트랜지스터의 제조방법.The method of claim 1, wherein the primary oxide film (1) is formed in the active region, and the emitter region is shielded by a stacked structure of the nitride film (2) and the oxide film (3) thereon, and the ions for the axtrin base region are implanted therein. A step of forming a nitride film (2)-ㅔ indicut using the oxide film (3) as a mask, removing the oxide film (3) and implanting ions for the link region (6); Field oxidation of the nitride film 2 with a mask, and removal of the nitride film 2 and the saturation oxide film 1, followed by polysilicon 7 deposition-ion implantation-refractory metal 8 deposition. And a normal metal wiring forming step. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880012329A 1988-09-23 1988-09-23 Manufacturing method of high quality bipolar tr KR910005404B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019880012329A KR910005404B1 (en) 1988-09-23 1988-09-23 Manufacturing method of high quality bipolar tr

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880012329A KR910005404B1 (en) 1988-09-23 1988-09-23 Manufacturing method of high quality bipolar tr

Publications (2)

Publication Number Publication Date
KR900005619A true KR900005619A (en) 1990-04-14
KR910005404B1 KR910005404B1 (en) 1991-07-29

Family

ID=19277978

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880012329A KR910005404B1 (en) 1988-09-23 1988-09-23 Manufacturing method of high quality bipolar tr

Country Status (1)

Country Link
KR (1) KR910005404B1 (en)

Also Published As

Publication number Publication date
KR910005404B1 (en) 1991-07-29

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