KR890015139A - Pseudo-scramble system of computer - Google Patents

Pseudo-scramble system of computer Download PDF

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Publication number
KR890015139A
KR890015139A KR1019880002715A KR880002715A KR890015139A KR 890015139 A KR890015139 A KR 890015139A KR 1019880002715 A KR1019880002715 A KR 1019880002715A KR 880002715 A KR880002715 A KR 880002715A KR 890015139 A KR890015139 A KR 890015139A
Authority
KR
South Korea
Prior art keywords
pseudo
computer
disk
memory
contents
Prior art date
Application number
KR1019880002715A
Other languages
Korean (ko)
Other versions
KR910000590B1 (en
Inventor
배만희
Original Assignee
배만희
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 배만희 filed Critical 배만희
Priority to KR1019880002715A priority Critical patent/KR910000590B1/en
Priority to JP1502352A priority patent/JPH02501602A/en
Priority to PCT/KR1989/000002 priority patent/WO1989008885A1/en
Publication of KR890015139A publication Critical patent/KR890015139A/en
Application granted granted Critical
Publication of KR910000590B1 publication Critical patent/KR910000590B1/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Storage Device Security (AREA)

Abstract

내용 없음.No content.

Description

컴퓨터의 의사(pseudo) 디스크램 시스템Pseudo disk system of computer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 개략 블록도.1 is a schematic block diagram of the present invention.

제2도는 제1도의 좀더 구체화된 요부블럭도.2 is a more detailed recessed block diagram of FIG.

제3도는 제1도의 논리제어회로부분을 좀더 구체화한 회로의 일예도,3 is an example of a circuit in which the logic control circuit portion of FIG. 1 is further embodied.

제4도의(가)는 본 발명의 마이크로컴퓨터에서 처리되는 메인프로그램의 플로우챠트,4A is a flowchart of a main program processed in a microcomputer of the present invention,

(나)는 본 발명의 마이크로컴퓨터에서 처리되는 인터럽트프로그램의 플로우챠트.(B) is a flowchart of an interrupt program processed by the microcomputer of the present invention.

Claims (2)

보조기업수단인 디스크장치와 주컴퓨터와의 상호데이타 교환 시스템을 가지는 컴퓨터 시스템에 있어서, 상기 디스크장치인 메모리 디스크(7)와 주컴퓨터(HC)사이에는 상기 메모리 디스크(7)에 수록된 메모리내용과 동일한 용량 및 내용을 수록 및 백업토록 되는 의사디스크램(3)과, 이 의사디스크램(3)에 기억된 내용이 주 컴퓨터(HC)측에서의 수정에 의하여 변경된 블록의 주소가 대응하는 비트에 기록되어 주컴퓨터의 액세스 끝난 후 즉시 수정된 내용을 디스크(7)로 백업할 수 있도록 하는 스테이트램(4) 및 메모리 디스크(7) 및 주컴퓨터(HC)와의 상호정보의 스위칭제어등 논리제어회로(2)와 이들 시스템제어용 마이크로 컴퓨터(1)를 일체로 포함하는 의사 디스크램 시스템(18)의 구성을 특징으로 하는 컴퓨터의 의사디스크램 시스템.A computer system having a system for exchanging data between a disk device as a subsidiary company and a main computer, wherein the memory device stored in the memory disk 7 and the memory disk 7 and the main computer HC are connected between the disk device and the main computer HC. The pseudo-disc 3 that stores and backs up the same capacity and contents, and the contents stored in the pseudo-disc 3 are recorded in the corresponding bits by the address of the block changed by modification on the host computer HC side. Logic control circuits such as stateram 4 and memory disk 7 and switching control of mutual information with the main computer HC, which enable to immediately back up the modified contents to the disk 7, after the master computer has been accessed. And a pseudo descrambler system (18) comprising a microcomputer (1) for controlling these systems. 제1항에 있어서, 상기 의사 디스크램 시스템(18)의 마이크로 컴퓨터(1)는 초기의 의사디스크램(3)에 메모리 디스크(7)측의 메모리 내용을 기입하는 작업과 주컴퓨터(HC)측에서의 엑세스에 응답하는 인터럽트프로그램 및 스테이트램(4)의 검사작업, 주컴퓨터(HC)측 액세스 종료시의 백업작업을 입체로 포함하는 메인프로그램이 내장된 것을 특징으로 하는 컴퓨터의 의사 디스크램 시스템.2. The microcomputer (1) of the pseudo descramble system (18) according to claim 1, wherein the microcomputer (1) of the pseudo descramble system (18) writes the contents of the memory on the side of the memory disk (7) to the initial pseudo descramble (3). A pseudo disc-RAM system of a computer, characterized by a built-in main program including an interrupt program responding to an access, a check operation of the state RAM (4), and a backup operation upon completion of the access of the main computer (HC) side. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880002715A 1988-03-14 1988-03-14 Mirror disk ram system of computer KR910000590B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019880002715A KR910000590B1 (en) 1988-03-14 1988-03-14 Mirror disk ram system of computer
JP1502352A JPH02501602A (en) 1988-03-14 1989-02-14 Mirror disk RAM system
PCT/KR1989/000002 WO1989008885A1 (en) 1988-03-14 1989-02-14 Mirror disk ram system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880002715A KR910000590B1 (en) 1988-03-14 1988-03-14 Mirror disk ram system of computer

Publications (2)

Publication Number Publication Date
KR890015139A true KR890015139A (en) 1989-10-28
KR910000590B1 KR910000590B1 (en) 1991-01-26

Family

ID=19272840

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880002715A KR910000590B1 (en) 1988-03-14 1988-03-14 Mirror disk ram system of computer

Country Status (3)

Country Link
JP (1) JPH02501602A (en)
KR (1) KR910000590B1 (en)
WO (1) WO1989008885A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6850314B2 (en) * 2019-03-05 2021-03-31 株式会社東海理化電機製作所 User authentication device and user authentication method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4500954A (en) * 1981-10-15 1985-02-19 International Business Machines Corporation Cache bypass system with post-block transfer directory examinations for updating cache and/or maintaining bypass
JPS60132256A (en) * 1983-12-21 1985-07-15 Hitachi Ltd Data securing system of nonvolatile memory
JPH0644245B2 (en) * 1983-12-29 1994-06-08 富士通株式会社 Store buffer device
EP0203601B1 (en) * 1985-05-29 1992-08-05 Kabushiki Kaisha Toshiba Cache system adopting an lru system, and magnetic disk controller incorporating it
JPH087662B2 (en) * 1985-10-18 1996-01-29 株式会社日立製作所 Data transfer control method
EP0232518A3 (en) * 1986-01-13 1989-12-13 Siemens Aktiengesellschaft Address mapping method and system for controlling a working memory
JPS6349924A (en) * 1986-08-20 1988-03-02 Matsushita Electric Ind Co Ltd Rapid disk access device

Also Published As

Publication number Publication date
KR910000590B1 (en) 1991-01-26
WO1989008885A1 (en) 1989-09-21
JPH02501602A (en) 1990-05-31

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