KR890011263A - Timing recovery circuit - Google Patents

Timing recovery circuit Download PDF

Info

Publication number
KR890011263A
KR890011263A KR1019870015330A KR870015330A KR890011263A KR 890011263 A KR890011263 A KR 890011263A KR 1019870015330 A KR1019870015330 A KR 1019870015330A KR 870015330 A KR870015330 A KR 870015330A KR 890011263 A KR890011263 A KR 890011263A
Authority
KR
South Korea
Prior art keywords
signal
divider
generating
programmable
recovery circuit
Prior art date
Application number
KR1019870015330A
Other languages
Korean (ko)
Inventor
최종관
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019870015330A priority Critical patent/KR890011263A/en
Publication of KR890011263A publication Critical patent/KR890011263A/en

Links

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

내용 없음No content

Description

타이밍 복구회로Timing recovery circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 블럭도,1 is a block diagram according to the present invention,

제2도는 본 발명에 따른 제1도의 구체 회로도.2 is a detailed circuit diagram of FIG. 1 in accordance with the present invention.

Claims (1)

동기 시스템의 클럭 복구회로에 있어서, 소정 신호를 발생하는 발진부(10)와, 상기 발진부(10)의 발진 신호를 받아 속도선택 및 리턴-투-제로수신에 의한 비교검출신호에 따라 프로그램어블하게 분주하여 소정 타이밍 신호를 발생하는 프로그램어블 카운터(20)와, 프로그램어블 카운터(20)의 신호를 소정 분주하며 사용 데이타레이트에 따라 수신기의 기준 타이밍신호를 발생하는 분주기(50)와, 수신 리턴-투-제로 데이타를 래치하여 정돈하는 데이타 얼라인 먼트부(40)와, 상기 분주기(50)의 출력과 데이타 얼라인 먼트부(40)의 출력 신호를 위상비교 및 검출한후 상기 프로그램어블 카운터(20)의 분주비를 조정하도록 제어하는 위상 비교 및 검출기 (30)로 구성됨을 특징으로 하는 타이밍 복구회로.In the clock recovery circuit of the synchronous system, the oscillation unit 10 generating a predetermined signal and the oscillation signal of the oscillation unit 10 are received and programmablely divided according to a comparison detection signal by speed selection and return-to-zero reception. Programmable divider 20 for generating a predetermined timing signal, a divider 50 for dividing the signal of programmable programmable counter 20 and generating a reference timing signal of a receiver according to a use data rate, and receiving return. The programmable counter after phase comparing and detecting a data alignment unit 40 for latching and arranging two-zero data, and an output signal of the divider 50 and an output signal of the data alignment unit 40. And a phase comparison and detector (30) for controlling to adjust the division ratio of (20). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870015330A 1987-12-30 1987-12-30 Timing recovery circuit KR890011263A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870015330A KR890011263A (en) 1987-12-30 1987-12-30 Timing recovery circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870015330A KR890011263A (en) 1987-12-30 1987-12-30 Timing recovery circuit

Publications (1)

Publication Number Publication Date
KR890011263A true KR890011263A (en) 1989-08-14

Family

ID=68807886

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870015330A KR890011263A (en) 1987-12-30 1987-12-30 Timing recovery circuit

Country Status (1)

Country Link
KR (1) KR890011263A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040015457A (en) * 2002-08-13 2004-02-19 현대모비스 주식회사 Method for controlling tasks having different controlling period

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040015457A (en) * 2002-08-13 2004-02-19 현대모비스 주식회사 Method for controlling tasks having different controlling period

Similar Documents

Publication Publication Date Title
KR930003584A (en) Phase Detectors for Ultra High Frequency Clocks and Data Recovery Circuits
EP0102662A3 (en) Non-pll concurrent carrier and clock synchronization
KR890011263A (en) Timing recovery circuit
HK1009008A1 (en) Interrogator for electronic identification system
JPS5435666A (en) Timing extraction system
KR910009005A (en) Terminal device connected to communication network
KR890007491A (en) Frequency detector for frequency locked loop
FR2430015A1 (en) Phase discriminator with cross-coupled reference and test signals - has strobe input to parallel discriminators and stores and coincidence circuits providing outputs
TW316019U (en) Receive lock apparatus for dual phase locked loop
GB1521029A (en) Synchronous digital systems
KR860006872A (en) Tone detector
KR850001428A (en) Optical detector
ES471307A1 (en) Master clock arrangement
KR920003699A (en) Pointer Adjustment Jitter Reduction Device in Synchronous Multiple Devices
JPS5252616A (en) Synchronous signal generating circuit in data reading device
KR920009087A (en) Phase detection device of phase locked loop circuit
SU568186A1 (en) Clock synchronization circuit
KR970004502A (en) Data restoration circuit of data communication system
KR930005399A (en) Digital Data Synchronization Signal Detection Circuit
KR850005054A (en) Digital Phase Synchronizer of Same Frequency Signal of Signal Demodulator
KR960002325A (en) Phase synchronization coincidence circuit
JPS52124849A (en) Timing signal detection circuit
KR950035095A (en) Phase Synchronizer of Digital Signal
JPS5523613A (en) Reproducing system of timing information
KR920001924A (en) Field detection circuit

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination