KR870003552A - 화합물 반도체장치의 제조방법 - Google Patents
화합물 반도체장치의 제조방법 Download PDFInfo
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- KR870003552A KR870003552A KR1019860007530A KR860007530A KR870003552A KR 870003552 A KR870003552 A KR 870003552A KR 1019860007530 A KR1019860007530 A KR 1019860007530A KR 860007530 A KR860007530 A KR 860007530A KR 870003552 A KR870003552 A KR 870003552A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/02—Epitaxial-layer growth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02392—Phosphides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Materials Engineering (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Crystallography & Structural Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명의 합성반도체에의한 오거(Auger)전자분광의 최고치를 나타내는 그래프로서, 수직축은 dN/dE값을 표시하고, 수평축은 전자에너지값을 표시한다.
제5도는 본 발명에 의한 화합물반도체장치의 제조방법에 사용되는 진공장치를 도시하는 부분 평면도.
제6도는 본 발명의 방법에 의해 제조한 합성반도체의 횡단면도.
* 도면의 주요부분에 대한 부호의 설명
1 : 기판호울더 2 : 기판
3 : 셀셔터 4 : Ⅲ족샘플
5,7 : 셀 6 : V족샘플
Claims (8)
- 화합물반도체의 기판 혹은 하부측에 적측이 성장하기 전에 Ⅲ족분자비임 혹은 v족분자비임을 투사하여, 화합물반도체의 기판 혹은 하부측상의 불순물분자를 제거하는 공정과, 화합물 반도체의 기판 혹은 하부측에 Ⅲ족 및 v족원자 화합물반도체의 박막측을 성장시키는 공정으로 이루어지는 화합물반도체장치의 제조방법.
- 제1항에 있어서, 상기 기판 혹은 하부측은 InP인 것을 특징으로 하는 화합물반도체장치의 제조방법.
- 제1항에 있어서, 상기 Ⅲ족분자비임은 In분자비임 혹은 Ga분자비임인 것을 특징으로 하는 화합물반도체장치의 제조방법.
- 제1항에 있어서, 상기 v족분자비임은 Sb분자비임인 것을 특징으로 하는 화합물반도체장치의 제조방법.
- 제1항에 있어서, 화합물반도체의 기판 혹은 하부측에 투사되는 Ⅲ족 혹은 V족분자비임의 투사량은 1원자측을 형성하는데 필요한 수보다 적은 것을 특징으로 하는 화합물반도체장치의 제조방법.
- 제1항에 있어서, Ⅲ족 혹은 V족분자비임의 투사중 화합물 반도체의 기판 혹은 하부층이 온도는 350℃ 내지 500℃인 것을 특징으로하는 화합물반도체장치의 제조방법.
- 셀에 수용된 물질을 고부압하에서 기판상에 투사하여 성장실내의 기판에 단결정을 성장시키는 분자적 층성방법에 있어서, 물질이 기판에 도포된 후 기판의 온도를 일정하게 유지하거나 기판이 소정의 온도로 가열된 후 일정한 온도를 유지하는 공정과, 1 이상의 원자층을 형성하기 위하여 존재하는 과량의 원자를 제거하여 기판상에 1원자층을 형성시키는 공정과, 기판상에 다른 물질을 정착시켜서 요철부가 없는 평탄층을 형성시키는 공정으로 이루어진 것을 특징으로 하는 분자적층성장방법.
- 제7항에 있어서, 상기 기판은 InP기판이고, 기판상에는 Ga물질을 As4 혹은 As2 분위기 중에서 InP기판온도 300℃ 내지 500℃하에 1원자두께로 정착시키고, 계속해서 기판의 온도는 400℃ 내지 600℃ 사이로 유지하여 1원자층을 완성하지 않은 최외 표면상의 과량의 Ga원자가 제거되어 완전한 1원자두께의 GaAa층을 형성하도록 하고, 이어서 기판의 온도를 250℃내지 450℃로 유지하고, In물질을 1원자두께 이상으로 정착시켜서 기판온도를 400℃ 내지 500℃ 사이로 유지하고, 1원자층이 완성되지 않은 최외표면상의 과량의 In원자를 제거하여 완전한 1원자 두께의 InAs층을 형성시키고, 상기의 공정을 반복하는 것을 특징으로 하는 분자적층성장방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19887885A JPS6258613A (ja) | 1985-09-09 | 1985-09-09 | 薄膜成長方法 |
JP60-198878 | 1985-09-09 | ||
JP20087285A JPS6260218A (ja) | 1985-09-10 | 1985-09-10 | 薄膜成長方法 |
JP60-200872 | 1985-09-10 | ||
JP60-209753 | 1985-09-20 | ||
JP20975385A JPS6269508A (ja) | 1985-09-20 | 1985-09-20 | 化合物半導体装置製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR870003552A true KR870003552A (ko) | 1987-04-18 |
Family
ID=27327562
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019860007530A KR870003552A (ko) | 1985-09-09 | 1986-09-09 | 화합물 반도체장치의 제조방법 |
Country Status (5)
Country | Link |
---|---|
EP (2) | EP0499294A1 (ko) |
KR (1) | KR870003552A (ko) |
CN (2) | CN1004455B (ko) |
AU (1) | AU590327B2 (ko) |
DE (1) | DE3688028T2 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1987003740A1 (en) * | 1985-12-09 | 1987-06-18 | Nippon Telegraph And Telephone Corporation | Process for forming thin film of compound semiconductor |
JP3378594B2 (ja) * | 1992-09-25 | 2003-02-17 | 富士通株式会社 | データベース再配置を行う処理装置 |
US6039809A (en) * | 1998-01-27 | 2000-03-21 | Mitsubishi Materials Silicon Corporation | Method and apparatus for feeding a gas for epitaxial growth |
US6811814B2 (en) | 2001-01-16 | 2004-11-02 | Applied Materials, Inc. | Method for growing thin films by catalytic enhancement |
US8362633B2 (en) * | 2010-11-30 | 2013-01-29 | Mitsubishi Heavy Industries, Ltd. | Wind turbine generator with a control unit for controlling a rotation speed of a main shaft |
CN105986321B (zh) * | 2015-02-16 | 2018-08-28 | 中国科学院苏州纳米技术与纳米仿生研究所 | 在Ge衬底上生长GaAs外延薄膜的方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3915765A (en) * | 1973-06-25 | 1975-10-28 | Bell Telephone Labor Inc | MBE technique for fabricating semiconductor devices having low series resistance |
SE393967B (sv) * | 1974-11-29 | 1977-05-31 | Sateko Oy | Forfarande och for utforande av stroleggning mellan lagren i ett virkespaket |
GB1528192A (en) * | 1975-03-10 | 1978-10-11 | Secr Defence | Surface treatment of iii-v compound crystals |
US4163237A (en) * | 1978-04-24 | 1979-07-31 | Bell Telephone Laboratories, Incorporated | High mobility multilayered heterojunction devices employing modulated doping |
US4538165A (en) * | 1982-03-08 | 1985-08-27 | International Business Machines Corporation | FET With heterojunction induced channel |
JPH07120790B2 (ja) * | 1984-06-18 | 1995-12-20 | 株式会社日立製作所 | 半導体装置 |
US4882609A (en) * | 1984-11-19 | 1989-11-21 | Max-Planck Gesellschaft Zur Forderung Der Wissenschafter E.V. | Semiconductor devices with at least one monoatomic layer of doping atoms |
-
1986
- 1986-09-08 AU AU62456/86A patent/AU590327B2/en not_active Ceased
- 1986-09-09 EP EP92107691A patent/EP0499294A1/en not_active Withdrawn
- 1986-09-09 EP EP86112487A patent/EP0215436B1/en not_active Expired - Lifetime
- 1986-09-09 DE DE8686112487T patent/DE3688028T2/de not_active Expired - Fee Related
- 1986-09-09 KR KR1019860007530A patent/KR870003552A/ko not_active Application Discontinuation
- 1986-09-09 CN CN86106177.2A patent/CN1004455B/zh not_active Expired
-
1988
- 1988-11-23 CN CN88108172A patent/CN1009885B/zh not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE3688028D1 (de) | 1993-04-22 |
AU6245686A (en) | 1987-03-12 |
EP0215436A3 (en) | 1989-02-08 |
CN1032884A (zh) | 1989-05-10 |
EP0499294A1 (en) | 1992-08-19 |
EP0215436A2 (en) | 1987-03-25 |
CN86106177A (zh) | 1987-06-03 |
AU590327B2 (en) | 1989-11-02 |
CN1009885B (zh) | 1990-10-03 |
DE3688028T2 (de) | 1993-09-09 |
CN1004455B (zh) | 1989-06-07 |
EP0215436B1 (en) | 1993-03-17 |
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