KR860006059A - 제산기 - Google Patents

제산기

Info

Publication number
KR860006059A
KR860006059A KR1019860000261A KR860000261A KR860006059A KR 860006059 A KR860006059 A KR 860006059A KR 1019860000261 A KR1019860000261 A KR 1019860000261A KR 860000261 A KR860000261 A KR 860000261A KR 860006059 A KR860006059 A KR 860006059A
Authority
KR
South Korea
Prior art keywords
divider
Prior art date
Application number
KR1019860000261A
Other languages
English (en)
Other versions
KR930006518B1 (ko
Inventor
다쓰야 사까이
사꼬오 이시가와
Original Assignee
가부시기가이샤 히다찌세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시기가이샤 히다찌세이사꾸쇼 filed Critical 가부시기가이샤 히다찌세이사꾸쇼
Publication of KR860006059A publication Critical patent/KR860006059A/ko
Application granted granted Critical
Publication of KR930006518B1 publication Critical patent/KR930006518B1/ko

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/535Dividing only
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5352Non-restoring division not covered by G06F7/5375

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
KR1019860000261A 1985-01-18 1986-01-17 제산기(際算器) KR930006518B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP5669 1985-01-18
JP60005669A JPS61166628A (ja) 1985-01-18 1985-01-18 除算装置

Publications (2)

Publication Number Publication Date
KR860006059A true KR860006059A (ko) 1986-08-18
KR930006518B1 KR930006518B1 (ko) 1993-07-16

Family

ID=11617507

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860000261A KR930006518B1 (ko) 1985-01-18 1986-01-17 제산기(際算器)

Country Status (3)

Country Link
US (1) US4761757A (ko)
JP (1) JPS61166628A (ko)
KR (1) KR930006518B1 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5097436A (en) * 1990-01-09 1992-03-17 Digital Equipment Corporation High performance adder using carry predictions
JP2835153B2 (ja) * 1990-06-25 1998-12-14 株式会社東芝 高基数除算器
JP4042364B2 (ja) * 2001-07-27 2008-02-06 日本電気株式会社 アドレス生成回路、選択判断回路
US7539720B2 (en) * 2004-12-15 2009-05-26 Sun Microsystems, Inc. Low latency integer divider and integration with floating point divider and method
JP4388543B2 (ja) * 2006-12-14 2009-12-24 株式会社日立製作所 3項入力の浮動小数点加減算器
US8452831B2 (en) * 2009-03-31 2013-05-28 Oracle America, Inc. Apparatus and method for implementing hardware support for denormalized operands for floating-point divide operations
US9086890B2 (en) 2012-01-06 2015-07-21 Oracle International Corporation Division unit with normalization circuit and plural divide engines for receiving instructions when divide engine availability is indicated

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4084254A (en) * 1977-04-28 1978-04-11 International Business Machines Corporation Divider using carry save adder with nonperforming lookahead
JPS60201435A (ja) * 1984-03-26 1985-10-11 Fujitsu Ltd 高基数非回復型除算装置

Also Published As

Publication number Publication date
US4761757A (en) 1988-08-02
JPS61166628A (ja) 1986-07-28
KR930006518B1 (ko) 1993-07-16
JPH0374419B2 (ko) 1991-11-26

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Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20010522

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee