KR20210098659A - 댐 구조물을 갖는 반도체 패키지 - Google Patents

댐 구조물을 갖는 반도체 패키지 Download PDF

Info

Publication number
KR20210098659A
KR20210098659A KR1020200012460A KR20200012460A KR20210098659A KR 20210098659 A KR20210098659 A KR 20210098659A KR 1020200012460 A KR1020200012460 A KR 1020200012460A KR 20200012460 A KR20200012460 A KR 20200012460A KR 20210098659 A KR20210098659 A KR 20210098659A
Authority
KR
South Korea
Prior art keywords
semiconductor chip
dam
substrate
lower semiconductor
narrow
Prior art date
Application number
KR1020200012460A
Other languages
English (en)
Other versions
KR102689648B1 (ko
Inventor
김동호
심종보
박환필
이장우
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR1020200012460A priority Critical patent/KR102689648B1/ko
Priority claimed from KR1020200012460A external-priority patent/KR102689648B1/ko
Priority to US16/928,159 priority patent/US11437293B2/en
Publication of KR20210098659A publication Critical patent/KR20210098659A/ko
Priority to US17/883,726 priority patent/US20220384291A1/en
Application granted granted Critical
Publication of KR102689648B1 publication Critical patent/KR102689648B1/ko

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/54486—Located on package parts, e.g. encapsulation, leads, package substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0613—Square or rectangular array
    • H01L2224/06134—Square or rectangular array covering only portions of the surface to be connected
    • H01L2224/06135—Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/81418—Zinc [Zn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/81424—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81439—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81444—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81455—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81457—Cobalt [Co] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/8146—Iron [Fe] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/81464—Palladium [Pd] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/81466—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/81469—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/81471—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/83132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H01L2224/85132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/85418—Zinc (Zn) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/85424—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85439—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85444—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85447—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85455—Nickel (Ni) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85457—Cobalt (Co) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/8546—Iron (Fe) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/85464—Palladium (Pd) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/85466—Titanium (Ti) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/85469—Platinum (Pt) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/85471—Chromium (Cr) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06558—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices having passive surfaces facing each other, i.e. in a back-to-back arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06582—Housing for the assembly, e.g. chip scale package [CSP]
    • H01L2225/06586—Housing with external bump or bump-like connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

반도체 패키지는 상면에 본딩 패드들을 갖는 기판, 하부 반도체 칩 및 상기 하부 반도체 칩 상의 적어도 하나의 상부 반도체 칩, 상기 하부 반도체 칩을 둘러싸는 닫힌 루프 형상을 갖는 댐 구조물을 포함한다. 상기 댐 구조물은 상기 하부 반도체 칩과 상기 본딩 패드들 사이의 협폭 댐 및 상기 협폭 댐보다 큰 내부 폭을 갖는 광폭 댐을 포함한다. 반도체 패키지는 상기 댐 구조물의 내측에 배치되며 상기 기판과 상기 하부 반도체 칩 사이를 채우는 언더필을 포함한다.

Description

댐 구조물을 갖는 반도체 패키지{SEMICONDUCTOR PACKAGES HAVING DAM STRUCTURE}
본 개시의 기술적 사상은 댐 구조물을 갖는 반도체 패키지에 관한 것이다.
반도체 소자의 소형화 추세에 따라, 하나의 반도체 패키지 내부에 각각의 기능을 갖는 반도체 칩들을 실장하는 기술이 요구된다. 반도체 패키지는 기판과 하부 반도체 칩 사이를 채우는 언더필, 및 본딩 패드가 언더필에 덮이지 않도록 하는 댐 구조물을 포함한다. 반도체 패키지의 크기가 작아짐에 따라, 언더필의 디스펜싱 면적이 좁아지는 문제가 있다.
본 개시의 기술적 사상의 실시예들에 따른 과제는 협폭 댐 및 광폭 댐을 갖는 댐 구조물을 포함하는 반도체 패키지를 제공하는데 있다.
본 개시의 실시예들에 따른 반도체 패키지는 상면에 본딩 패드들을 갖는 기판; 상기 기판 상에 배치되는 하부 반도체 칩 및 상기 하부 반도체 칩 상의 적어도 하나의 상부 반도체 칩; 상기 기판 상에 배치되며 상기 하부 반도체 칩을 둘러싸는 닫힌 루프 형상을 갖는 댐 구조물, 상기 댐 구조물은 상기 하부 반도체 칩과 상기 본딩 패드들 사이의 협폭 댐 및 상기 협폭 댐보다 큰 내부 폭을 갖는 광폭 댐을 포함하며, 및 상기 댐 구조물의 내측에 배치되며 상기 기판과 상기 하부 반도체 칩 사이를 채우는 언더필을 포함할 수 있다.
본 개시의 실시예들에 따른 반도체 패키지는 상면에 본딩 패드들을 갖는 기판; 상기 기판 상에 배치되는 하부 반도체 칩 및 상기 하부 반도체 칩 상의 적어도 하나의 상부 반도체 칩; 상기 기판과 상기 하부 반도체 칩 사이를 채우는 언더필을 포함하되, 상기 언더필은 상기 하부 반도체 칩과 상기 본딩 패드들 사이의 비확장 영역 및 상기 비확장 영역보다 내부 폭이 큰 확장 영역을 포함하며, 및; 상기 기판 상에 배치되고 상기 언더필을 둘러싸며 닫힌 루프 형상을 갖는 댐 구조물을 포함할 수 있다.
본 개시의 실시예들에 따른 반도체 패키지는 상면에 본딩 패드들을 갖는 기판; 상기 기판 상에 플립칩 방식으로 실장된 하부 반도체 칩 및 상기 하부 반도체 칩 상에 와이어 본딩 방식으로 실장된 상부 반도체 칩; 상기 기판 상에 배치되며 상기 하부 반도체 칩을 둘러싸는 닫힌 루프 형상을 갖는 댐 구조물, 상기 댐 구조물은 상기 하부 반도체 칩과 상기 본딩 패드들 사이의 협폭 댐 및 상기 협폭 댐보다 내부 폭이 확장된 광폭 댐을 가지며, 상기 댐 구조물의 내측에 배치되며 상기 기판과 상기 하부 반도체 칩 사이를 채우는 언더필; 및 상기 기판, 상기 하부 반도체 칩 및 상기 상부 반도체 칩을 덮는 봉지재를 포함할 수 있다.
본 개시의 실시예들에 따르면 댐 구조물을 협폭 댐 및 광폭 댐을 포함하여, 언더필의 디스펜싱 면적을 넓게 확보할 수 있다.
도 1은 본 개시의 일 실시예에 따른 반도체 패키지의 평면도이다.
도 2a 내지 도 2c는 도 1에 도시된 반도체 패키지의 선 I-I', 선 II-II' 및 선 III-III'을 따른 수직 단면도들이다.
도 3은 본 개시의 다른 실시예에 따른 반도체 패키지의 평면도이다.
도 4는 본 개시의 다른 실시예에 따른 반도체 패키지의 평면도이다.
도 5는 도 4에 도시된 반도체 패키지의 선 IV-IV'을 따른 수직 단면도이다.
도 6은 본 개시의 다른 실시예에 따른 반도체 패키지의 평면도이다.
도 7 내지 도 12는 본 개시의 일 실시예에 따른 반도체 패키지의 제조 방법을 설명하기 위해 공정 순서에 따라 도시된 평면도들 및 수직 단면도들이다.
도 1은 본 개시의 일 실시예에 따른 반도체 패키지의 평면도이다.
도 2a 내지 도 2c는 도 1에 도시된 반도체 패키지의 선 I-I', 선 II-II' 및 선 III-III'을 따른 수직 단면도들이다.
도 1, 도 2a 내지 도 2c를 참조하면, 반도체 패키지(100)는 기판(102), 댐 구조물(D), 하부 반도체 칩(110), 언더필(120), 상부 반도체 칩(130), 봉지재(140) 및 외부 연결 단자(150)를 포함할 수 있다.
기판(102)은 상면에 상부 패드들(104) 포함할 수 있으며, 하면에 하부 패드들(106)을 포함할 수 있다. 상부 패드들(104)은 각각 대응하는 하부 패드들(106)과 전기적으로 연결될 수 있다. 또한, 기판(102)은 상면에 본딩 패드들(108)을 포함할 수 있다. 본딩 패드들(108)은 대응하는 하부 패드들(106)과 전기적으로 연결될 수 있다. 본딩 패드들(108)은 기판(102)의 3면에 배치될 수 있다. 예를 들어, 본딩 패드들(108)은 평면도에서 기판(102)의 제1 수평 방향(x)의 일측면의 가장자리 및 제2 수평 방향(y)의 양측 가장자리에 배치될 수 있다. 그러나, 이에 제한되지 않는다. 본딩 패드들(108)은 직사각 형상을 갖는 것이 도시되어 있으나, 다른 실시예에서, 원, 타원 등의 형상을 가질 수 있다.
하부 반도체 칩(110)은 기판(102) 상에 배치될 수 있다. 하부 반도체 칩(110)은 직사각 형상을 가지며 제1 측면(111), 제2 측면(112), 제3 측면(113) 및 제4 측면(114)을 포함할 수 있다. 하부 반도체 칩(110)은 하면에 범프들(116)을 포함할 수 있다. 범프들(116)은 상부 패드들(104)을 통해 기판(102)과 전기적으로 연결될 수 있다.
댐 구조물(D)은 기판(102)의 상면에 배치될 수 있으며, 하부 반도체 칩(110)을 둘러쌀 수 있다. 댐 구조물(D)은 협폭 댐(Da), 광폭 댐(Db), 제1 연결부(Dc1) 및 제2 연결부(Dc2)를 포함할 수 있다. 협폭 댐(Da)은 본딩 패드(108)와 하부 반도체 칩(110) 사이에 배치될 수 있으며, 상대적으로 작은 내부 폭을 가질 수 있다. 광폭 댐(Db)은 협폭 댐(Da)에 연결되며, 상대적으로 큰 내부 폭을 가질 수 있다. 일 실시예에서, 하부 반도체 칩(110)과 광폭 댐(Db) 사이의 거리는 하부 반도체 칩(110)과 협폭 댐(Da) 사이의 거리보다 클 수 있다. 예를 들어, 하부 반도체 칩(110)과 협폭 댐(Da) 사이의 거리(W1)는 200㎛ ~ 400㎛일 수 있으며, 하부 반도체 칩(110)과 광폭 댐(Db) 사이의 거리(W2)는 500㎛ ~ 1000㎛일 수 있다. 협폭 댐(Da)과 본딩 패드들(108) 사이의 제2 수평 방향(y) 거리(W3)는 50㎛ ~ 150㎛일 수 있다. 광폭 댐(Db)과 기판(102)의 측면 사이의 거리(W4)는 100㎛ ~ 300㎛일 수 있다. 제1 연결부(Dc1) 및 제2 연결부(Dc2)와 본딩 패드들(108) 사이의 제1 수평 방향(x) 거리(W5)는 50㎛ ~ 150㎛일 수 있다.
댐 구조물(D)은 본딩 패드들(108)과 언더필(120)을 공간적으로 분리시킬 수 있다. 예를 들어, 댐 구조물(D)의 협폭 댐(Da)은 본딩 패드들(108)과 언더필(120) 사이에서 하부 반도체 칩(110)의 제1 내지 제3 측면들(111, 112, 113)을 따라 연장될 수 있다.
일 실시예에서, 협폭 댐(Da) 및 광폭 댐(Db)은 ㄷ자 형상 또는 각진 C자 형상(angular C-shape)일 수 있다. 예를 들어, 협폭 댐(Da)은 하부 반도체 칩(110)의 제1 내지 제3 측면들(111, 112, 113)을 둘러싸고, 광폭 댐(Db)은 제1, 제3 및 제4 측면들(111, 113, 114)을 둘러쌀 수 있다. 평면도에서, 협폭 댐(Da) 및 광폭 댐(Db)은 각각 하부 반도체 칩(110)의 제1 측면(111)과 인접한 제1 단부(Da1) 및 제1 단부(Db1)를 포함할 수 있으며, 제3 측면(113)과 인접한 제2 단부(Da2) 및 제2 단부(Db2)를 포함할 수 있다. 제1 연결부(Dc1)는 제1 단부(Da1) 및 제1 단부(Db1)를 연결할 수 있으며, 제2 연결부(Dc2)는 제2 단부(Da2)와 제2 단부(Db2)를 연결할 수 있다. 다른 실시예에서, 협폭 댐(Da) 및 광폭 댐(Db)은 둥근 C자 형상 또는 원호 형상을 가질 수 있다. 제1 연결부(Dc1) 및 제2 연결부(Dc2)와 본딩 패드들(108) 사이의 제1 수평 방향(x) 거리는 50㎛ ~ 150㎛일 수 있다. 본딩 패드들(108)은 하부 반도체 칩(110)의 제1 내지 제3 측면들(111, 112, 113)과 대향하도록 배치될 수 있다.
언더필(120)은 기판(102)과 하부 반도체 칩(110) 사이를 채울 수 있다. 언더필(120)은 에폭시 수지를 포함할 수 있으며, 범프들(116)을 보호할 수 있다. 언더필(120)은 기판(102)의 상면을 부분적으로 덮을 수 있으며, 본딩 패드(108)를 덮지 않을 수 있다. 언더필(120)은 댐 구조물(D)의 내측에 배치될 수 있으며, 댐 구조물(D)의 내측면에 접할 수 있다.
평면도에서, 언더필(120)은 협폭 댐(Da)의 내측을 채우는 비확장 영역(120a) 및 광폭 댐(Db)의 내측을 채우는 확장 영역(120b)을 포함할 수 있다. 비확장 영역(120a)은 본딩 패드(108)와 하부 반도체 칩(110) 사이에 배치될 수 있다. 확장 영역(120b)은 비확장 영역(120a)과 연결될 수 있으며, 확장 영역(120b)은 비확장 영역(120a)보다 큰 내부 폭을 가질 수 있다. 예를 들어, 하부 반도체 칩(110)과 확장 영역(120b)의 측면 사이의 거리는 하부 반도체 칩(110)과 비확장 영역(120a)의 측면 사이의 거리보다 클 수 있다. 비확장 영역(120a) 및 확장 영역(120b)은 직사각 형상을 갖는 것이 도시되어 있으나, 이에 제한되지 않으며 원 또는 타원 형상을 가질 수 있다.
기판(102)과 하부 반도체 칩(110) 사이에 채워지는 언더필(120)의 양은 범프들(116)의 높이에 따라 결정될 수 있다. 그러나, 반도체 패키지(100)의 사이즈가 작아지면 언더필(120)의 디스펜싱 면적이 충분하지 않을 수 있다. 본 발명의 일 실시예에 따른 반도체 패키지(100)는 협폭 댐(Da) 및 광폭 댐(Db)을 갖는 댐 구조물(D)을 포함하므로, 주어진 반도체 패키지(100) 사이즈에 대해 언더필(120)의 디스펜싱 면적을 상대적으로 넓게 확보할 수 있다.
상부 반도체 칩(130)은 하부 반도체 칩(110) 상에 배치될 수 있다. 일 실시예에서, 상부 반도체 칩(130)은 기판(102)에 와이어 본딩 방식으로 실장될 수 있다. 예를 들어, 상부 반도체 칩(130)은 상면에 칩 패드들(132)을 포함할 수 있으며, 기판(102)의 본딩 패드들(108)과 상부 반도체 칩(130)의 칩 패드들(132)은 본딩 와이어(134)를 통해 전기적으로 연결될 수 있다. 상부 반도체 칩(130)은 접착제(136)에 의해 하부 반도체 칩(110) 상에 고정될 수 있다.
하부 반도체 칩(110)은 마이크로 프로세서, 마이크로 컨트롤러 등의 어플리케이션 프로세서(application processor; AP) 칩, CPU, GPU, 모뎀, ASIC(application-specific IC) 및 FPGA(Field Programmable Gate Array) 등의 로직 칩을 포함할 수 있다. 상부 반도체 칩(130)은 DRAM과 같은 휘발성 메모리 칩 또는 플래시 메모리 같은 비휘발성 메모리 칩을 포함할 수 있다. 일 실시예에서, 하부 반도체 칩(110)은 모뎀 칩을 포함할 수 있고, 상부 반도체 칩(130)은 DRAM 칩을 포함할 수 있다.
봉지재(140)는 기판(102), 하부 반도체 칩(110), 상부 반도체 칩(130) 및 댐 구조물(D)을 덮을 수 있다. 일 실시예에서, 봉지재(140)는 에폭시 몰딩 컴파운드(EMC)를 포함할 수 있다.
외부 연결 단자(150)는 기판(102)의 하면에 형성될 수 있다. 외부 연결 단자(150)는 기판(102)의 하부 패드(106)와 연결될 수 있으며, 하부 패드(106)를 통해 상부 패드(104)와 전기적으로 연결될 수 있다.
도 3은 본 개시의 다른 실시예에 따른 반도체 패키지의 평면도이다.
도 3을 참조하면, 반도체 패키지(200)는 기판(102)상에 배치되며 하부 반도체 칩(110)을 둘러싸는 댐 구조물(D)을 포함할 수 있다. 반도체 패키지(200)는 기판(102) 상에 얼라인 마크(208)를 포함할 수 있다. 얼라인 마크(208)는 상부 반도체 칩(130)의 형성 시 상부 반도체 칩(130)을 기판(102)상에 정렬하고 본딩 패드들(108)과 연결하기 위한 기준이 될 수 있다. 얼라인 마크(208)는 기판(102)의 가장자리에 배치될 수 있으며, 예를 들어 두 개의 얼라인 마크(208)가 기판(102)의 대각선 방향의 양 모서리에 배치될 수 있다.
댐 구조물(D)은 얼라인 마크(208)와 중첩되지 않을 수 있다. 예를 들어, 댐 구조물(D)은 얼라인 마크(208)에 대응하여 수직으로 구부러진 컷-아웃(C)을 포함할 수 있다. 컷-아웃(C)은 얼라인 마크(208)로부터 이격되어 배치될 수 있으며, 얼라인 마크(208)는 댐 구조물(D)의 외측에 위치할 수 있다.
도 4는 본 개시의 다른 실시예에 따른 반도체 패키지의 평면도이다.
도 5는 도 4에 도시된 반도체 패키지의 선 IV-IV'을 따른 수직 단면도이다.
도 4 및 도 5를 참조하면, 반도체 패키지(300)는 하부 반도체 칩(110)을 둘러싸는 댐 구조물(D) 및 댐 구조물(D) 내부의 언더필(320)을 포함할 수 있다. 하부 반도체 칩(110) 상에 제1 상부 반도체 칩(330a) 및 제2 상부 반도체 칩(330b)이 배치될 수 있다. 제1 상부 반도체 칩(330a)과 제2 상부 반도체 칩(330b)은 제1 수평 방향(x)을 따라 서로 이격되어 배치될 수 있다. 일 실시예에서, 제1 상부 반도체 칩(330a) 및 제2 상부 반도체 칩(330b)은 기판(102)에 와이어 본딩 방식으로 실장될 수 있다. 제1 상부 반도체 칩(330a)은 상면에 제1 칩 패드들(332a)을 포함할 수 있으며, 제2 상부 반도체 칩(330b)은 상면에 제2 칩 패드들(332b)을 포함할 수 있다. 제1 칩 패드들(332a)은 ㄷ자 형상으로 배치될 수 있다. 예를 들어, 제1 칩 패드들(332a)은 제1 상부 반도체 칩(330a)의 우측을 제외한 상측, 하측 및 좌측에 배치될 수 있다. 제2 칩 패드들(332b)은 ㄷ자 형상으로 배치될 수 있다. 예를 들어, 제2 칩 패드들(332b)은 제2 상부 반도체 칩(330b)의 좌측을 제외한 상측, 하측 및 우측에 배치될 수 있다. 본딩 패드들(108)은 제1 칩 패드들(332a) 및 제2 칩 패드들(332b)에 대응하여 하부 반도체 칩(110)을 둘러싸도록 배치될 수 있다.
댐 구조물(D)은 협폭 댐(Da) 및 광폭 댐(Db)을 포함할 수 있다. 예를 들어, 댐 구조물(D)은 제1 수평 방향(x)으로 이격된 두 개의 협폭 댐들(Da) 및 협폭 댐들(Da) 사이에 배치되며 제2 수평 방향(y)으로 확장된 광폭 댐(Db)을 포함할 수 있다. 협폭 댐들(Da)은 본딩 패드들(108)과 하부 반도체 칩(110) 사이에서 연장될 수 있다. 댐 구조물(D) 하부 반도체 칩(110)을 둘러쌀 수 있으며, 닫힌 루프 형상을 가질 수 있다.
언더필(320)은 댐 구조물(D)의 내측에 배치될 수 있으며, 댐 구조물(D)의 내측면에 접할 수 있다. 평면도에서, 언더필(320)은 협폭 댐(Da)의 내측을 채우는 비확장 영역(320a) 및 광폭 댐(Db)의 내측을 채우는 확장 영역(320b)을 포함할 수 있다. 확장 영역(320b)은 비확장 영역(320a)보다 큰 내부 폭을 가질 수 있다. 예를 들어, 확장 영역(320b)의 제2 수평 방향(y)의 폭은 비확장 영역(320a)의 제2 수평 방향(y)의 내부 폭 보다 클 수 있다.
도 6은 본 개시의 다른 실시예에 따른 반도체 패키지의 평면도이다.
도 6을 참조하면, 반도체 패키지(400)는 하부 반도체 칩(110)을 둘러싸는 댐 구조물(D) 및 댐 구조물(D) 내부의 언더필(420)을 포함할 수 있다. 상부 반도체 칩(130)은 상면에 칩 패드들(432)을 포함할 수 있으며, 칩 패드들(432)은 상부 반도체 칩(130)의 좌측 및 우측 가장자리에 배치될 수 있다. 본딩 패드들(108)은 칩 패드들(432)에 대응하여 기판(102)의 좌측 및 우측 가장자리에 배치될 수 있다.
댐 구조물(D)은 협폭 댐(Da) 및 광폭 댐(Db)을 포함할 수 있다. 예를 들어, 평면도에서 댐 구조물(D)은 협폭 댐(Da) 및 협폭 댐(Da) 아래에 광폭 댐(Db)을 포함할 수 있다. 협폭 댐(Da)은 본딩 패드들(108)과 하부 반도체 칩(110) 사이에서 연장될 수 있다. 댐 구조물(D) 하부 반도체 칩(110)을 둘러쌀 수 있으며, 닫힌 루프 형상을 가질 수 있다.
평면도에서, 언더필(420)은 협폭 댐(Da)의 내측을 채우는 비확장 영역(420a) 및 광폭 댐(Db)의 내측을 채우는 확장 영역(420b)을 포함할 수 있다.
도 7 내지 도 12는 본 개시의 일 실시예에 따른 반도체 패키지(100)의 제조 방법을 설명하기 위해 공정 순서에 따라 도시된 평면도들 및 수직 단면도들이다. 도 7, 도 9 및 도 11은 따른 반도체 패키지(100)의 제조 방법을 설명하기 위한 평면도들이며, 도 8, 도 10 및 도 12는 각각 도 7, 도 9 및 도 11의 선 I-I'를 따른 수직 단면도들이다.
도 7 및 도 8을 참조하면, 기판(102)이 제공될 수 있다. 기판(102)은 상면에 상부 패드들(104)을 포함할 수 있으며, 하면에 하부 패드들(106)을 포함할 수 있다. 상부 패드들(104)은 각각 대응하는 하부 패드들(106)과 전기적으로 연결될 수 있다. 또한, 기판(102)은 상면에 본딩 패드들(108)을 포함할 수 있다. 상부 패드들(104), 하부 패드들(106) 및 본딩 패드들(108)은 Al, Ti, Cr, Fe, Co, Ni, Cu, Zn, Pd, Pt, Au 및 Ag와 같은 금속을 포함할 수 있다.
도 9 및 도 10을 참조하면, 기판(102)의 상면에 댐 구조물(D)이 형성될 수 있다. 댐 구조물(D)은 포토레지스트 수지 또는 Al, Cu 등의 금속을 포함할 수 있다. 일 실시예에서, 댐 구조물(D)은 포토 레지스트 수지를 포함할 수 있다. 포토 레지스트는 예를 들어, 에폭시 수지, 아크릴계 단량체(acrylic monomer), 포스핀 옥사이드 화합물(phosphine oxide compound), 아민 화합물(amine compound), 실리카, 황산 바륨 등을 포함할 수 있다.
댐 구조물(D)은 기판(102)의 상면에 포토 레지스트 수지를 형성하고, 상기 포토레지스트 수지를 식각하여 형성될 수 있다. 일 실시예에서, 댐 구조물(D)의 높이는 18㎛ 이하 일 수 있다. 댐 구조물(D)은 상부 패드들(104)을 둘러싸도록 배치될 수 있으며, 닫힌 루프 형상을 가질 수 있다. 상부 패드들(104)은 댐 구조물(D)의 내측에 위치할 수 있으며, 본딩 패드들(108)은 댐 구조물(D)의 외측에 위치할 수 있다. 댐 구조물(D)은 협폭 댐(Da), 광폭 댐(Db) 및 협폭 댐(Da)과 광폭 댐(Db)을 연결하는 제1 연결부(Dc1) 및 제2 연결부(Dc2)를 포함할 수 있다. 예를 들어, 협폭 댐(Da) 및 광폭 댐(Db)은 ㄷ자 형상 또는 각진 C자 형상(angular C-shape)일 수 있다. 협폭 댐(Da)의 제1 단부(Da1)는 광폭 댐(Db)의 제1 단부(Db1)와 제1 연결부(Dc1)에 의해 연결될 수 있으며, 협폭 댐(Da)의 제2 단부(Da2)는 광폭 댐(Db)의 제2 단부(Db2)와 제2 연결부(Dc2)에 의해 연결될 수 있다. 일 실시예에서, 기판(102)의 측면과 협폭 댐(Da) 사이의 거리는 기판(102)의 측면과 광폭 댐(Db) 사이의 거리보다 클 수 있다.
도 11 및 도 12를 참조하면, 기판(102) 상에 하부 반도체 칩(110)이 실장될 수 있으며, 언더필(120)이 형성될 수 있다. 하부 반도체 칩(110)은 기판(102) 상에 플립칩 본딩 방식으로 실장될 수 있다. 하부 반도체 칩(110)은 직사각 형상을 가지며 제1 측면(111), 제2 측면(112), 제3 측면(113) 및 제4 측면(114)을 포함할 수 있다. 하부 반도체 칩(110)은 하면에 상부 패드들(104)과 연결되는 범프들(116)을 포함할 수 있다.
하부 반도체 칩(110)이 실장된 후, 기판(102)과 하부 반도체 칩(110) 사이를 채우는 언더필(120)이 형성될 수 있다. 일 실시예에서, 언더필(120)은 에폭시 수지를 포함할 수 있다. 언더필(120)은 댐 구조물(D)의 내측에 형성될 수 있으며, 본딩 패드들(108)을 덮지 않을 수 있다. 언더필(120)은 디스펜싱 방법을 이용하여 형성될 수 있다. 예를 들어, 언더필(120)은 디스펜서(122)로부터 하부 반도체 칩(110)의 제4 측면(114)과 댐 구조물(D) 사이에 공급될 수 있으며, 제4 측면(114)으로부터 제1 측면(111) 방향으로 기판(102)과 하부 반도체 칩(110) 사이에 채워질 수 있다.
다시 도 1, 도 2a 내지 도 2c를 참조하면, 상부 반도체 칩(130)은 하부 반도체 칩(110) 상에 배치될 수 있다. 상부 반도체 칩(130)은 기판(102)에 와이어 본딩 방식으로 실장될 수 있다. 예를 들어, 상부 반도체 칩(130)의 칩 패드(132)는 본딩 와이어(134)를 통해 본딩 패드들(108)과 연결될 수 있다. 상부 반도체 칩(130)은 접착제(136)에 의해 하부 반도체 칩(110) 상에 고정될 수 있다. 접착제(136)는 DAF(die attach film) 또는 에폭시 수지를 포함할 수 있다.
기판(102), 하부 반도체 칩(110), 상부 반도체 칩(130) 및 댐 구조물(D)을 덮도록 봉지재(140)가 형성될 수 있다. 봉지재(140)는 에폭시 또는 폴리이미드 등을 포함하는 수지일 수 있다. 예를 들면, 봉지재(140)는 비스페놀계 에폭시 수지(Bisphenol-group Epoxy Resin), 다방향족 에폭시 수지(Polycyclic Aromatic Epoxy Resin), 올소크레졸 노블락계 에폭시 수지(o-Cresol Novolac Epoxy Resin), 바이페닐계 에폭시 수지(Biphenyl-group Epoxy Resin) 또는 나프탈렌계 에폭시 수지(Naphthalene-group Epoxy Resin) 등을 포함할 수 있다.
이상, 첨부된 도면을 참조하여 본 개시에 따른 실시예들을 설명하였지만, 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자는 본 발명이 그 기술적 사상이나 필수적인 특징을 변경하지 않고서 다른 구체적인 형태로 실시될 수 있다는 것을 이해할 수 있을 것이다. 이상에서 기술한 실시예는 모든 면에서 예시적인 것이며 한정적이 아닌 것으로 이해하여야 한다.
100 : 반도체 패키지 102 : 기판
104 : 상부 패드 106 : 하부 패드
110 : 하부 반도체 칩 116 : 범프
120 : 언더필 120a : 비확장 영역
120b : 확장 영역 130 : 상부 반도체 칩
140 : 봉지재 150 : 외부 연결 단자 D : 댐 구조물 Da : 협폭 댐
Db : 광폭 댐 Dc1 : 제1 연결부
Dc2 : 제2 연결부 208 : 얼라인 마크
C : 컷-아웃

Claims (10)

  1. 상면에 본딩 패드들을 갖는 기판;
    상기 기판 상에 배치되는 하부 반도체 칩 및 상기 하부 반도체 칩 상의 적어도 하나의 상부 반도체 칩;
    상기 기판 상에 배치되며 상기 하부 반도체 칩을 둘러싸는 닫힌 루프 형상을 갖는 댐 구조물, 상기 댐 구조물은 상기 하부 반도체 칩과 상기 본딩 패드들 사이의 협폭 댐 및 상기 협폭 댐보다 큰 내부 폭을 갖는 광폭 댐을 포함하며, 및
    상기 댐 구조물의 내측에 배치되며 상기 기판과 상기 하부 반도체 칩 사이를 채우는 언더필을 포함하는 반도체 패키지.
  2. 제1항에 있어서,
    상기 하부 반도체 칩과 상기 기판은 범프들을 이용하여 전기적으로 연결되고,
    상기 상부 반도체 칩과 상기 기판은 본딩 와이어를 이용하여 전기적으로 연결되는 반도체 패키지.
  3. 제1항에 있어서,
    상면도에서, 상기 협폭 댐은 상기 하부 반도체 칩의 제1 내지 제3 측면들을 둘러싸고,
    상기 광폭 댐은 상기 하부 반도체 칩의 상기 제1, 제3 측면 및 제4 측면을 둘러싸고,
    상기 협폭 댐의 제1 단부와 상기 광폭 댐의 제1 단부를 연결하는 제1 연결부, 및
    상기 협폭 댐의 제2 단부와 상기 광폭 댐의 제2 단부를 연결하는 제2 연결부를 포함하는 반도체 패키지.
  4. 제3항에 있어서,
    상기 제1 및 제2 연결부들와 상기 본딩 패드들 사이의 거리는 50㎛ ~ 150㎛인 반도체 패키지.
  5. 제1항에 있어서,
    상기 하부 반도체 칩과 상기 협폭 댐 사이의 거리는 200㎛ ~ 400㎛인 반도체 패키지.
  6. 제1항에 있어서,
    상기 하부 반도체 칩과 상기 광폭 댐 사이의 거리는 500㎛ ~ 1000㎛인 반도체 패키지.
  7. 제1항에 있어서,
    상기 기판 상의 얼라인 마크를 더 포함하며,
    상기 댐 구조물은 상기 얼라인 마크에 대응하여 직각으로 구부러진 컷-아웃을 포함하는 반도체 패키지.
  8. 제1항에 있어서,
    상기 적어도 하나의 상부 반도체 칩은 제1 상부 반도체 칩 및 제2 상부 반도체 칩을 포함하며,
    상기 광폭 댐은 상기 제1 상부 반도체 칩과 상기 본딩 패드들 사이의 제1 협폭 댐, 제2 상부 반도체 칩과 상기 본딩 패드들 사이의 제2 협폭 댐을 포함하며, 상기 광폭 댐은 상기 제1 협폭 댐과 상기 제2 협폭 댐 사이에 배치되는 반도체 패키지.
  9. 상면에 본딩 패드들을 갖는 기판;
    상기 기판 상에 배치되는 하부 반도체 칩 및 상기 하부 반도체 칩 상의 적어도 하나의 상부 반도체 칩;
    상기 기판과 상기 하부 반도체 칩 사이를 채우는 언더필을 포함하되, 상기 언더필은 상기 하부 반도체 칩과 상기 본딩 패드들 사이의 비확장 영역 및 상기 비확장 영역보다 내부 폭이 큰 확장 영역을 포함하며, 및;
    상기 기판 상에 배치되고 상기 언더필을 둘러싸며 닫힌 루프 형상을 갖는 댐 구조물을 포함하는 반도체 패키지
  10. 제9항에 있어서,
    상기 확장 영역 및 비확장 영역은 상기 댐 구조물의 내측면에 접하는 반도체 패키지.
KR1020200012460A 2020-02-03 2020-02-03 댐 구조물을 갖는 반도체 패키지 KR102689648B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020200012460A KR102689648B1 (ko) 2020-02-03 댐 구조물을 갖는 반도체 패키지
US16/928,159 US11437293B2 (en) 2020-02-03 2020-07-14 Semiconductor packages having a dam structure
US17/883,726 US20220384291A1 (en) 2020-02-03 2022-08-09 Semiconductor packages having a dam structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020200012460A KR102689648B1 (ko) 2020-02-03 댐 구조물을 갖는 반도체 패키지

Publications (2)

Publication Number Publication Date
KR20210098659A true KR20210098659A (ko) 2021-08-11
KR102689648B1 KR102689648B1 (ko) 2024-07-30

Family

ID=

Also Published As

Publication number Publication date
US20210242101A1 (en) 2021-08-05
US11437293B2 (en) 2022-09-06
US20220384291A1 (en) 2022-12-01

Similar Documents

Publication Publication Date Title
US11121108B2 (en) Flip chip package utilizing trace bump trace interconnection
US11470720B2 (en) Opening in the pad for bonding integrated passive device in InFO package
JP4438006B2 (ja) 半導体装置及び半導体装置の製造方法
US11177200B2 (en) Pad design for reliability enhancement in packages
JP4441545B2 (ja) 半導体装置
JP2008159607A (ja) 半導体装置及びその製造方法
US11682656B2 (en) Semiconductor device package and method for manufacturing the same
KR20150047168A (ko) 반도체 패키지
US11742329B2 (en) Semiconductor package
US20210305117A1 (en) Semiconductor package having stiffener
US9105463B2 (en) Semiconductor device
KR102689648B1 (ko) 댐 구조물을 갖는 반도체 패키지
KR20210098659A (ko) 댐 구조물을 갖는 반도체 패키지
KR101162508B1 (ko) 반도체 패키지
TWI447821B (zh) 安裝基板及電子裝置
KR101096440B1 (ko) 듀얼 다이 패키지
TWI773257B (zh) 可撓性線路基板及薄膜覆晶封裝結構
JP5139400B2 (ja) 半導体装置の製造方法
JP2013030568A (ja) 半導体装置
KR101068623B1 (ko) Ｒｆｉｄ 태그칩을 위한 플립칩 본딩 구조물
KR20240036442A (ko) 반도체 패키지
TW201537713A (zh) 薄膜覆晶封裝結構
JP2007019464A (ja) 半導体装置の実装構造
KR20060107047A (ko) 휨 현상을 개선한 반도체 패키지
KR20060136148A (ko) 플립 칩 패키지

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right