KR20170056388A - Method of manufacturing heterojunction structure of hexsgonal boron nitride and graphene and thin film transistor having the heterojunction structure - Google Patents

Method of manufacturing heterojunction structure of hexsgonal boron nitride and graphene and thin film transistor having the heterojunction structure Download PDF

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KR20170056388A
KR20170056388A KR1020150160003A KR20150160003A KR20170056388A KR 20170056388 A KR20170056388 A KR 20170056388A KR 1020150160003 A KR1020150160003 A KR 1020150160003A KR 20150160003 A KR20150160003 A KR 20150160003A KR 20170056388 A KR20170056388 A KR 20170056388A
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boron nitride
graphene
substrate
heterojunction structure
hexagonal boron
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KR1020150160003A
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Korean (ko)
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이성주
장성규
전수민
윤지윤
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성균관대학교산학협력단
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Priority to KR1020150160003A priority Critical patent/KR20170056388A/en
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    • HELECTRICITY
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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/205Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1606Graphene
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    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds
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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10325Boron nitride [BN], e.g. cubic, hexagonal, nanotube

Abstract

A heterojunction structure of hexagonal boron nitride and graphene is disclosed. A method for manufacturing the heterojunction structure according to the present invention includes the steps of: disposing a hexagonal boron nitride sheet on a substrate; and growing graphene between the substrate and the hexagonal boron nitride sheet by a chemical vapor deposition (CVD) process. Accordingly, the present invention can prevent the adsorption of water molecules or heterogeneous impurities on an interface between a metal substrate and a hexagonal system.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a hetero-junction structure of hexagonal boron nitride and graphene, and a thin film transistor using the same. BACKGROUND ART < RTI ID = 0.0 >

The present invention relates to a hetero-junction structure of boron nitride and graphene, and more particularly, to a method for producing a hetero-junction structure of hexagonal boron nitride and graphene having a system free of impurities and a thin film transistor using the sheet.

A graphene is a two-dimensional structure of a plate in which carbon atoms are connected in a hexagonal shape. Graphene is excellent in transparency and conductivity and can be used for various electronic devices such as ultra-high-speed semiconductors, transparent electrodes, and high-efficiency solar cells. Most graphene device was manufactured through the transfer on the dielectric and the exposure process and the deposition of the yes such a graphene exfoliated pin or mechanical SiO 2, Al 2 O 3, HfO 2 grown by chemical vapor deposition (CVD). However, when the graphene carbon atoms are exposed to the external environment in the process of graphene device, graphene has a problem of causing serious electrical degradation such as charge mobility and hysteresis of current-voltage characteristics.

On the other hand, hexagonal boron nitride is a material having a two-dimensional structure in which a boron atom and a nitrogen atom are arranged in a hexagonal arrangement. The hexagonal boron nitride has a lattice constant similar to that of graphene and has a large band gap with optical phonon, Has attracted attention as a two-dimensional material for electronic devices. So the to ensure that the pin carbon atoms are not exposed to the external environment, graphene mechanical one hexagonal strippable was transferred onto the boron nitride sheet yes when created pins and hexagonal boron nitride hetero-junction structure, a transfer over SiO 2 Device characteristics such as charge mobility and electron-hole uniformity are improved by several tens to hundred times compared to graphene. In addition, graphene and hexagonal boron nitride were alternately transferred several times to form a heterojunction structure, and the transistor using the tunneling phenomenon obtained an excellent switching characteristic with an on-off ratio of 10,000. However, in the process of transferring graphene, carbon atoms are exposed to the outside, and impurities are adsorbed on the surface of the device by a chemical substance such as polymethyl-methacrylate (PMMA) used for transferring graphene or hexagonal boron nitride Resulting in deterioration of electrical characteristics.

It is an object of the present invention to provide a sheet having a heterojunction structure of hexagonal boron nitride and graphene, which can provide a sheet having a high quality of boron nitride and graphene having excellent electrical characteristics and free from impurities, .

Another problem to be solved by the present invention is to provide a thin film transistor using a hetero-junction structure thin film of boron nitride and graphene.

According to an aspect of the present invention, there is provided a method of manufacturing a hetero-junction structure sheet of boron nitride and graphene, comprising: disposing a hexagonal boron nitride sheet on a substrate; And growing a graphen between the substrate and the hexagonal boron nitride sheet by a chemical vapor deposition (CVD) process.

In one embodiment, the substrate may be a substrate comprising a metal, oxide or nitride comprising at least one element selected from the group consisting of copper, nickel, iron and aluminum.

In one embodiment, the chemical vapor deposition process comprises: providing a carbon source between the substrate and the hexagonal boron nitride sheet; And growing the graphene between the substrate and the hexagonal boron nitride sheet by heat treating the substrate to which the carbon source is supplied.

In one embodiment, the substrate may be provided with a groove for supplying a carbon source under the hexagonal boron nitride sheet.

In one embodiment, the graphene may comprise a single layer of carbon atoms.

In one embodiment, the chemical vapor deposition may be performed in a chamber of an inert and reducing atmosphere.

In one embodiment, the hexagonal boron nitride sheet may be formed by a mechanical stripping method.

In one embodiment, the method may further include etching the graphene using the hexagonal boron nitride sheet as a mask.

In one embodiment, etching of the graphene in the step of etching the graphene may utilize plasma etching.

The thin film transistor according to another embodiment of the present invention may include a heterogeneous junction structure of boron nitride and graphene produced according to the above embodiment as a channel layer.

The present invention as described above is a method for forming a heterojunction structure of hexagonal boron nitride and graphene on a metal substrate and particularly has an effect of preventing the adsorption of water molecules and hetero impurities on the interface between the metal substrate and the hexagonal system have.

In addition, there is an effect that a thin film having a hetero-junction structure of boron nitride and graphene having an interface of high purity and high quality can be produced.

In addition, by fabricating a thin film transistor using such a thin film as a channel layer, a thin film transistor having excellent electrical conductivity and excellent electrical characteristics can be manufactured.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an atomic force microscope (AFM) image obtained by photographing the thickness of a double junction structure sheet of hexagonal boron nitride and graphene obtained according to an embodiment of the present invention. FIG.
FIGS. 2A and 2B are graphs showing Raman spectra of the graft and hexagonal boron nitride heterostructured sheet according to the present invention. FIG. Fig.
3A is an optical microscope image and a Raman spectrum of a white square portion of an optical microscope image of a substrate on which a graft and a hexagonal boron nitride heterojunction structure sheet are deposited according to an embodiment of the present invention, An optical microscope image of the substrate on which the graphene revealed on the surface is removed by plasma etching, and a Raman spectrum of a white square portion of the optical microscope image.
4A is a view illustrating a structure of a thin film transistor using a heterojunction structure sheet according to an embodiment of the present invention as a channel layer.
4B is a graph showing a source-drain current and a gate voltage characteristic of the thin film transistor of FIG. 4A.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the invention is not intended to be limited to the particular embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings. Wherein like reference numerals refer to like elements throughout.

A method for manufacturing a heterojunction structure of boron nitride and graphene according to an embodiment of the present invention includes: disposing a hexagonal boron nitride sheet on a substrate; And growing a graphen between the substrate and the hexagonal boron nitride sheet by a chemical vapor deposition (CVD) process.

In one embodiment, the substrate may be a substrate comprising a metal, oxide or nitride comprising at least one element selected from the group consisting of copper, nickel, iron and aluminum. However, the material of the substrate is not limited as long as it can serve to grow graphene between the substrate and the hexagonal boron nitride sheet.

In one embodiment, the chemical vapor deposition process comprises: providing a carbon source between the substrate and the hexagonal boron nitride sheet; And growing the graphene between the substrate and the hexagonal boron nitride sheet by heat treating the substrate to which the carbon source is supplied.

The supply form of the carbon source may be gas or powder, and if carbon can be supplied between the substrate and the hexagonal boron nitride sheet, there is no limitation on the supply method.

In one embodiment, the substrate may be provided with a groove for supplying a carbon source under the hexagonal boron nitride sheet. In one embodiment, the grooves may be formed parallel to the substrate, but if the carbon source is supplied by the grooves to the bottom of the hexagonal boron nitride sheet so that graphene can be grown, the shape of the grooves is not limited Do not.

In one embodiment, the graphene may comprise a single layer of carbon atoms.

In one embodiment, the chemical vapor deposition may be performed in a chamber of an inert and reducing atmosphere. In one embodiment, at least one of nitrogen, argon, and helium is used as an inert gas in the chamber to form an inert atmosphere, and hydrogen gas is used as a reducing gas in the chamber to form a reducing atmosphere .

In one embodiment, the hexagonal boron nitride sheet may be formed by a mechanical stripping method. In one embodiment, the hexagonal boron nitride sheet may be directly peeled off from the metal substrate by mechanical stripping and placed on the substrate, or a sheet synthesized on another substrate through a chemical vapor deposition process may be deposited on the substrate And then transferred onto the substrate.

In one embodiment, the method may further include etching the graphene using the hexagonal boron nitride sheet as a mask. By removing the remaining graphenes except the graphene present between the hexagonal boron nitride and the substrate (for example, graphenes exposed to the outside), all the graphenes on the substrate are removed from the hexagonal boron nitride It is possible to produce a sheet having an existing double-junction structure.

In one embodiment, etching of the graphene in the step of etching the graphene may utilize plasma etching. In one embodiment, the plasma etch may be performed using oxygen gas.

The thin film transistor according to another embodiment of the present invention may include a heterogeneous junction structure of boron nitride and graphene produced according to the above embodiment as a channel layer.

Experimental results on embodiments of the present invention and their characteristics are disclosed below.

<Examples>

First, hexagonal boron nitride is mechanically removed on a SiO 2 / Si substrate. Subsequently, polymethyl methacrylate (PMAA) was coated on the SiO 2 / Si substrate on which the hexagonal boron nitride was removed, and then SiO 2 was etched using hydrofluoric acid. Thereafter, And deionized water, respectively. Subsequently, the hexagonal boron nitride was transferred onto a copper foil having a size of 2 cm x 2 cm and a thickness of 75 μm, and then the PMMA coated with acetone was removed. The copper foil to which the hexagonal boron nitride was transferred was placed in the chemical vapor deposition apparatus chamber and the temperature in the chamber was gradually raised to 1000 DEG C for 30 minutes by using an inductive heating heat source. Subsequently, H 2 gas was supplied into the chamber at a flow rate of 5 sccm at a pressure of 40 mTorr and hexagonal boron nitride in the chamber was transferred at 1000 ° C. for 40 minutes while CH 4 gas was supplied at a flow rate of 205 sccm at a pressure of 40 mTorr The copper foil was heat-treated to grow graphene between the hexagonal boron nitride and the copper foil. The impurities generated in the conventional PMMA removal process are removed by the heat treatment process. Thereafter, the chamber was cooled to room temperature to obtain a sheet having a double bonded structure of hexagonal boron nitride and graphene.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an atomic force microscope (AFM) image obtained by photographing the thickness of a double junction structure sheet of hexagonal boron nitride and graphene obtained according to an embodiment of the present invention. FIG.

Referring to Figure 1, The thickness of any mechanically exfoliated hexagonal boron nitride sheet according to embodiments of the present invention can be determined. It was confirmed that the hexagonal boron nitride sheet overall had a thickness of between 10 and 100 nm.

&Lt; Raman Spectrum Analysis of Examples >

FIGS. 2A and 2B are graphs showing Raman spectra of the graft and hexagonal boron nitride heterostructured sheet according to the present invention. FIG. Fig.

In the case of the hexagonal boron nitride 1366cm -1 appears and the unique Raman spectrum of the pick by the E2g vibration mode in the vicinity of, the pin, if yes Raman spectrum of unique by the 2D mode in the G mode, 2680cm -1 1590cm -1 vicinity near the pick . Referring to FIG. 2B, peaks of hexagonal boron nitride and graphene can be identified in regions (i), (ii), and (iii). FIG. 2C is an enlarged graph of the G mode pick of FIG. 2B, and FIG. 2D is an enlarged view of the 2D mode pick of FIG. 2B. Referring to FIG. 2C, it can be confirmed that the G-picture is formed in all the areas (i), (ii), and (iii). Referring to FIG. 2D, it can be confirmed that 2D pixels are formed in all regions (i), (ii), and (iii). In addition, the intensities of the G and 2D peaks were formed near 0.5, which means single-layer graphenes, indicating that the graphenes were normally grown. That is, it was confirmed that the sheet produced according to the embodiment of the present invention was heterogeneously bonded to hexagonal boron nitride and graphene.

<Whether graphene grows under hexagonal boron nitride>

To confirm that graphene was grown under hexagonal boron nitride, a substrate with a heterostructured sheet deposited according to an embodiment of the present invention was placed in a chamber, and oxygen gas was introduced into the chamber at a flow rate of 480 mTorr and 5 sccm A voltage of 20 W was applied for 3 seconds to plasma etch the graphene exposed on the substrate.

3A is an optical microscope image and a Raman spectrum of a white square portion of an optical microscope image of a substrate on which a graft and a hexagonal boron nitride heterojunction structure sheet are deposited according to an embodiment of the present invention, An optical microscope image of the substrate on which the graphene revealed on the surface is removed by plasma etching, and a Raman spectrum of a white square portion of the optical microscope image.

Referring to FIG. 3A, in the case of an optical microscope image, a graphene region on the left side and a hexagonal boron nitride region on the right side are photographed. In addition, Raman spectral peaks of hexagonal boron nitride and Raman spectrum peaks of graphene can be confirmed in the Raman spectrum graph.

Referring to FIG. 3B, it can be seen that graphene is not formed in the graphene region of FIG. 3A in the case of an optical microscope image. However, in the Raman spectrum graph of FIG. 3B, Raman spectrum peak of hexagonal boron nitride and graphene can be confirmed. The Raman spectral peak of graphene appeared because the graphene exposed on the substrate was removed but the graphene located under the hexagonal boron nitride was not removed.

Through this, it was confirmed that a sheet having a structure in which graphene was double-bonded onto hexagonal boron nitride was produced.

<Electrical Characteristics of Thin Film Transistor Using Heterostructure Sheet According to the Embodiment as a Channel Layer>

4A is a view illustrating a structure of a thin film transistor using a heterojunction structure sheet according to an embodiment of the present invention as a channel layer.

4B is a graph showing a source-drain current and a gate voltage characteristic of the thin film transistor of FIG. 4A.

Referring to FIG. 4A, the thin film transistor is formed by transferring the heterojunction structure sheet onto a SiO 2 substrate, plasma etching the exposed graphene on the SiO 2 substrate to form a channel layer, and depositing a metal on the channel layer To form an electrode.

Referring to FIG. 4B, characteristics similar to those of a general graphene transistor having a charge mobility of 2250 cm 2 V -1 s -1 can be confirmed.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. Accordingly, the true scope of the present invention should be determined by the following claims.

Claims (10)

Disposing a hexagonal boron nitride sheet on the substrate; And
And growing graphene between the substrate and the hexagonal boron nitride sheet by a chemical vapor deposition (CVD) process.
A method for producing a heterojunction structure of boron nitride and graphene.
The method according to claim 1,
Wherein the substrate is a substrate comprising a metal, oxide or nitride comprising at least one element selected from the group consisting of copper, nickel, iron and aluminum,
A method for producing a heterojunction structure of boron nitride and graphene.
The method according to claim 1,
In the chemical vapor deposition process,
Supplying a carbon source between the substrate and the hexagonal boron nitride sheet; And
And annealing the substrate to which the carbon source is supplied to grow the graphene between the substrate and the hexagonal boron nitride sheet.
A method for producing a heterojunction structure of boron nitride and graphene.
The method of claim 3,
Wherein the substrate is provided with a groove for supplying a carbon source under the hexagonal boron nitride sheet,
A method for producing a heterojunction structure of boron nitride and graphene.
The method of claim 3,
The graphene comprises a single layer of carbon atoms,
A method for producing a heterojunction structure of boron nitride and graphene.
The method of claim 3,
Wherein the chemical vapor deposition is performed in a chamber of an inert and reducing atmosphere,
A method for producing a heterojunction structure of boron nitride and graphene.
The method according to claim 6,
The hexagonal boron nitride sheet is formed by a mechanical peeling method,
A method for producing a heterojunction structure of boron nitride and graphene.
The method according to claim 6,
And etching the graphene using the hexagonal boron nitride sheet as a mask.
A method for producing a heterojunction structure of boron nitride and graphene.
9. The method of claim 8,
In the step of etching the graphene,
The etching of graphene is performed using a plasma etching,
A method for producing a heterojunction structure of boron nitride and graphene.
9. A method of manufacturing a semiconductor device comprising a channel layer comprising a heterojunction structure of boron nitride and graphene according to any one of claims 1 to 8,
Thin film transistor.
KR1020150160003A 2015-11-13 2015-11-13 Method of manufacturing heterojunction structure of hexsgonal boron nitride and graphene and thin film transistor having the heterojunction structure KR20170056388A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110451498A (en) * 2019-09-09 2019-11-15 吉林大学 A kind of graphene-boron nitride nanosheet composite construction and preparation method thereof
CN110510604A (en) * 2019-09-09 2019-11-29 吉林大学 A kind of graphene/boron nitride stratiform heterojunction structure and preparation method thereof
CN114597560A (en) * 2022-02-28 2022-06-07 陕西科技大学 Graphene/boron nitride aerogel and preparation method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110451498A (en) * 2019-09-09 2019-11-15 吉林大学 A kind of graphene-boron nitride nanosheet composite construction and preparation method thereof
CN110510604A (en) * 2019-09-09 2019-11-29 吉林大学 A kind of graphene/boron nitride stratiform heterojunction structure and preparation method thereof
CN110510604B (en) * 2019-09-09 2022-11-18 吉林大学 Graphene/boron nitride layered heterostructure and preparation method thereof
CN114597560A (en) * 2022-02-28 2022-06-07 陕西科技大学 Graphene/boron nitride aerogel and preparation method thereof

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