KR20170011710A - Semiconductor device, and method for forming the silicon insulation layer of the same - Google Patents

Semiconductor device, and method for forming the silicon insulation layer of the same Download PDF

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KR20170011710A
KR20170011710A KR1020150104838A KR20150104838A KR20170011710A KR 20170011710 A KR20170011710 A KR 20170011710A KR 1020150104838 A KR1020150104838 A KR 1020150104838A KR 20150104838 A KR20150104838 A KR 20150104838A KR 20170011710 A KR20170011710 A KR 20170011710A
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South Korea
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insulating film
thin film
trench
silicon
silicon insulating
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KR1020150104838A
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Korean (ko)
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이상두
김정미
민철홍
신승철
심재용
유진혁
윤상민
이동엽
이민수
조연식
천민호
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주성엔지니어링(주)
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Priority to KR1020150104838A priority Critical patent/KR20170011710A/en
Publication of KR20170011710A publication Critical patent/KR20170011710A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
    • H01L29/7846—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the lateral device isolation region, e.g. STI

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)

Abstract

An embodiment of the present invention relates to a semiconductor device and a method of forming a silicon insulating film which can be formed without voids in the formation of an insulating film on a trench-formed semiconductor substrate and can prevent the insulating film from being easily etched by a acid-based chemical solution. According to an embodiment of the present invention, there is provided a method of forming a silicon insulation film, comprising: a first step of forming a silicon insulation film on a substrate on which a trench is formed by supplying a silicon-containing gas and an oxygen gas or nitrogen gas; A second step of post-treating the silicon insulating film by supplying a carbon-containing gas; And a third step of repeating the first step and the second step.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of forming a silicon insulating film,

An embodiment of the present invention relates to a semiconductor device and a method of forming a silicon insulating film thereon.

As the degree of integration of semiconductor elements is improved, the line widths and spacing of the elements of the semiconductor elements are becoming finer. For example, the line width and spacing of the metal wiring constituting the semiconductor element are becoming finer and the width and the interval of the element separating film are gradually becoming finer. Therefore, instead of the conventional LOCOS (LOCal Oxidation Silicon) process, an STI (Shallow Trench Isolation) technique in which a narrow and deep trench is formed in a semiconductor substrate and a gap fill is performed using an insulating material is mainly used for the device isolation film have.

The gap fill process is a process of sequentially depositing an insulating film from the bottom surface of the trench to fill the trench with an insulating film. However, due to an overhang phenomenon caused by simultaneously depositing an insulating film on the bottom surface of the trench as well as on the entrance or the side wall, the upper portion of the trench is clogged and voids or gaps are formed in the trench before the trench is completely capped. May occur. These voids occur more frequently as the aspect ratio of the trench becomes larger, and voids cause degradation of the characteristics of the device. Therefore, it can be said that suppressing the generation of voids in the trench-gapfil process is one of the important process targets.

Since the gapfil process is a kind of deposition process, chemical vapor deposition (hereinafter referred to as "CVD") is mainly used. As the degree of integration of semiconductor devices increases and the aspect ratio of trenches increases, . Therefore, in recent years, trenches have been gap-filled with HDPCVD (High Density Plasma Chemical Vapor Deposition) (hereinafter referred to as HDPCVD) using a high density plasma (HDP) It is known as a key element of the gapfil process.

However, the HDPCVD method also has a limitation in the ability of the gap fill function due to the high integration of semiconductor devices. That is, even if the trench gapfilm process is performed using the HDPCVD method while the width of the trench is narrow (for example, 60 nm or less), overhang occurs at the trench entrance, thereby causing voids in the trench.

In order to overcome the above problem, a DED (Dep / Etch / Dep) process for repeating deposition and etching of an insulating film using HDPCVD equipment has been proposed. The DED process is a process of etching the overhang generated in the HDPCVD process and again depositing the HDPCVD process. In order to effectively perform the DED process, both deposition uniformity and etching uniformity must be satisfied. Particularly, when the etching uniformity is poor, the opening size is different from each other, so that some portions satisfy the gap fill and some portions do not satisfy the gap fill. In addition, if the space to be captured becomes smaller, it is often impossible to perform the DED process in the three-step process, so that the process needs to be performed in five or more steps.

Silicon insulating films are mainly used as insulating films of semiconductor devices. Since silicon insulating films are easily etched in acid-based chemical solutions, it is difficult to control the thickness of insulating films in the etching process. Therefore, when the silicon insulating film is wet-wetted with an acid-based chemical solution, the insulating film may penetrate and fail to function as an insulating film.

An embodiment of the present invention provides a semiconductor device and a method of forming a silicon insulating film that can be formed without voids in forming an insulating film on a trench-formed semiconductor substrate and can prevent the insulating film from being easily etched by a acid-based chemical solution.

According to an embodiment of the present invention, there is provided a method of forming a silicon insulation film, comprising: a first step of forming a silicon insulation film on a substrate on which a trench is formed by supplying a silicon-containing gas and an oxygen gas or nitrogen gas; A second step of post-treating the silicon insulating film by supplying a carbon-containing gas; And a third step of repeating the first step and the second step.

The thickness of the silicon insulating film in the first step is 0.1 to 10 Å.

And further supplying a silicon-containing gas onto the silicon insulating film between the first step and the second step.

In the first step, when the silicon containing gas and the oxygen gas are supplied, the silicon insulating film is a silicon oxide film. When the silicon containing gas and the nitrogen gas are supplied, the silicon insulating film is a silicon nitride film.

The post-treatment is characterized by treatment with plasma or heat.

The second step is characterized in that the number of Si-C bonds in the silicon insulating film increases as the plasma density increases, the concentration of the carbon-containing gas increases, the pressure increases, or the treatment time increases do.

The third step is characterized in that the number of Si-C bonds in the silicon insulating film increases as the plasma density increases, the concentration of the carbon-containing gas increases, the pressure increases, or the treatment time increases do.

A semiconductor device according to an embodiment of the present invention includes a substrate on which a trench is formed; And a silicon insulating film formed on the substrate on which the trench is formed, wherein the number of Si-C bonds in the silicon insulating film is greater than the number of Si-O bonds.

And the number of Si-C bonds in the silicon oxide film formed in the trench is greater than the number of Si-C bonds formed in the remaining substrate except for the trench.

And the silicon insulating film is repeatedly formed N times (N is a positive integer) times.

According to another aspect of the present invention, there is provided a semiconductor device comprising: a substrate on which a trench is formed; And a first silicon insulating film formed on the substrate on which the trench is formed; And a second silicon insulating film formed on the first silicon insulating film, wherein the first silicon insulating film is made of Si-O bonds, and the second silicon insulating film is made of Si-C bonds and Si-O bonds .

The first and second silicon insulating films are repeatedly formed N times (N is a positive integer) times.

In an embodiment of the present invention, after depositing a silicon insulating film, a carbon-containing gas is sprayed and plasma-treated to form a thin film having Si-C bonds on the silicon insulating film, or a silicon insulating film is formed as a thin film having Si-C bond. As a result, the embodiment of the present invention can prevent the silicon insulating film from being easily etched by the acid-based chemical solution due to the thin film having the Si-C bond.

Further, the embodiment of the present invention can improve the number of Si-C bonds in the SiOC film in the trench by increasing the concentration of the carbon-containing gas in the trench of the semiconductor substrate, increasing the plasma density, increasing the pressure, Can be made larger than the number of Si-C bonds of the SiOC thin film formed on the remaining substrates except for the trench. Therefore, the embodiment of the present invention can lower the deposition rate of the silicon insulating film formed on the SiOC thin film in the trench of the semiconductor substrate. As a result, embodiments of the present invention can prevent formation of voids due to overhang in the trenches of the semiconductor substrate.

FIGS. 1A to 1C are illustrations for explaining overhangs and voids in forming a thin film on a semiconductor substrate on which a trench is formed; FIG.
2 is an exemplary view showing a deposition apparatus for forming an insulating film according to an embodiment of the present invention.
3 is a flow chart showing a method of forming an insulating film according to the first embodiment of the present invention.
4A to 4E are views illustrating an insulating film of a semiconductor device according to a first embodiment of the present invention.
5 is a flow chart showing a method of forming an insulating film according to a second embodiment of the present invention.
6A to 6F illustrate an insulating film according to a second embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited thereto. Like reference numerals refer to like elements throughout the specification. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. In the case where the word 'includes', 'having', 'done', etc. are used in this specification, other parts can be added unless '~ only' is used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is not used, one or more other portions may be located between the two portions.

In the case of a description of a temporal relationship, for example, if the temporal relationship is described by 'after', 'after', 'after', 'before', etc., May not be continuous unless they are not used.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other, partially or wholly, technically various interlocking and driving, and that the embodiments may be practiced independently of each other, It is possible.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

1A to 1C are illustrations for explaining voids in forming a thin film on a semiconductor substrate on which a trench is formed. Referring to Figs. 1A to 1C, the trench T represents a recessed region which is recessed in the case where one surface of the semiconductor substrate S is formed in a concave-convex shape. A process of depositing an insulating film sequentially from the bottom surface of the trench T and filling the trench T with an insulating film is called a gap fill process.

The thin film thickness 10 of the region where the trench T is not formed and the thickness of the thin film formed on the sidewall of the trench T in the tapping process for forming the thin film of the insulating film or the like on the semiconductor substrate S on which the trench T is formed The thin film layer 20 formed on the bottom surface of the trench T and the thin film thickness 30 formed on the bottom surface of the trench T are formed substantially the same as in FIG. 1B, the thickness of the thin film 20 formed on the sidewall of the trench T and the bottom surface of the trench T are smaller than the thickness of the trench T in the region where the trench T is not formed, There is a problem in that the thin film thickness 30 formed on the substrate becomes thick. This is called overhang. In this case, if the width of the trench T is narrow and the depth to the bottom is deeper as shown in FIG. 1C, an overhang due to the thin films formed on the sidewalls of the trench T causes the upper portion of the trench T A void (or a gap) may be formed inside the trench T. The voids cause degradation of the characteristics of the semiconductor device.

Hereinafter, a method of forming a semiconductor device and an insulating film thereof according to an embodiment of the present invention, which can form an insulating film without a problem due to overhang and void even when the width of the trench T is narrow and the depth to the bottom is deep, will be described in detail .

2 is an exemplary view showing a substrate processing apparatus for forming an insulating film according to an embodiment of the present invention. In FIG. 2, the substrate processing apparatus 100 is illustrated for convenience of explanation, but it should be noted that the present invention is not limited thereto.

The substrate processing apparatus 100 of the present invention includes a chamber 110 including a substrate table 120, a gas shower head 130, a chamber lid 140, and a substrate entrance 150.

A substrate placing table 120 for holding a substrate 200 is installed inside the chamber 110. A chamber lid 140 for covering the chamber 110 and a gas showerhead 130 for spraying gas to the upper portion of the substrate pedestal 120 are installed on the upper portion of the chamber 110. An exhaust port (not shown) for exhausting the residual material may be further provided in the lower portion of the chamber 110. A substrate inlet 150 for transferring the substrate 200 into or out of the chamber 100 may be provided on one side of the chamber 110.

The gas showerhead 130 injects the process gas into the chamber 110. The plurality of gas showerheads 130 may each inject different gases. For example, one of the gas showerheads 130 may inject a first gas into the reaction space of the chamber 110, and the other may inject a second gas into the reaction space of the chamber 110. The gas showerhead 130 may be connected to a tank for storing the process gas and a gas supply unit for supplying the gas into the chamber 110. Although two gas showerheads 130 are illustrated in FIG. 2 for convenience of description, the number of gas showerheads 130 is not limited thereto.

3 is a flowchart illustrating a method of forming a silicon insulating film according to a first embodiment of the present invention. 4A to 4E are views showing an example of a silicon insulating film of a semiconductor device according to a first embodiment of the present invention. Hereinafter, a silicon insulating film of a semiconductor device and a method of forming the same according to a first embodiment of the present invention will be described in detail with reference to FIG. 3 and FIGS. 4A to 4E.

First, the semiconductor substrate 1000 on which the trench T is formed is placed on the substrate table 120 of the substrate processing apparatus 100 of FIG. After the semiconductor substrate 1000 is placed on the substrate table 120, the temperature inside the chamber 110 is raised to the process temperature. Subsequently, a material for forming a silicon insulating film is sprayed onto the substrate 1000 through the gas showerhead 130. For example, silane (SiH 4 ) corresponding to a silicon-containing gas is injected as a source gas and oxygen (O 2 ) or ozone (O 3 ) is supplied as a reaction gas onto the substrate 1000 through a gas showerhead 130 As shown in FIG. In this case, a SiO 2 thin film 1100 corresponding to a silicon oxide film may be formed on the substrate 1000 as shown in FIG. 4A. As another example, silane (SiH 4 ) corresponding to a silicon-containing gas may be injected as a source gas, and nitrogen (N 2 ) may be injected as a reaction gas onto the substrate 1000 through a gas showerhead 130. In this case, a SiNx thin film 1100 corresponding to a silicon nitride film may be formed on the substrate 1000. Meanwhile, in the embodiment of the present invention, a SiO 2 thin film 1100 is illustrated as an example of a silicon insulating film for convenience of explanation. The SiO 2 thin film 1100 is preferably formed to a thickness of 0.1 Å to 10 Å. (S101 in Fig. 3)

Secondly, the carbon-containing gas is injected onto the SiO 2 thin film 1100 through the gas showerhead 130. The carbon-containing gas may be a gas containing an organic compound. SiO 2 thin film 1100 as shown in Figure 4b when the plasma treatment (plasma treatment) to the SiO 2 thin film 1100 in which the carbon-containing gas (G1) in the injection state, SiO combination of SiO 2 thin film 1100 And the carbon molecule C on the carbon-containing gas G1 forms a Si-C bond. That is, the SiO 2 thin film 1100 is doped with carbon, thereby forming the SiOC thin film 1200.

In particular, SiO 2 thin film 1100 to about 0.1Å are formed as thin as 10Å, SiO 2 thin film in which the carbon-containing gas (G1) on the SiO 2 thin film 1100 as shown in Figure 4b injection state (1100 The SiOC film 1200 is formed as shown in FIG. 4C because a Si-C bond, that is, carbon doping is performed on the entire SiO 2 thin film 1100. The thickness d2 of the SiOC thin film 1200 becomes thinner than the thickness d1 of the SiO 2 thin film 1100 because the SiOC thin film 1200 is hardened due to carbon doping.

FIG. 4D is an enlarged view of a trench shown in FIG. 4C. Referring to FIG. 4D, the SiOC thin film 1200 in the region where the trench T is not formed is exposed to the SiOC thin film 1200 formed on the sidewalls or the bottom surface of the trench T, so that the plasma treatment )do. The thickness 10 of the SiOC thin film 1200 in the region where the trench T is not formed is larger than the thickness 20 of the SiOC thin film 1200 formed on the side wall of the trench T and the thickness 20 of the bottom surface of the trench T (20) of the SiOC thin film (1200) formed on the substrate. Therefore, when the SiOC thin film 1200 is repetitively deposited and plasma-treated as in step S103, the occurrence of voids in FIGS. 1B and 1C can be reduced.

Since the SiOC thin film 1200 has hydrophobicity, the SiOC thin film 1200 is not easily etched into the acid-based chemical solution as compared with the SiO 2 thin film 1100. Accordingly, the first embodiment of the present invention can prevent the SiO 2 thin film 1100 from being easily etched by the acid-based chemical solution due to the SiOC thin film 1200. (S102 in Fig. 3)

Third, a silicon insulating film including N SiOC thin films 1200 can be formed by repeating steps S101 and S102 for N (N is a positive integer) number of times. For example, as shown in FIG. 4E, the SiOC thin film 1200 can be formed on the SiOC thin film 1200 according to steps S101 and S102. In FIG. 4E, steps S101 and S102 are repeated twice for convenience of explanation. (S103 in Fig. 3)

On the other hand, when the SiO 2 thin film 1100 is formed on the SiOC thin film 1200 and the SiO 2 thin film 1100 is formed on the SiO 2 thin film 1100 due to Si-C bonding of the SiOC thin film 1200 The deposition rate of the SiO 2 thin film 1100 is lower. Specifically, as the number of Si-C bonds in the SiOC thin film 1200 increases, the Si-O bonds on the SiO 2 thin film 1100 deposited on the SiOC thin film 1200 are disturbed, 2 thin film 1100 is lowered.

The number of Si-C bonds in the SiOC thin film 1200 can be adjusted depending on the concentration of the carbon-containing gas (G1), the plasma density, the pressure, and the treatment time. For example, as the concentration of the carbon-containing gas (G1) is increased, the plasma density is increased, the pressure is increased, or the treatment time is increased, the number of Si-C bonds in the SiOC thin film 1200 increases. When the concentration of the carbon-containing gas G1, the plasma density, the pressure, or the treatment time can be controlled by the position of the semiconductor substrate 1000, the number of Si-C bonds in the SiOC film 1200 can be controlled by position . The number of Si-C bonds in the SiOC thin film 1200 indicates the carbon doping concentration.

1A to 1C, a void is formed due to an overhang in the trench T of the semiconductor substrate 1000, so that the SiOC thin film 1200 (in the trench T of the semiconductor substrate 1000) It is preferable to lower the deposition rate of the SiO 2 thin film 1100. The first embodiment of the present invention is a method of increasing the concentration of the carbon-containing gas G1, increasing the plasma density, increasing the pressure, or increasing the density of the trench T in the trench T of the semiconductor substrate 1000, The number of Si-C bonds of the SiOC thin film 1200 formed in the trench T is increased to the number of Si-C bonds of the SiOC thin film 1200 formed in the remaining substrate 1000 except for the trench T, You can do more. Thus, the first embodiment of the present invention can lower the deposition rate of the SiO 2 thin film 1100 formed on the SiOC thin film 1200 in the trench T of the semiconductor substrate 1000. As a result, the first embodiment of the present invention can prevent a void from being formed due to overhang in the trench T of the semiconductor substrate 1000.

5 is a flowchart illustrating an insulating film forming method according to a second embodiment of the present invention. 6A to 6F are views showing an insulating film according to a second embodiment of the present invention. Hereinafter, an insulating film of a semiconductor device and a method of forming the same according to a second embodiment of the present invention, specifically, a method of forming a silicon insulating film on the semiconductor substrate 3000 will be described in detail with reference to FIGS. 5 and 6A to 6F .

First, the step S201 of FIG. 5 is substantially the same as that described in the step S101 of FIG. 3, so that detailed description thereof will be omitted. (S201 in Fig. 7)

Secondly, silane (SiH 4 ) corresponding to the silicon containing gas is further injected through the gas showerhead 130 to form the SiO 2 thin film 3200 on the SiO 2 thin film 3100. In this case, Si molecule may be a SiO thin film 3200 is formed as shown in Figure 6b formed on it in combination with molecular oxygen (O) of the SiO 2 thin film (3100), SiO 2 thin film (3100). (S202 in Fig. 7)

Third, the carbon-containing gas is injected onto the SiO 2 thin film 3200 through the gas showerhead 130. The carbon-containing gas may be a gas containing an organic compound. Plasma treatment is performed on the SiO 2 thin film 3200 in the state where the carbon containing gas G2 is sprayed on the SiO 2 thin film 3200 as shown in FIG. (O) is separated, and the carbon molecule (C) on the carbon-containing gas (G3) forms a Si-C bond. That is, carbon is doped on the SiO 2 thin film 3200, whereby the SiOC thin film 3300 is formed on the SiO 2 thin film 3100.

Particularly, since the SiO 2 thin film 3200 is formed to have a thin thickness of 0.1 Å to 10 Å, the SiO 2 thin film 3200 is irradiated with a plasma with a carbon-containing gas G2 sprayed on the SiO 2 thin film 3200, When plasma treatment is performed, the Si-C bond, that is, the carbon doping is performed in the entire SiO 2 thin film 3200, so that the SiOC thin film 3300 is formed as shown in FIG. 6D. The thickness d4 of the SiOC thin film 3300 is thinner than the thickness d3 of the SiO thin film 3200 because the SiOC thin film 3300 is hardened due to carbon doping.

FIG. 6E is an enlarged view of a trench shown in FIG. 6C. 6E, since the SiOC thin film 3300 in the region where the trench T is not formed is exposed to the SiOC thin film 3300 formed on the sidewall or the bottom surface of the trench T, the plasma treatment )do. The thickness 10 of the SiO 2 thin film 3100 and the SiOC thin film 3300 in the region where the trench T is not formed is larger than the thickness of the SiO 2 thin film 3100 and the SiOC thin film 3300 Of the SiOC thin film 3300 and the thickness 20 of the SiO 2 thin film 3100 and the SiOC thin film 3300 formed on the bottom surface of the trench T, respectively. Therefore, when the SiO 2 thin film 3100 and the SiOC thin film 3300 are repeatedly deposited and plasma-treated as in the step S203, it is possible to reduce the occurrence of voids in FIGS. 1B and 1C.

Since the SiOC thin film 3300 has hydrophobicity, the SiOC thin film 3300 according to the second embodiment of the present invention is not easily etched with acidic chemical solution as compared with the SiO 2 thin film 3100. Therefore, the second embodiment of the present invention can prevent the SiOC thin film 3300 from being easily etched by the acid-based chemical solution. (S203 in Fig. 7)

Fourth, the steps S201 to S203 may be repeated N times to form the N SiO 2 thin film 3100 and the SiOC thin film 3300. For example, the SiO 2 thin film 3100 and the SiOC thin film 3300 can be formed on the SiOC thin film 3300 according to steps S201 to S203 as shown in FIG. 6F. In FIG. 6E, steps S201 to S203 are repeated twice for convenience of explanation. (S204 in Fig. 7)

On the other hand, when the SiO 2 thin film 3100 is formed on the SiOC thin film 3300, the deposition rate is higher than that when the SiO 2 thin film 3100 is formed on the silicon oxide thin film due to the Si-C bond 3300a formed on the SiOC thin film 3300. [ Is low. That is, the deposition rate of the SiO 2 thin film 3100 formed on the SiOC thin film 3300 decreases as the number of the Si-C bonds 3300a of the SiOC thin film 3300 increases.

1A to 1C, a void is formed due to overhang in the trench T of the semiconductor substrate 3000, so that the SiOC thin film 3300 in the trench T of the semiconductor substrate 3000 It is preferable to lower the deposition rate of the SiO 2 thin film 3100. The second embodiment of the present invention can reduce the deposition rate of the SiO 2 thin film 3100 due to the Si-C bond 3300a formed on the upper portion of the SiOC thin film 3300 formed in the trench T of the semiconductor substrate 3000 have. As a result, the second embodiment of the present invention can prevent a void from being formed due to overhang in the trench T of the semiconductor substrate 3000.

Although the embodiments of the present invention have been described in detail with reference to the accompanying drawings, it is to be understood that the present invention is not limited to those embodiments and various changes and modifications may be made without departing from the scope of the present invention. . Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, it should be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of protection of the present invention should be construed according to the claims, and all technical ideas within the scope of equivalents should be interpreted as being included in the scope of the present invention.

1000, 2000, 3000: semiconductor substrate
1100, 2100, 3100: SiO 2 thin film
1200, 2200, 3300: SiOC thin film
3200: SiO thin film
3400: SiC thin film
T: Trench

Claims (12)

A first step of supplying a silicon-containing gas and an oxygen gas or a nitrogen gas to form a silicon insulating film on a substrate on which a trench is formed;
A second step of post-treating the silicon insulating film by supplying a carbon-containing gas; And
And a third step of repeating the first step and the second step. The method according to claim 1,
Wherein the silicon insulating film in the first step has a thickness of 0.1 to 10 ANGSTROM. The method according to claim 1,
Further comprising supplying a silicon-containing gas onto the silicon insulating film between the first step and the second step. The method according to claim 1,
In the first step, when the silicon containing gas and the oxygen gas are supplied, the silicon insulating film is a silicon oxide film. When the silicon containing gas and the nitrogen gas are supplied, the silicon insulating film is a silicon nitride film. A method of forming an insulating film. The method according to claim 1,
Wherein the post-treatment is performed with plasma or heat. The method according to claim 1,
The second step comprises:
Wherein the number of the Si-C bonds in the silicon insulating film increases as the plasma density increases, the concentration of the carbon-containing gas increases, the pressure increases, or the treatment time increases. The method of claim 3,
In the third step,
Wherein the number of the Si-C bonds in the silicon insulating film increases as the plasma density increases, the concentration of the carbon-containing gas increases, the pressure increases, or the treatment time increases. A substrate on which a trench is formed; And
And a silicon insulating film formed on the substrate on which the trench is formed,
Wherein the number of Si-C bonds in the silicon insulating film is larger than the number of Si-O bonds. 9. The method of claim 8,
And the number of Si-C bonds in the silicon insulating film formed in the trench is greater than the number of Si-C bonds formed in the remaining substrate except for the trench. 9. The method of claim 8,
Wherein the silicon insulating film is repeatedly formed N times (where N is a positive integer). A substrate on which a trench is formed; And
A first silicon insulating film formed on the substrate on which the trench is formed; And
And a second silicon insulating film formed on the first silicon insulating film,
Wherein the first silicon insulating film is made of Si-O bonds, and the second silicon insulating film is made of Si-C bonds and Si-O bonds. 12. The method of claim 11,
Wherein the first and second silicon insulating films are repeatedly formed N times (N is a positive integer) times.
KR1020150104838A 2015-07-24 2015-07-24 Semiconductor device, and method for forming the silicon insulation layer of the same KR20170011710A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190017324A (en) * 2017-08-11 2019-02-20 한양대학교 산학협력단 Method for manufacturing insulation film, insulation film using same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190017324A (en) * 2017-08-11 2019-02-20 한양대학교 산학협력단 Method for manufacturing insulation film, insulation film using same

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