KR20150109143A - Light emitting device having buffer layer and method of fabricating the same - Google Patents

Light emitting device having buffer layer and method of fabricating the same Download PDF

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KR20150109143A
KR20150109143A KR1020140032223A KR20140032223A KR20150109143A KR 20150109143 A KR20150109143 A KR 20150109143A KR 1020140032223 A KR1020140032223 A KR 1020140032223A KR 20140032223 A KR20140032223 A KR 20140032223A KR 20150109143 A KR20150109143 A KR 20150109143A
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layer
buffer structure
light emitting
emitting element
conductive type
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KR1020140032223A
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Korean (ko)
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서덕일
김경완
윤여진
우상원
김지혜
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서울바이오시스 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2011—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate the substrate being of crystalline insulating material, e.g. sapphire

Abstract

A light emitting device according to one embodiment comprises a buffer structure having an oxide silicon layer and a nitride aluminum layer which are alternately stacked each other. In addition, the light emitting device comprises a first conductive nitride semiconductor layer, an active layer, and a second conductive nitride semiconductor layer which are sequentially arranged on the buffer structure. The nitride aluminum layer of the buffer structure contacts the first conductive nitride semiconductor layer.

Description

FIELD OF THE INVENTION [0001] The present invention relates to a light emitting device having a buffer structure and a fabrication method thereof,

Disclosure of the Invention The disclosure relates to a light emitting device, and more particularly, to a light emitting device having a buffer structure for increasing light extraction efficiency and a method of manufacturing the same.

Generally, the light emitting element is an element including an n-type semiconductor layer, a p-type semiconductor layer, and an active layer located between the n-type and p-type semiconductor layers. When a forward electric field is applied to the n-type and p-type semiconductor layers, electrons and holes are injected into the active layer, and holes injected into the active layer are recombined to emit light.

The efficiency of such a light emitting device is determined by the internal quantum efficiency and the light extraction efficiency which is the external quantum efficiency. To increase the light extraction efficiency, a method of forming a concave-convex pattern on a substrate such as a PSS (Patterned Sapphire Substrate) and then growing a semiconductor layer on the concave-convex pattern has been proposed. The PSS scatters light incident on the substrate and prevents light from being emitted through the substrate.

Recently, a technique has been proposed in which a dispersion type Bragg reflector layer for alternately stacking two kinds of materials having different refractive indexes is applied to the inside of the light emitting device. The scattered Bragg reflection layer may be configured to reflect light of a specific wavelength depending on physical properties of the two kinds of materials constituting the scattered Bragg reflection layer. In the case where the active layer emits light of the specific wavelength, the reflectance of the light is increased by using the dispersed Bragg reflection layer, thereby increasing the light emission efficiency to the outside. As an example of a recent technology for applying a distributed Bragg reflector layer to light of a specific wavelength, there is a technique disclosed in Korean Patent Laid-Open Publication No. 2014-0008093.

Embodiments of the present invention provide a structure of a light emitting device having a function of increasing light emitting efficiency from inside of a light emitting device and capable of epitaxial growth of a nitride semiconductor layer and a method of manufacturing the same.

A light emitting device according to an aspect of the present invention is disclosed. The light emitting device includes a buffer structure including a silicon oxide layer and an aluminum nitride layer that are alternately stacked with each other. In addition, the light emitting device includes a first conductive type nitride semiconductor layer, an active layer, and a second conductive type nitride semiconductor layer sequentially disposed on the buffer structure. At this time, the upper layer of the buffer structure is the aluminum nitride layer.

A light emitting device according to another aspect of the present invention is disclosed. The light emitting device includes a buffer structure including a substrate and a silicon oxide layer and an aluminum nitride layer alternately stacked on the substrate, and having a dispersed Bragg reflection layer. In addition, the light emitting device includes a first conductive type gallium nitride layer, an active layer, and a second conductive type gallium nitride layer sequentially disposed on the buffer structure. At this time, the buffer structure functions as a complete layer between the substrate and the first conductive type gallium nitride layer.

A manufacturing method of a light emitting device according to another aspect of the present invention is disclosed. In the method of manufacturing the light emitting device, first, a substrate is prepared. A buffer structure is formed that includes a silicon oxide layer and an aluminum nitride layer alternately stacked on the substrate. The first conductive type nitride semiconductor layer, the active layer, and the second conductive type nitride semiconductor layer are sequentially stacked on the buffer structure. At this time, the aluminum nitride layer of the buffer structure and the first conductive type nitride semiconductor layer are formed to be in contact with each other.

According to one embodiment of the present disclosure, a buffer structure including a silicon oxide layer and an aluminum nitride layer may be included. The buffer structure has a high reflectivity for light in a wavelength range of about 400 to about 800 nm in the visible light region and enhances the light extraction efficiency of the light emitting device by accelerating reflection toward the light emitting surface with respect to incident light .

The buffer structure may be configured such that the aluminum nitride layer is in contact with the first conductive type nitride semiconductor layer at an interface with the first conductive type nitride semiconductor layer. As a result, the first conductive type nitride semiconductor layer can be easily epitaxially grown on the aluminum nitride layer.

1 is a cross-sectional view schematically showing a light emitting device according to an embodiment of the present invention.
2 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention.
3 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention.
4 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention.
5 is a graph illustrating the reflectivity of a buffer structure according to an embodiment of the present invention.
6 is a flowchart schematically showing a method of manufacturing a light emitting device according to an embodiment of the present invention.

Embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. However, the techniques disclosed in this disclosure are not limited to the embodiments described herein but may be embodied in other forms. In the drawings, the width, thickness, and the like of the components are enlarged in order to clearly illustrate the components of each device.

Where an element is referred to herein as being located on another element "above" or "below", it is to be understood that the element is directly on the other element "above" or "below" It means that it can be intervened. In this specification, the terms 'upper' and 'lower' are relative concepts set at the observer's viewpoint. When the viewer's viewpoint is changed, 'upper' may mean 'lower', and 'lower' It may mean.

Like numbers refer to like elements throughout the several views. It is to be understood that the singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise, and the terms "comprise" Or combinations thereof, and does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

1 is a cross-sectional view schematically showing a light emitting device according to an embodiment of the present invention. Referring to FIG. 1, a light emitting device 100 includes a buffer structure 120 disposed on a substrate 110. The light emitting device 100 includes a first conductive type nitride semiconductor layer 130, an active layer 140, and a second conductive type nitride semiconductor layer 150 sequentially disposed on the buffer structure 120.

The substrate 110 may be, for example, a sapphire substrate, a silicon carbide (SiC) substrate, a GaN, an AlN substrate, a silicon substrate, or the like, but the present invention is not limited thereto. A variety of other types of substrates can be applied.

The buffer structure 120 includes a silicon oxide layer and an aluminum nitride layer that are alternately stacked together. The upper layer 120 of the buffer structure may be the aluminum nitride layer. The silicon oxide layer may have a refractive index of about 1.48 and the aluminum nitride layer may have a refractive index of about 2.18. In a specific embodiment, the buffer structure 120 may be a structure in which a unit laminate including the silicon oxide layer and the aluminum nitride layer is laminated in a multilayer structure. As an example, the unit stack may have a thickness of about 80 to 90 nm, and the buffer structure 120 may be a stack of about 10 to 100 unit stacks.

The buffer structure 120 includes a distributed Bragg reflection (DBR) that reflects light incident on the buffer structure 120. The scattered Bragg reflection layer may correspond to the at least one pair of the unit laminate.

As a specific example, in the buffer structure 120, when the unit stack having a thickness of about 80 to 90 nm is laminated from about 10 to 100 layers, the buffer structure 120 may have a wavelength range of 400 nm to 800 nm It is possible to perform the function of the Bragg reflection layer having a reflectance of at least 90% or more with respect to the light of the Bragg reflection layer. Conventionally, a technique related to a scattered Bragg reflection layer having a high reflectance for a certain specific wavelength has been disclosed, while in the case of this embodiment, it is possible to provide a scattered Bragg reflection layer having a high reflectance over the entire region of visible light have. 1, the buffer structure 120 reflects light 145 emitted in a downward direction from the active layer 140 and reflects the light emitting efficiency of the light emitting device 100 through the upward light emitting surface .

The buffer structure 120 may function to relax the stress caused by the difference in lattice constant between the substrate 110 and the first conductive type nitride semiconductor layer 130. At this time, the silicon oxide layer of the buffer structure 120 may have an amorphous structure, and the aluminum nitride layer may have a crystalline structure such as a polycrystal.

In one embodiment, the buffer structure 120 may be configured such that the aluminum nitride layer is disposed as the top layer. The aluminum nitride layer may be disposed in contact with the first conductive type nitride semiconductor layer 130. The aluminum nitride layer may be so small that the difference in lattice mismatch with the first conductive type nitride semiconductor layer 130, for example, the gallium nitride layer (GaN) is only about 3%. Accordingly, the aluminum nitride layer can function to easily epitaxially grow the first conductive type nitride semiconductor layer 130, such as the gallium nitride layer (GaN), on the aluminum nitride layer.

A first conductive type nitride semiconductor layer 130 may be disposed on the buffer structure 120. The first conductive type nitride semiconductor layer 130 may be a semiconductor layer doped with an n-type or p-type dopant. In particular, when the first conductive type nitride semiconductor layer 130 is doped with an n-type dopant, the second conductive type nitride semiconductor layer 150 may be doped with a p-type dopant. In contrast, when the first conductive type nitride semiconductor layer 130 is doped with a p-type dopant, the second conductive type nitride semiconductor layer 150 may be doped with an n-type dopant. The n-type dopant may be, for example, silicon (Si). The p-type dopant may be magnesium (Mg), zinc (Zn), cadmium (Cd) or a combination of two or more thereof.

For example, the first conductive type nitride semiconductor layer 130 may include a gallium nitride layer (GaN), an aluminum gallium nitride layer (Al x Ga 1 - x N, 0 < (Al x In y Ga 1 -x- y N, 0? x, y, x + y? 1), or a combination of two or more thereof. .

As illustrated, the first electrode layer 160 may be disposed on a portion of the first conductive type nitride semiconductor layer 130 in the case of a light emitting device having a horizontal structure. The first electrode layer 160 is electrically connected to the light emitting device package through a bonding wire (not shown), thereby receiving a voltage from an external power source and applying a voltage to the first conductive nitride semiconductor layer 130 . The first electrode layer 160 may be formed of a conductive layer, for example, titanium, aluminum, or the like.

The active layer 140 may be disposed on the first conductive type nitride semiconductor layer 130. The active layer 140 generates light through coupling of electrons and holes provided from the first conductive type nitride semiconductor layer 130 and the second conductive type nitride semiconductor layer 150. According to one embodiment, the active layer 140 may have a multi-quantum well structure to enhance coupling efficiency of electron-holes. In one example, the active layer 140 is indium gallium nitride (InGaN), gallium nitride (GaN), gallium aluminum nitride (Ga 1 - a Al a N , 0 <a <1) aluminum indium gallium nitride (Al x In y Ga 1 -x- y N, 0≤x, y , x + y≤1) or may comprise a combination of two or more of these.

The second conductive type nitride semiconductor layer 150 may be disposed on the active layer 140. The second conductive type nitride semiconductor layer 150 may be a semiconductor layer doped with an n-type or p-type dopant. In particular, when the first conductive type nitride semiconductor layer 130 is doped with an n-type dopant, the second conductive type nitride semiconductor layer 150 may be doped with a p-type dopant. In contrast, when the first conductive type nitride semiconductor layer 130 is doped with a p-type dopant, the second conductive type nitride semiconductor layer 150 may be doped with an n-type dopant. The n-type dopant may be, for example, silicon (Si). The p-type dopant may be magnesium (Mg), zinc (Zn), cadmium (Cd) or a combination of two or more thereof.

As an example, the second conductive type nitride semiconductor layer 150 may include a gallium nitride layer (GaN), an aluminum gallium nitride layer (Al x Ga 1 - x N, 0 < (Al x In y Ga 1 -x- y N, 0? x, y, x + y? 1), or a combination of two or more thereof. .

A second electrode layer 170 may be disposed on a portion of the second conductive type nitride semiconductor layer 150. The second electrode 170 is electrically connected to the light emitting device package through a bonding wire (not shown) to receive a voltage from an external power source and apply the voltage to the second conductive type nitride semiconductor layer 150 can do. The second electrode layer 170 may be formed as a conductive layer, and may include, for example, titanium, aluminum, and the like.

As described above, in this embodiment, the light emitting device 100 includes the buffer structure 120 disposed between the substrate 110 and the first conductive type nitride semiconductor layer 130. The buffer structure 120 may be a multi-layer structure of a unit laminated structure in which a silicon oxide layer and an aluminum nitride layer are alternately laminated. The buffer structure 120 may have a reflectance of at least 90% or more with respect to incident incident light, and the nitride semiconductor layer stacked on the buffer structure 120 may be epitaxially grown on the aluminum nitride layer.

Meanwhile, the light emitting device 100 may be designed to emit light of a specific wavelength in the active layer 140. However, according to the inventor, the light having a predetermined single wavelength generated in the active layer 140 may exist in the light emitting device 100 in a state of being converted into light of various wavelength ranges for various reasons. As an example, the blue light emitted from the light emitting device 100 as a chip may be wavelength-converted by an external yellow phosphor and re-incident into the light emitting device 100 in the state of yellow light. Based on the above-described phenomenon, the inventor determines that a reflective layer capable of reflecting not only the wavelength of light emitted from the active layer 140 but also light of various other visible light wavelength ranges may be requested to the light emitting element 100. The embodiment of the present invention can provide a scattered Bragg reflection layer having a sufficiently high reflectivity for the entire region of the visible light wavelength.

2 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention. Referring to FIG. 2, the light emitting device 200 is substantially the same as the light emitting device 100 described above with reference to FIG. 1 except for the buffer structure 220. Therefore, in the following description, configurations differentiated from each other will be described.

Referring to FIG. 2, the buffer structure 220 may have a concave-convex pattern 222 at an interface with the first conductive type nitride semiconductor 130. The concave-convex pattern 222 may be formed by selectively etching the buffer structure 220 so as to have a concave portion and a convex portion after the buffer structure 220 is formed. The selective etching process may include, for example, forming a mask layer on the buffer structure through a lithography process and an etching process using the mask layer as an etching mask. The etching process may be, for example, dry etching, wet etching, or a combination thereof.

According to one embodiment, recesses and protrusions of the relief pattern 222 may expose the aluminum nitride layer of the buffer structure 220. Accordingly, the first conductive type nitride semiconductor layer 130 can be epitaxially grown on the exposed aluminum nitride layer. The concavo-convex pattern 222 may serve to scatter visible light incident on the buffer structure 220. Thus, the probability that the visible light is refracted at the interface of the buffer structure 220 and passes through the interior of the buffer structure 220 can be further reduced.

3 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention. Referring to FIG. 3, the light emitting device 300 has substantially the same configuration as that of the light emitting device 100 described above with reference to FIG. 1, except for the configuration of the first electrode layer 360. Therefore, in the following description, configurations differentiated from each other will be described.

The first electrode layer 360 of FIG. 3 is disposed on the exposed surface of the buffer structure 120 after the growth substrate 110 of the light emitting device 100 of FIG. 1 is separated and removed from the buffer structure 120 . A via layer 310 may be disposed through the buffer structure 120 for electrical connection between the first electrode layer 360 and the first conductive type nitride semiconductor layer 130. The via layer 130 may comprise a metal layer, a conductive layer such as a semiconductor layer doped with an n-type or p-type dopant. Accordingly, the light emitting device 300 shown in FIG. 3 may have a vertical structure in which the first electrode layer 360 and the second electrode layer 170 are disposed to face each other.

In the final structure, there is an advantage that the substrate material can be diversified by removing the growth substrate. As an example, in the conventional case, a silicon substrate having a relatively low price and ease of processing, but which is difficult to apply to a light emitting device due to a relatively high visible light absorption rate can be employed. Since the substrate of silicon material is easy to apply a known semiconductor wet etching or dry etching process, it is possible to effectively suppress the damage of the nitride epilayer during the process of removing the substrate in the conventional vertical structure light emitting device.

4 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention. Referring to FIG. 4, the light emitting device 400 has substantially the same configuration as the light emitting device 200 described with reference to FIG. 2, except for the configuration of the first electrode layer 360. Therefore, in the following description, configurations differentiated from each other will be described.

The first electrode layer 360 of Figure 4 may be disposed on the exposed surface of the buffer structure 220 after the substrate 110 of the light emitting device 200 of Figure 2 is separated and removed from the buffer structure 220 have. A via layer 410 may be disposed through the buffer structure 220 for electrical connection between the first electrode layer 360 and the first conductive type nitride semiconductor layer 130. The via layer 130 may comprise a metal layer, a conductive layer such as a semiconductor layer doped with an n-type or p-type dopant. Accordingly, the light emitting device 400 of the vertical structure shown in FIG. 4 can have the buffer structure 220 having a sufficiently high reflectance with respect to the entire region of the visible light and having the concavo-convex pattern.

5 is a graph illustrating the reflectivity of a buffer structure according to an embodiment of the present invention. Referring to FIG. 5, a buffer structure according to an embodiment of the present invention is configured as a first to a third embodiment. The buffer structure was laminated on a sapphire substrate and consisted of a plurality of unit laminated structures. The unit laminate structure was composed of a silicon oxide layer and an aluminum nitride layer. In the buffer structure of the first embodiment, the unit laminate structure is stacked in 61 pairs, and has a total thickness of 5.35 mu m. In the buffer structure of the second embodiment, the unit laminate structure is stacked in 81 pairs, and has a total thickness of 7.27 μm. In the buffer structure of the third embodiment, the unit laminate structure is stacked in 47 pairs, and has a total thickness of 4.12 μm.

Referring again to FIG. 5, it can be seen that the reflectance of the first to third embodiments is at least 90% or more and nearly 100% reflectance with respect to light having a wavelength of about 400 to 800 nm, which is the entire visible light region .

6 is a flowchart schematically showing a method of manufacturing a light emitting device according to an embodiment of the present invention. Referring to FIG. 6, in step S610, a substrate is prepared. The substrate may be, for example, a sapphire substrate, a silicon carbide (SiC) substrate, or a silicon substrate. However, the present invention is not limited thereto, and various other substrates may be used so long as the buffer structure can be grown.

Referring to step S620, a buffer structure is formed that includes a silicon oxide layer and an aluminum nitride layer alternately stacked on a substrate. The upper layer of the buffer structure may be the aluminum nitride layer. As an example, the buffer structure may be formed by stacking about 10 to 100 pairs of unit laminated structures of a silicon oxide layer and an aluminum nitride layer having a thickness of about 80 to 90 nm.

The buffer structure may be formed by a molecular beam epitaxy method, an E-beam deposition method, a plasma deposition method, a sputter deposition method, a chemical vapor deposition method, or the like. On the other hand, in the process of forming the buffer structure, it is possible to exclude the application of the metal organic chemical vapor deposition method, and the thin film having a denser structure can be formed by suppressing residual impurities in the thin film.

In some embodiments, after the buffer structure is formed, the silicon oxide layer and the aluminum nitride layer may be selectively etched to form a concavo-convex structure. The selective etching process may include, for example, forming a mask layer on the buffer structure through a lithography process and an etching process using the mask layer as an etching mask. The etching process may be, for example, dry etching, wet etching, or a combination thereof. At this time, the concave and convex portions of the concavo-convex pattern can expose the aluminum nitride layer of the buffer structure.

Referring to step S630, the first conductive type nitride semiconductor layer, the active layer, and the second conductive type nitride semiconductor layer are sequentially stacked on the buffer structure. The first conductive type nitride semiconductor layer, the active layer, and the second conductive type nitride semiconductor layer may be formed by an organic metal chemical vapor deposition method, an electron beam evaporation method, an evaporation method, or the like.

The first conductive type nitride semiconductor layer is n-type or a GaN layer (GaN) existing in the doped form with the p-type dopant, an aluminum gallium nitride layer (Al x Ga 1 - x N , 0 <x <1), indium A gallium nitride layer (InGaN), an aluminum indium gallium nitride layer (Al x In y Ga 1 -x- y N, 0? X, y, x + y? 1) or a combination of two or more thereof.

According to one embodiment, before the first conductive type nitride semiconductor layer is formed, nitriding treatment of aluminum may be performed on the aluminum nitride layer which is the uppermost layer of the buffer structure. Thereby, an aluminum nitride seed layer is formed on the aluminum nitride layer. The aluminum nitride seed layer may function as a growth nucleus when the first conductive type nitride semiconductor layer is formed, so that the first conductive type nitride semiconductor layer can be epitaxially grown. In one embodiment, the aluminum nitride seed layer may be formed using, for example, a molecular beam epitaxy method, an E-beam deposition method, a plasma deposition method, a sputter deposition method, a chemical vapor deposition method, Can be formed. The nitriding treatment of aluminum may be, for example, several to several tens of angstroms thick.

The active layer of indium gallium nitride (InGaN), gallium nitride (GaN), gallium aluminum nitride (Ga 1 - a Al a N , 0 <a <1) aluminum indium gallium nitride (Al x In y Ga 1 -x- y N , 0? X, y, x + y? 1), or a combination of two or more thereof. The active layer may have a multi-quantum well structure to enhance electron-hole coupling efficiency.

The second conductive type nitride semiconductor layer is n-type or a GaN layer (GaN) existing in a doped form of a p-type dopant, an aluminum gallium nitride layer (Al x Ga 1 - x N , 0 <x <1), indium A gallium nitride layer (InGaN), an aluminum indium gallium nitride layer (Al x In y Ga 1 -x- y N, 0? X, y, x + y? 1) or a combination of two or more thereof.

In some embodiments, when the light emitting device has a horizontal structure, the second conductive type nitride semiconductor layer and the active layer are selectively etched to expose the first conductive type nitride semiconductor layer. Next, a first electrode layer is formed on the exposed first conductive type nitride semiconductor layer, and a second electrode layer is formed on the second conductive type nitride semiconductor layer.

In some embodiments, after the second conductive type nitride semiconductor layer is formed, if the light emitting device has a vertical structure, the substrate is separated and removed from the buffer structure. Then, a first electrode layer is formed on the separately exposed buffer structure. And a second electrode layer is formed on the second conductive type nitride semiconductor layer. Also, after the buffer structure is formed, a via hole may be formed through the buffer structure. A conductive via layer filling the via hole can then be formed. The conductive via layer may electrically connect the first electrode layer and the first conductive type nitride semiconductor layer.

Through the above-described processes, a light emitting device according to an embodiment of the present invention can be formed. While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. It can be understood that

100 200 300 400: light emitting element,
110: substrate, 120 220: buffer structure,
130: first conductive type nitride semiconductor layer, 140: active layer,
150: second conductive type nitride semiconductor layer,
160 360: first electrode layer,
170: second electrode layer, 222: concave / convex pattern.

Claims (21)

A buffer structure including a silicon oxide layer and an aluminum nitride layer alternately stacked; And
A first conductive type nitride semiconductor layer, an active layer, and a second conductive type nitride semiconductor layer sequentially disposed on the buffer structure,
And an upper layer of the buffer structure is the aluminum nitride layer. The method according to claim 1,
Wherein the buffer structure is formed by stacking a unit laminated structure composed of the silicon oxide layer and the aluminum nitride layer in a plurality of pairs
Light emitting element. 3. The method of claim 2,
The buffer structure is formed by stacking 10 to 100 pairs of unit laminate structures having a thickness of 80 to 90 nm
Light emitting element. The method according to claim 1,
The buffer structure functions as a distributed Bragg reflection layer (DBR) that reflects light incident on the buffer structure
Light emitting element. 5. The method of claim 4,
Wherein the buffer structure has a reflectivity of at least 90% for light having a wavelength range of 400 nm to 800 nm
Light emitting element. The method according to claim 1,
And a substrate disposed below the buffer structure to allow the buffer structure to be laminated
Light emitting element. The method according to claim 1,
Wherein the buffer structure has a concavo-convex pattern at an interface with the first conductive type nitride semiconductor
Light emitting element. 8. The method of claim 7,
The concave and convex portions of the concavo-convex pattern are formed by exposing the aluminum nitride layer of the buffer structure
Light emitting element. Board;
A buffer structure comprising a silicon oxide layer and an aluminum nitride layer alternately stacked on the substrate, the buffer structure comprising a dispersed Bragg reflection layer; And
A first conductive type gallium nitride layer sequentially disposed on the buffer structure, an active layer, and a second conductive type gallium nitride layer,
Wherein the buffer structure is formed between the substrate and the first conductivity type gallium nitride layer
Light emitting element. 10. The method of claim 9,
The substrate
A sapphire substrate, a silicon carbide (SiC) substrate, and a silicon substrate
Light emitting element. 10. The method of claim 9,
Wherein the buffer structure comprises a multi-layer structure of a unit laminated structure composed of the silicon oxide layer and the aluminum nitride layer
Light emitting element. 12. The method of claim 11,
The buffer structure is formed by stacking a unit laminate structure having a thickness of 80 to 90 nm in a pair of 10 to 100
Light emitting element. 10. The method of claim 9,
Wherein the buffer structure has a reflectivity of at least 90% for light having a wavelength range of 400 nm to 800 nm
Light emitting element.
? 10. The method of claim 9,
Wherein the buffer structure has a concavo-convex pattern at an interface with the first conductive gallium nitride layer
Light emitting element. 15. The method of claim 14,
The concave and convex portions of the concavo-convex pattern are formed by exposing the aluminum nitride layer of the buffer structure
Light emitting element. 10. The method of claim 9,
Wherein the silicon oxide layer has an amorphous structure,
The aluminum nitride layer has a crystalline structure
Light emitting element. 10. The method of claim 9,
Wherein the aluminum nitride layer of the buffer structure is deposited on the buffer layer to assist in epitaxial growth of the first conductivity type gallium nitride layer
Light emitting element. Preparing a substrate;
Forming a buffer structure including a silicon oxide layer and an aluminum nitride layer alternately stacked on the substrate;
And sequentially stacking a first conductive type nitride semiconductor layer, an active layer, and a second conductive type nitride semiconductor layer on the buffer structure,
And the aluminum nitride layer of the buffer structure and the first conductive type nitride semiconductor layer are formed so as to be in contact with each other
A method of manufacturing a light emitting device. 19. The method of claim 18,
The buffer structure is formed by stacking a unit laminate structure of a silicon oxide layer and an aluminum nitride layer having a thickness of 80 to 90 nm in a number of 10 to 100
A method of manufacturing a light emitting device. 19. The method of claim 18,
After forming the buffer structure,
Further comprising the step of selectively etching the silicon oxide layer and the aluminum nitride layer to form a concavo-convex structure
A method of manufacturing a light emitting device. 21. The method of claim 20,
After the second conductive type nitride semiconductor layer is formed,
Further comprising removing the substrate
A method of manufacturing a light emitting device.

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