KR20140097774A - Liquid crystal display device - Google Patents

Liquid crystal display device Download PDF

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Publication number
KR20140097774A
KR20140097774A KR1020130010242A KR20130010242A KR20140097774A KR 20140097774 A KR20140097774 A KR 20140097774A KR 1020130010242 A KR1020130010242 A KR 1020130010242A KR 20130010242 A KR20130010242 A KR 20130010242A KR 20140097774 A KR20140097774 A KR 20140097774A
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KR
South Korea
Prior art keywords
substrate
region
liquid crystal
display area
display
Prior art date
Application number
KR1020130010242A
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Korean (ko)
Inventor
곽희영
최영석
Original Assignee
엘지디스플레이 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to KR1020130010242A priority Critical patent/KR20140097774A/en
Publication of KR20140097774A publication Critical patent/KR20140097774A/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device

Abstract

An embodiment of the present application relates to a liquid crystal display device comprising a display area for displaying an image and a peripheral non-display area. The liquid crystal display device comprises: gate lines and data lines formed in directions of intersecting each other in the display area of a first substrate to define a plurality of pixel areas corresponding to the display area; at least one pad formed as connection terminals for an external circuit in each of two or more pad areas in the non-display area of the first substrate; at least one link formed to connect each pad to any one of the gate line and the data line in each of two or more link areas of the non-display area of the first substrate; and at least one dummy pattern formed as a straight line in a single direction in a spacing area between two link areas of the non-display area of the first substrate.

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

The present invention relates to a liquid crystal display device capable of improving image quality.

As the era of informationization becomes full-scale, the display field for visually displaying electrical information signals is rapidly developing. Accordingly, studies are being continued to develop performance such as thinning, lightening, and low power consumption for various various flat display devices.

Typical examples of such flat panel display devices include a liquid crystal display device (LCD), a plasma display panel (PDP), a field emission display (FED) An electroluminescence display device (ELD), an electro-wetting display device (EWD), and an organic light emitting display device (OLED). Such flat panel display devices commonly include flat panel display panels for realizing images. A flat panel display panel is a structure in which a pair of substrates sandwiching a unique light emitting material or a polarizing material are face-to-face bonded.

Among them, the liquid crystal display device is an apparatus for displaying an image by using the optical anisotropy and the polarization property of liquid crystal. That is, the liquid crystal display device forms an electric field for deforming the arrangement direction of the liquid crystal in each pixel region in a state in which the elongated liquid crystal molecules are oriented in a predetermined initial direction, and adjusts the light transmittance of each pixel region, Display.

Accordingly, a general liquid crystal display device includes first and second substrates which are adhered to each other, and a liquid crystal layer interposed therebetween. The liquid crystal display device further includes first and second alignment layers formed on one surface of the first and second substrates facing each other and orienting the liquid crystal layer in the initial direction.

On the other hand, when the liquid crystal display device is in an active matrix driving mode (Active Matrix Driving Mode), the thin film transistor array is formed on one of the first and second substrates disposed on the lower side in the light emitting direction. Here, the thin film transistor array defines a plurality of pixel regions corresponding to the display region and independently controls the light emission amount of each pixel region.

FIG. 1A is a view showing a part of a general liquid crystal display device, and FIG. 1B is a view showing light leakage by the alignment layer in FIG. 1A.

1A, a general liquid crystal display device 10 includes a gate line (not shown) and a data line (not shown) formed in a direction crossing each other to define a plurality of pixel regions corresponding to the display region AA The non-display area NA and the non-display area NA are formed in the non-display area NA and the display area AA, And a link formed so as to connect the pad 12 with either the gate line or the data line in the link region 13. [

At this time, since the pad area 12 is narrower than the display area AA, the link area 13 is spread from the pad area 12 to the display area AA, A spacing region 14 is formed.

A sealing layer 15 for bonding between the first and second substrates is formed in a sealing area SA surrounding the display area of the non-display area. In this case, the sealing area SA includes a link area 13, And the spacing region (14). Therefore, the thickness of the sealing layer formed at a portion overlapping the link region 13 among the sealing regions SA is greater than the thickness of the sealing layer formed at the other portion overlapping the spacing region 14, Thin. As described above, if the thickness of the sealing layer varies depending on whether or not the seal is overlapped with the link, there is a problem that the reliability of the adhesion between the first and second substrates deteriorates.

Accordingly, the general liquid crystal display further includes a dummy pattern formed in a V-shape so as to fill the gap region 14 in order to secure reliability of adhesion between the first and second substrates. At this time, the dummy pattern is added to the interval region 14 to compensate for the change in the thickness of the sealing layer by the link.

On the other hand, the alignment layer 11 is formed by forming a gate line, a data line, a pad and a link on the first substrate, and then aligning the alignment material film applied to the display area on the first substrate.

The process of orienting the alignment material film is performed using a rubbing roll 20. At this time, as the rubbing roll 20 rotates toward the display area AA via the non-display area NA, the surface of the rubbing roll 20 is repeatedly engaged with the V-shaped pattern by the link and the dummy pattern And copied, and patterned in a V-shape.

Due to this, the alignment layer 11 is formed to include the first and second alignment regions 11a and 11b which are aligned in two orientation directions symmetrical to each other.

In the boundary region between the first and second alignment regions 11a and 11b, the liquid crystals can not be arranged in an appropriate initial direction. Therefore, as shown in Fig. 1B, The image quality deteriorates.

As described above, the general liquid crystal display device includes a dummy pattern formed in a V-shape in the interval region between the link regions in order to secure reliability of adhesion between the first and second substrates. As a result, the alignment layers are aligned in two mutually symmetric alignment directions, resulting in a problem that the light leakage 16 in the form of a vertical line corresponding to the boundary region in which the alignment direction changes and the resulting image quality deteriorate.

The present invention relates to a liquid crystal display device including a dummy pattern for preventing a change in the thickness of a sealing layer according to overlapping with a link, and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a liquid crystal display device including a display region in which an image is displayed and a non-display region in the periphery of the display region, wherein the plurality of pixel regions are defined in correspondence with the display region, A gate line and a data line formed in a direction crossing each other in the display region on the substrate; At least one pad formed as a connection terminal of an external circuit in each of two or more pad areas of the non-display area on the first substrate; At least one link formed in each of at least two of the non-display areas on the first substrate so as to connect between the gate line and the data line and each pad; And at least one dummy pattern formed in a linear shape in a single direction in an interval region between two of the non-display regions on the first substrate.

The liquid crystal display device according to an embodiment of the present invention includes at least one dummy pattern formed in a linear shape in a single direction in a space region between two link regions.

By such a dummy pattern, it is possible to prevent a pattern having a specific direction from repeating in the moving direction of the rubbing roll in the link region and the interval region. Therefore, even if the rubbing roll rotates through the non-display region and moves toward the display region side, the surface of the rubbing roll can be maintained in a design state having a single direction without repeated contact with a pattern having a specific direction, Can be oriented in a single direction.

As a result, it is possible to prevent the generation of light leakage in the form of a vertical line by the orientation layer oriented in mutually opposing two or more directions, and the image quality of the liquid crystal display device can be improved.

1A is a diagram showing a part of a thin film transistor array substrate of a general liquid crystal display device.
FIG. 1B is a view showing light leakage by the alignment layer of FIG. 1A.
2 is a cross-sectional view illustrating a liquid crystal display device according to an embodiment of the present invention.
Fig. 3 is a sectional view showing a part of the display area of Fig. 2. Fig.
4 is a view showing a part of the thin film transistor array substrate of FIG.
FIG. 5 is a view showing the first alignment layer of FIG. 2. FIG.
6 to 8 are views showing another example of a dummy pattern according to an embodiment of the present invention.

Hereinafter, a liquid crystal display according to an embodiment of the present invention will be described in detail with reference to FIGS. 2 to 8 attached hereto.

FIG. 2 is a cross-sectional view illustrating a liquid crystal display device according to one embodiment of the present invention, and FIG. 3 is a cross-sectional view illustrating a part of a display region of FIG. FIG. 4 is a view showing a part of the thin film transistor array substrate of FIG. 2, and FIG. 5 is a view showing the first alignment layer of FIG.

2, the liquid crystal display 100 according to one embodiment of the present invention includes a display area AA for emitting light for displaying an image and a non-display area NA outside the display area AA, .

The liquid crystal display device 100 has a display area AA between the thin film transistor array substrate 110 and the color filter array substrate 120, the thin film transistor array substrate 110 and the color filter array substrate 120, And a non-display region NA between the thin film transistor array substrate 110 and the color filter array substrate 120. The thin film transistor array substrate 110 and the color filter array substrate 120 are formed in a sealing region of the liquid crystal layer 130, And a sealing layer 140 for bonding the filter array substrate 120 and sealing the liquid crystal layer 130.

In addition, the liquid crystal display 100 further includes first and second alignment layers 111 and 121 formed on one surface of the thin film transistor array substrate 110 and the color filter array substrate 120, respectively, . The first and second alignment layers 111 and 121 are for setting the initial alignment of the liquid crystal layer 130. The liquid crystal layer 130 is in contact with the first and second alignment layers 111 and 121, Is oriented by the first and second alignment layers (111, 121).

3, the thin film transistor array substrate 110 includes a first substrate 112, a thin film transistor array 113 formed on a display area AA on the first substrate 112, a first substrate 112 A protective layer 114 formed on the entire surface of the substrate 110 so as to cover the thin film transistor array 113 and a first alignment layer 111 formed on the protective layer 114 and formed by alignment treatment.

Here, the thin film transistor array 113 defines a plurality of pixel regions corresponding to the display region AA, and independently controls the light emission amount of each pixel region. The thin film transistor array 113 includes a gate line and a data line formed in a direction crossing the display area AA on the first substrate 112 so as to define a plurality of pixel areas corresponding to the display area AA, And a plurality of thin film transistors formed in the display region AA on the first substrate 112 so as to correspond to the plurality of pixel regions in the intersection region between the gate line and the data line.

The thin film transistor array substrate 110 will be described in more detail with reference to FIG.

The color filter array substrate 120 includes a second substrate 122 and a black matrix 123 formed on the second substrate 122 in a display area AA on the outer side of each pixel area, A color filter 124 formed to correspond to each pixel region in the display area AA on the second substrate 122 and a second alignment layer 121 formed on the color filter 124 and formed by alignment treatment ).

The color filter 124 includes a region 124r for filtering the red light among lights emitted from the backlight unit 150 under the TFT array substrate 110 and transmitted through the liquid crystal layer 130, 124g for filtering blue light and an area 124b for filtering blue light.

4, the thin film transistor array substrate 110 according to one embodiment of the present invention includes a first substrate 112, a thin film transistor array 113 formed in a display area AA on the first substrate 112, ). The thin film transistor array 113 includes a plurality of pixel regions PA formed in a direction intersecting the display region AA on the first substrate 112 so as to define a plurality of pixel regions PA corresponding to the display region AA. In the intersection region between the gate line GL and the data line DL among the display region AA on the first substrate 112 and the data line DL on the first substrate 112, And a plurality of thin film transistors (TFT) formed so as to be formed.

4, the thin film transistor array substrate 110 includes a plurality of pixel electrodes (not shown) formed to be connected to a plurality of thin film transistors (TFT) in an opening region that is a part of each pixel region PA, And a plurality of common electrodes (not shown) formed to be connected to a common line (not shown) in the aperture region PA of each pixel region. At this time, the pixel electrode and the common electrode form an electric field for changing the direction of the liquid crystal corresponding to each pixel region in the liquid crystal layer (130 in Fig. 2).

The thin film transistor array substrate 110 is provided on at least two pad areas 115a and 115b of the non-display area NA on the first substrate 112 with at least one One of the gate line GL and the data line DL and one of the pads PAD and PAD is formed in each of the two or more link areas 116a and 116b of the non-display area NA on the first substrate 112, Display area NA on the first substrate 112 and at least one link LK formed between the two link areas 116a and 116b of the non-display area NA on the first substrate 112, Direction and at least one dummy pattern DmP1 formed in a straight line shape.

Here, the dummy pattern DmP1 is formed together with the link LK, but unlike the link LK, it is not connected to the thin film transistor array 113 and the pad PAD.

As described above, the liquid crystal display according to one embodiment of the present invention includes at least one dummy pattern DmP1 formed in the interval area 117 on the first substrate 112, (140 in Fig. 2) formed to have a thickness within a critical error.

That is, the sealing layer 140 is formed in the sealing area SA surrounding the display area AA out of the non-display area NA on the first substrate 112. The thickness of the sealing layer 140 is varied by the link LINK formed in the link regions 116a and 116b but also by the dummy pattern DmP1 formed in the interval region 117, Can be maintained within an error. As a result, reliability of adhesion between the thin film transistor array substrate 110 and the color filter array substrate 120 can be secured.

According to the embodiment of the present invention, the dummy pattern DmP1 is formed in a linear shape in a single direction. By such a dummy pattern DmP1, it is possible to prevent a pattern having a specific direction from repeating in the moving direction of the rubbing rolls in the link regions 116a and 116b and the interval region 117 therebetween.

5, in the course of aligning the first alignment layer 111, the rubbing roll 200 is moved beyond the non-display area NA toward the display area AA The surface of the rubbing roll 200 does not repeatedly contact the pattern having a certain direction. Therefore, the surface of the rubbing roll 200 is not patterned in a V-like shape such as a link LINK, and can be maintained in a single directional design state so that the first orientation layer 111 can be oriented in a single direction have.

As a result, light leakage caused by the first alignment layer 111 can be prevented, and the image quality of the liquid crystal display device can be improved.

4 and FIG. 5, the dummy pattern DmP1 is formed in the right-hand side of the link region 116b as the link LK disposed closest to the gap region 117, However, the present invention is not limited thereto, and the dummy pattern DmP1 according to one embodiment of the present invention may be formed in any direction within a range of forming a straight line in a single direction.

6 to 8 are views showing another example of a dummy pattern according to an embodiment of the present invention.

6, the dummy pattern DmP2 is a slanting line in the direction from the left to the right, such as the link LK disposed closest to the interval area 117 in the left link area 116a As shown in FIG.

Alternatively, as shown in Fig. 7, the dummy pattern DmP3 may be formed in a straight line parallel to the direction of the gate line GL, or alternatively, the dummy pattern DmP4 may be formed And may be formed in a straight line parallel to the direction of the data line DL.

As shown in Figs. 4 and 6, the dummy patterns DmP1 and DmP2 can be formed in a straight line, which is an oblique slant line in the direction of the gate line GL and the direction of the data line DL Or may be formed in a straight line shape parallel to the direction of any one of the gate line GL and the data line DL as shown in Figs.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Will be clear to those who have knowledge of.

100: liquid crystal display device AA: display area
NA: non-display area 110: thin film transistor array substrate
120: color filter array substrate 130: liquid crystal layer
140: sealing layer 111, 121: first and second alignment layers
112: first substrate 113: thin film transistor array
114: protective layer 122: second substrate
123: black matrix 124: color filter
150: Backlight unit SA: Sealing area
GL: gate line DL: data line
PA: pixel region TFT: thin film transistor
115a, 115b: pad area PAD: pad
116a, 116b: Link area LINK: Link
117: interval area DmP1, DmP2, DmP3, DmP4: dummy pattern

Claims (6)

1. A liquid crystal display comprising a display area in which an image is displayed and a non-display area in the periphery,
A gate line and a data line formed in a direction crossing the display region on the first substrate so as to define a plurality of pixel regions corresponding to the display region;
At least one pad formed as a connection terminal of an external circuit in each of two or more pad areas of the non-display area on the first substrate;
At least one link formed in each of at least two of the non-display areas on the first substrate so as to connect between the gate line and the data line and each pad;
And at least one dummy pattern formed in a linear shape in a single direction in an interval region between two of the non-display regions on the first substrate.
The method according to claim 1,
The dummy pattern
Wherein the gate line and the data line are formed in an oblique linear shape in the direction of the gate line and the direction of the data line.
The method according to claim 1,
The dummy pattern
Wherein the gate line and the data line are formed in a straight line parallel to one of the gate line and the data line.
4. The method according to any one of claims 1 to 3,
A second substrate facing the first substrate;
A sealing layer formed in a sealing region of the non-display region between the first and second substrates; And
First and second alignment layers formed on one surface of each of the first and second substrates facing each other; And
And a liquid crystal layer injected between the first and second substrates and sealed by the sealing layer,
Wherein the liquid crystal layer is in contact with the first and second alignment layers and is oriented by the first and second alignment layers.
5. The method of claim 4,
A plurality of thin film transistors formed in the display region on the first substrate so as to correspond to the plurality of pixel regions in a crossing region between the gate line and the data line; And
Further comprising a plurality of pixel electrodes formed in the display region on the first substrate so as to correspond to the plurality of pixel regions and connected to the plurality of thin film transistors.
6. The method of claim 5,
A black matrix formed in the display region on the second substrate so as to correspond to an outline of each pixel region; And
And a color filter formed in the display region on the second substrate so as to correspond to each of the pixel regions.
KR1020130010242A 2013-01-30 2013-01-30 Liquid crystal display device KR20140097774A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016119338A1 (en) * 2015-01-27 2016-08-04 京东方科技集团股份有限公司 Array substrate and display device
CN109375441A (en) * 2018-12-21 2019-02-22 信利半导体有限公司 Substrate Wiring structure and cabling production method
KR20190038149A (en) * 2017-09-29 2019-04-08 엘지디스플레이 주식회사 Organic light emitting display device
CN109597255A (en) * 2018-12-24 2019-04-09 惠科股份有限公司 A kind of display panel, manufacturing method thereof and display device
CN110333633A (en) * 2019-05-29 2019-10-15 重庆惠科金渝光电科技有限公司 Array substrate and display panel

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016119338A1 (en) * 2015-01-27 2016-08-04 京东方科技集团股份有限公司 Array substrate and display device
US9766500B2 (en) 2015-01-27 2017-09-19 Boe Technology Group Co., Ltd. Array substrate and display device
KR20190038149A (en) * 2017-09-29 2019-04-08 엘지디스플레이 주식회사 Organic light emitting display device
CN109375441A (en) * 2018-12-21 2019-02-22 信利半导体有限公司 Substrate Wiring structure and cabling production method
CN109597255A (en) * 2018-12-24 2019-04-09 惠科股份有限公司 A kind of display panel, manufacturing method thereof and display device
CN110333633A (en) * 2019-05-29 2019-10-15 重庆惠科金渝光电科技有限公司 Array substrate and display panel
CN110333633B (en) * 2019-05-29 2022-01-25 重庆惠科金渝光电科技有限公司 Array substrate and display panel

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