KR20140073249A - Method for manufacturing printed circuit board and printed circuit board manufactured by the same - Google Patents

Method for manufacturing printed circuit board and printed circuit board manufactured by the same Download PDF

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Publication number
KR20140073249A
KR20140073249A KR1020120141277A KR20120141277A KR20140073249A KR 20140073249 A KR20140073249 A KR 20140073249A KR 1020120141277 A KR1020120141277 A KR 1020120141277A KR 20120141277 A KR20120141277 A KR 20120141277A KR 20140073249 A KR20140073249 A KR 20140073249A
Authority
KR
South Korea
Prior art keywords
circuit structure
forming
insulating material
external circuit
circuit board
Prior art date
Application number
KR1020120141277A
Other languages
Korean (ko)
Inventor
김준성
박용진
정혜원
고영관
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020120141277A priority Critical patent/KR20140073249A/en
Publication of KR20140073249A publication Critical patent/KR20140073249A/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/119—Details of rigid insulating substrates therefor, e.g. three-dimensional details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0041—Etching of the substrate by chemical or physical means by plasma etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist

Abstract

The present invention relates to a method of manufacturing a printed circuit board and a printed circuit board manufactured thereby, comprising the steps of preparing a base substrate, forming an internal circuit structure on the base substrate, A method of manufacturing a semiconductor device, comprising: forming an insulating material having a via hole exposing a structure; forming an external circuit structure electrically connected to the internal circuit structure via the via hole on the insulating material; And a step of surface-treating the external circuit structure.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method of manufacturing a printed circuit board and a printed circuit board manufactured by the method.

The present invention relates to a method of manufacturing a printed circuit board and a printed circuit board manufactured thereby.

In general, printed circuit boards are becoming an integral part of virtually all electronics industries, including home appliances such as TVs, cameras, and VCRs, as well as information devices such as computers and handheld terminals. Particularly, due to recent electromagnetic convergence, miniaturization and integration of components, the importance of substrates connected to small electronic components is increasing.

The printed circuit board (PCB) is divided into a flexible PCB and a rigid PCB according to the rigidity of the substrate. The printed circuit board is divided into a single-sided PCB, a double-sided PCB and a multi-layer PCB according to the number of circuit pattern layers. In particular, PCBs used in electronic packages have become thinner and thinner as products have been made thinner and thinner, and it is becoming common to manufacture multilayered boards in order to realize diversified and complicated functions in thinner structures.

Recently, with the development of the electronic industry, demands for high-performance and miniaturization of electronic components are increasing rapidly. In order to cope with this trend, the pattern of the printed circuit board has been miniaturized, and the packaging method has also been developed and a method of directly mounting the chip on the pattern for the higher density mounting has been developed.

However, in order to mount a chip on a pattern, a surface treatment is performed. However, there is no problem in surface-treating only exposed pads. However, when a fine pattern is subjected to surface treatment, And the interface of the insulating material is etched to cause an undercut severely, and even a defect that the pattern drops from the insulating material occurs.

Korean Patent Publication No. 10-2006-0087149 Korean Patent Publication No. 10-2009-0099835

In order to solve the above problems, the present invention provides a method of manufacturing a printed circuit board which can prevent undercut between a pattern and an insulating material from being further etched into an undercut during a surface treatment, and a printed circuit board The purpose is to provide.

According to another aspect of the present invention, there is provided a method of manufacturing a printed circuit board, including: preparing a base substrate; forming an internal circuit structure on the base substrate; A method of manufacturing a semiconductor device, comprising: forming an insulating material having a via hole exposing a structure; forming an external circuit structure electrically connected to the internal circuit structure via the via hole on the insulating material; And a step of surface-treating the external circuit structure.

The method may further include forming a solder resist such that the external circuit structure is exposed prior to the surface treatment step.

Further, before the step of forming the reinforcement portion in the undercut, the step of forming the solder resist may further include forming the solder resist so that the external circuit structure is exposed.

At this time, in the step of forming the reinforcing portion, a step of forming an insulating film on the insulating material and a step of removing the insulating film except for the insulating film filled in the undercut may be included.

In addition, the step of forming the insulating layer may include forming an insulating layer by any one of a liquid coating, a vacuum plasma coating, and a film coating.

In the step of removing the insulating film, a plasma etching process may be performed on the insulating film to remove the insulating film.

According to another aspect of the present invention, there is provided a printed circuit board comprising: a base substrate having an internal circuit structure formed thereon; an insulating material formed on the base substrate and having a via hole; An external circuit structure electrically connected to the internal circuit structure, a reinforcing portion formed in an undercut between the external circuit structure and the insulating material, and a solder resist formed on the insulating material to expose the external circuit structure.

As described above, the method of manufacturing a printed circuit board according to an embodiment of the present invention and the printed circuit board manufactured thereby form an insulating film before the surface treatment process to fill the undercut, It is possible to prevent further etching, and it is possible to prevent the occurrence of defects such as deepening of undercut of the pattern or falling of the pattern from the insulating material.

1 is a cross-sectional view of a printed circuit board according to an embodiment of the present invention;
2 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the present invention.
3 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to an embodiment of the present invention.
4 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to another embodiment of the present invention.

Hereinafter, specific embodiments of the present invention will be described with reference to the drawings. However, this is merely an example and the present invention is not limited thereto.

In the following description, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. The following terms are defined in consideration of the functions of the present invention, and these may be changed according to the intention of the user, the operator, or the like. Therefore, the definition should be based on the contents throughout this specification.

The technical idea of the present invention is determined by the claims, and the following embodiments are merely a means for effectively explaining the technical idea of the present invention to a person having ordinary skill in the art to which the present invention belongs.

Hereinafter, a method of manufacturing a printed circuit board according to the present invention and a printed circuit board manufactured by the method will be described in detail with reference to the drawings of FIGS. 1 to 4.

1 is a cross-sectional view illustrating a printed circuit board according to an embodiment of the present invention.

1, a printed circuit board according to an embodiment of the present invention includes a base substrate 110, an insulating material 130, an external circuit structure 140, a reinforcing portion 152, and a solder resist 160 .

The base substrate 110 may include a core layer 111 and a metal layer 112 formed on both sides of the core layer 111. [ The core layer 111 may be various kinds of insulating films. For example, the core layer 111 may be an insulating film made of at least one of polyimide, polyimide amide, polyester, polyphenylene sulfide, and polyester imide. The metal layer 112 may be a metal layer containing copper (Cu). As the base substrate 110, a copper clad laminate (CCL) may be used.

Here, the internal circuit structure 120 may be formed on the base substrate 110.

At this time, the internal circuit structure 120 may include an internal circuit pattern 122 electrically connected to the first via 121 and the first via 121. The first via hole 113 may be formed in the base substrate 110 so as to penetrate the core layer 111. The first via hole 113 may be filled with a conductive material, . Here, the internal circuit pattern 122 may be formed on the core layer 111 such that a part of the internal circuit pattern 122 is electrically connected to the first vias 121.

The insulating material 130 is formed on the base substrate 110 and may be formed of any one of a prepreg, an ABF (Ajinomoto Build up Film), an FR-4, and a bismaleimide triazine (BT).

The external circuit structure 140 may include an external circuit pattern 142 electrically connected to the second via 141 and the second via 141.

Here, the second via 141 may be a conductive via electrically connected to the internal circuit pattern 122 through the insulating material 130. A second via hole 131 may be formed through the insulating material 130 to expose the internal circuit pattern 142. The second via hole 131 may be filled with a conductive material, A second via 141 electrically connected to the internal circuit pattern 122 may be formed. Also, the external circuit pattern 142 may be formed on the insulating material 130 such that a part of the external circuit pattern 142 is electrically connected to the second via 141.

The reinforcing portion 152 may be formed to fill the undercut 144 formed between the external circuit pattern 142 and the insulating material 130 and may be formed of an insulating material. The undercut 144 may be formed by causing an etching reaction to occur at an interface between the external circuit pattern 142 and the insulating material 130 during an etching process for forming the external circuit pattern 142. By forming the reinforcing portion 152 made of an insulating material on the undercut 144, the interface between the external circuit pattern 142 and the insulating material 130 is protected during the subsequent surface treatment step to prevent further etching It is possible to prevent the occurrence of defects such as an increase in the undercut of the pattern or a fall of the pattern from the insulating material.

The solder resist 160 is formed for protecting the external circuit pattern 142 and electrically insulating the external circuit pattern 142 and may be formed on the insulating material 130 so that the external circuit pattern 142 is selectively exposed.

Hereinafter, a method of manufacturing a printed circuit board constructed as described above will be described.

FIG. 2 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the present invention, and FIG. 3 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to an embodiment of the present invention.

2 and 3, a method of manufacturing a printed circuit board according to an exemplary embodiment of the present invention includes preparing a base substrate 110 (S100), forming an internal circuit structure (not shown) on the base substrate 110 Forming an insulating material 130 having a via hole 131 for exposing the internal circuit structure 120 on the base substrate 110 and a step S300 of forming an insulating material 130 on the base substrate 110, A step (S400) of forming an external circuit structure 140 electrically connected to the internal circuit structure 120 through the via hole 131 on the external circuit structure 140 and between the external circuit structure 140 and the insulating material 130 (S500) of forming the reinforcing portion 152 in the undercut 144 of the external circuit structure 140 and a step S600 of surface-treating the external circuit structure 140.

First, as shown in FIGS. 2 and 3A, a step S100 of preparing a base substrate 110 may be performed.

The base substrate 110 includes a core layer 111 and a metal layer 112 formed on both sides of the core layer 112 to form a thin plate. For example, the base substrate 110 may be a copper clad laminate (CCL).

Next, as shown in FIGS. 2 and 3B, a step S200 of forming an internal circuit structure 120 on the base substrate 110 may be performed.

A first via hole 113 may be formed in the base substrate 110. The first via hole 113 may be formed through the base substrate 110 and may be formed by a laser drill or a mechanical drill.

Thereafter, a general plating process is performed on the base substrate 110 to form an internal circuit structure 120 composed of an internal circuit pattern 122 electrically connected to the first via 121 and the first via 121 have.

Next, as shown in FIGS. 2 and 3C, a step S300 of forming an insulating material 130 having a via hole 131 for exposing the internal circuit structure 120 on the base substrate 110 is performed .

For example, a second via hole 131 may be formed by laminating an ABF (Ajinomoto Build-up Film) on the base substrate 110 and then exposing the internal circuit pattern 122 of the internal circuit structure 120 have. Here, the second via hole 131 may be formed by a laser drill or a mechanical drill.

Next, as shown in FIG. 2 and FIG. 3D, forming an external circuit structure 140 electrically connected to the internal circuit structure 120 through the via hole 131 on the insulating material 130 (S400 ). ≪ / RTI >

Here, the external circuit structure 140 may be formed by performing a general plating process on the insulating material 130.

For example, a seed layer is formed on the insulating material 130. At this time, the seed layer may be formed using an electroless copper plating process, but not limited thereto, and may be formed using a sputtering process or a CVD (Chemical Vapor Deposition) process. Thereafter, a dry film is formed to open a region corresponding to the external circuit pattern 142, and a copper layer is formed using the seed layer, thereby forming a second An external circuit pattern 142 electrically connected to the via 141 and the second via 141 can be formed. After the dry film is removed, the seed layer except for the external circuit pattern 142 may be removed by performing an etching process.

Next, as shown in FIG. 2, FIG. 3E and FIG. 3F, a step S500 of forming the reinforcing portion 152 in the undercut 144 between the external circuit structure 140 and the insulating material 130 is performed can do.

Here, the step of forming the insulating layer 151 on the insulating layer 130 may be performed.

An undercut 144 may be formed on the external circuit pattern 142 when performing the etching process in step S400 of forming the external circuit structure 140. An insulating film 151 may be formed on the insulating material 130, So that the undercut 144 can be filled with the reinforcing portion 152 made of an insulating material.

Here, the insulating layer 151 may be formed through any one of liquid coating, vacuum plasma coating, and film coating, but is not limited thereto.

Thereafter, the insulating film 151 of the remaining region except for the reinforcing portion 152 filling the undercut 144 can be removed.

At this time, the insulating layer 151 may be removed by a dry etching process. For example, a plasma etching process may be used as the dry etching process. The plasma etching process may etch the insulating layer 151 in the region of the insulating material 130 except for the reinforcing portion 152 formed in the undercut 144 of the external circuit pattern 142.

Next, a step of forming the solder resist 160 to expose the external circuit structure 140 may be performed.

The step of forming the solder resist 160 may include forming a resist film on the insulating material 130 and selectively removing a part of the resist film to expose a part of the external circuit pattern 142 of the external circuit structure 140 A solder resist 160 may be formed to selectively expose the external circuit structure 140.

Thereafter, the external circuit structure 140 may be surface-treated (S600).

Here, the surface treatment of the external circuit structure 140 can improve the reliability with the electronic component mounted on the external circuit structure 140.

At this time, the surface treatment may be an OSP (Organic Solderability Preservative) surface treatment.

Hereinafter, a method of manufacturing a printed circuit board according to another embodiment will be described.

4 is a cross-sectional view illustrating a manufacturing process of a printed circuit board according to another embodiment of the present invention.

As shown in FIG. 4, the manufacturing process of the printed circuit board according to another embodiment of the present invention includes the steps of preparing the printed circuit board described above and preparing the base board 110 (S100) A step S200 of forming an internal circuit structure 120 on the base substrate 110 and an insulating material 130 having a via hole 131 exposing the internal circuit structure 120 on the base substrate 110 And forming an external circuit structure 140 electrically connected to the internal circuit structure 120 through the via hole 131 is performed on the insulating material 130 in step S400. .

Thereafter, a step of forming the solder resist 160 to expose the external circuit structure 140 may be performed.

The step of forming the solder resist 160 may include forming a resist film on the insulating material 130 and selectively removing a part of the resist film to expose a part of the external circuit pattern 142 of the external circuit structure 140 A solder resist 160 may be formed to selectively expose the external circuit structure 140.

Next, an insulating layer 151 is formed on the insulating material 130 to form a reinforcing portion 152 in the undercut 144 between the external circuit structure 140 and the insulating material 130, and then the reinforcing portion 152 The insulating film 151 may be removed.

Thereafter, the external circuit structure 140 may be surface-treated. At this time, the surface treatment may be an OSP (Organic Solderability Preservative) surface treatment.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be construed as limiting the scope of the present invention. I will understand.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined by the scope of the appended claims, as well as the appended claims.

110: base substrate 111: core layer
112: metal layer 120: internal circuit structure
121: first via 122: internal circuit pattern
130: Insulation material 131: Second via hole
140: external circuit structure 141: second via
142: external circuit pattern 151: insulating film
152: reinforced portion 160: solder resist

Claims (7)

Preparing a base substrate;
Forming an internal circuit structure on the base substrate;
Forming an insulating material having a via hole exposing an internal circuit structure on the base substrate;
Forming an external circuit structure electrically connected to the internal circuit structure through the via hole on the insulating material;
Forming a reinforcing portion in the undercut between the external circuit structure and the insulating material; And
Surface treating the external circuit structure;
≪ / RTI >
The method according to claim 1,
Before the surface treatment step,
Further comprising forming a solder resist such that the external circuit structure is exposed.
The method according to claim 1,
Prior to forming the reinforcement in the undercut,
Further comprising forming a solder resist such that the external circuit structure is exposed.
The method according to claim 1,
In the step of forming the reinforcing portion,
Forming an insulating film on the insulating material; And
Removing the insulating film except for the insulating film filled in the undercut;
≪ / RTI >
5. The method of claim 4,
The step of forming the insulating film may include:
Wherein the insulating film is formed by any one of a liquid coating method, a vacuum plasma coating method, and a film coating method.
5. The method of claim 4,
The step of removing the insulating film may include:
A plasma etching process is performed on an insulating film to remove an insulating film.
A base substrate on which an internal circuit structure is formed;
An insulating material formed on the base substrate and having via holes;
An external circuit structure formed on the insulating material and electrically connected to the internal circuit structure through the via hole;
A reinforcing portion formed in an undercut between the external circuit structure and the insulating material; And
A solder resist formed on the insulating material to expose an external circuit structure;
And a printed circuit board.
KR1020120141277A 2012-12-06 2012-12-06 Method for manufacturing printed circuit board and printed circuit board manufactured by the same KR20140073249A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020120141277A KR20140073249A (en) 2012-12-06 2012-12-06 Method for manufacturing printed circuit board and printed circuit board manufactured by the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020120141277A KR20140073249A (en) 2012-12-06 2012-12-06 Method for manufacturing printed circuit board and printed circuit board manufactured by the same

Publications (1)

Publication Number Publication Date
KR20140073249A true KR20140073249A (en) 2014-06-16

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020120141277A KR20140073249A (en) 2012-12-06 2012-12-06 Method for manufacturing printed circuit board and printed circuit board manufactured by the same

Country Status (1)

Country Link
KR (1) KR20140073249A (en)

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