KR20130046317A - Amorphous semiconductor thin film transistor with an active layer doped with differential concentrations and its manufacturing method - Google Patents

Amorphous semiconductor thin film transistor with an active layer doped with differential concentrations and its manufacturing method Download PDF

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KR20130046317A
KR20130046317A KR1020110110835A KR20110110835A KR20130046317A KR 20130046317 A KR20130046317 A KR 20130046317A KR 1020110110835 A KR1020110110835 A KR 1020110110835A KR 20110110835 A KR20110110835 A KR 20110110835A KR 20130046317 A KR20130046317 A KR 20130046317A
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doped
active layer
thin film
film transistor
doping concentration
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KR1020110110835A
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Korean (ko)
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김대환
김동명
김재형
정현광
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국민대학교산학협력단
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78663—Amorphous silicon transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Abstract

PURPOSE: An amorphous semiconductor thin film transistor with an active layer doped with different concentrations and a manufacturing method thereof are provided to improve stability by making the doping concentration of a semiconductor layer different. CONSTITUTION: A gate is formed on a substrate. A gate insulating layer is formed on the gate. Semiconductor layers doped with different concentrations are laminated to form an active layer(140). A source(150) is in contact with the active layer. A drain(160) is in contact with the active layer.

Description

Amorphous semiconductor thin film transistor having an active layer doped with differential concentration and a method of manufacturing the same

The present invention relates to an amorphous semiconductor thin film transistor and a method of manufacturing the same, and more particularly to an amorphous semiconductor thin film transistor having an active layer doped with a differential concentration and a method for manufacturing the same.

A thin film transistor (TFT) is a transistor made of a thin film formed by vacuum deposition or the like on a substrate, and is manufactured by sequentially depositing a semiconductor, an insulator, and a metal thin film. Recently, researches using an amorphous semiconductor as a semiconductor constituting a thin film transistor have been actively conducted. The amorphous semiconductor is not only cheaper than a single crystalline or polycrystalline semiconductor, but also can be deposited at a low temperature in a large area, and has a light absorption coefficient. This is because there is a big characteristic. Accordingly, amorphous semiconductor thin film transistors are attracting attention in various fields such as solar cells, 3D stacked systems, active matrix liquid crystal displays (AMLCDs), and active matrix organic light-emitting diodes (AMOLEDs). It is expected to increase its utilization value as a key component of large area flat panel displays.

On the other hand, as an example in which an amorphous semiconductor thin film transistor is used, in the AMOLED pixel circuit constituting the AMOLED display backplane, a constant current must flow through the thin film transistor element to emit the AMOLED. In this case, in order to allow constant current to flow through the thin film transistor device, a “positive bias stress (PBS)” state is maintained at a gate and a drain of 20 V and 10 V, respectively. There is a problem that the characteristics of the device can be changed by this positive voltage stress. Therefore, it is important to make a stable device that is resistant to constant positive voltage stress.

At this time, the stability of the thin film transistor element can be evaluated according to the frequency of trapping of free electrons due to the distribution of energy bands in a positive voltage stress state. That is, free electrons gathered near the gate insulator under a positive voltage stress are trapped in the gate insulator by an electric field or exist in the active layer (channel layer) due to the characteristics of an amorphous semiconductor. The less this phenomenon occurs, the more stable the thin film transistor element can be.

However, in the amorphous semiconductor thin film transistor research proposed so far, the higher the electric field or the more free electrons near the gate insulating film, although the above phenomenon occurs well, the current thin film transistor manufacturing process can be used as it is. There is a limit that fails to provide a thin film transistor device that can improve the stability.

The present invention has been proposed to solve the above problems of the conventionally proposed methods, by using an active layer of a structure in which a semiconductor layer having a different doping concentration is laminated, doping at a differential concentration that improves the current characteristics and stability It is an object of the present invention to provide an amorphous semiconductor thin film transistor having an active layer.

In addition, the present invention improves the stability of the device and improves ohmic contact by doping the doping concentration of the semiconductor layer in contact with the source and the drain higher than the doping concentration of the semiconductor layer closer to the gate side. It is another object of the present invention to provide an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration with improved contact characteristics to have an effect such as).

In addition, the present invention provides a free electron concentration in the semiconductor layer closer to the gate side by doping the doping concentration of the semiconductor layer in contact with the source and drain lower than the doping concentration of the semiconductor layer closer to the gate side. Another object is to provide an amorphous semiconductor thin film transistor having an active layer doped with a differential concentration, thereby increasing the current characteristic.

In addition, the present invention provides a method for manufacturing an amorphous semiconductor thin film transistor having an active layer doped with a differential concentration, which improves current characteristics and stability by using an active layer having a stacked structure of semiconductor layers having different doping concentrations. For another purpose.

An amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to a feature of the present invention for achieving the above object,

Gate 120;

The gate insulating layer 130;

An active layer 140 formed by stacking semiconductor layers doped at different concentrations;

It comprises a source 150 and a drain 160 formed in contact with the active layer, respectively, is characterized in its configuration.

Preferably, the thin film transistor,

The etch inhibitor 170 may further include.

Preferably, the active layer 140,

The semiconductor layer 141 doped with a first doping concentration and the semiconductor layer 142 doped with a second doping concentration are formed by stacking, and the first doping concentration may be different from the second doping concentration.

More preferably, the active layer 140,

The thickness of the semiconductor layer 141 doped with the first doping concentration may be the same as the thickness of the semiconductor layer 142 doped with the second doping concentration.

More preferably, the active layer 140,

The semiconductor layer 141 doped with the first doping concentration is located closer to the gate 120 than the semiconductor layer 142 doped with the second doping concentration, and the first doping concentration is the second. It may be lower than the doping concentration.

More preferably, the active layer 140,

The semiconductor layer 141 doped with the first doping concentration is located closer to the gate 120 than the semiconductor layer 142 doped with the second doping concentration, and the first doping concentration is the second. It may be higher than the doping concentration.

In addition, a method of manufacturing an amorphous semiconductor thin film transistor having an active layer doped with a differential concentration according to a feature of the present invention for achieving the above object,

In the method of manufacturing a thin film transistor including a gate 120, a gate insulating layer 130, an active layer 140, and a source 150 and a drain 160 formed in contact with the active layer, respectively,

The active layer 140,

(1) forming a semiconductor layer 141 doped with a first doping concentration;

And (2) forming the semiconductor layer 142 doped with a second doping concentration different from the first doping concentration.

Preferably,

The active layer 140 may be formed such that the thickness of the semiconductor layer 141 doped with the first doping concentration is the same as the thickness of the semiconductor layer 142 doped with the second doping concentration.

Preferably,

The first doping concentration is lower than the second doping concentration,

The active layer 140 may be formed so that the semiconductor layer 141 doped with the first doping concentration is disposed closer to the gate 120 than the semiconductor layer 142 doped with the second doping concentration. .

Preferably,

The first doping concentration is higher than the second doping concentration,

The active layer 140 may be formed so that the semiconductor layer 141 doped with the first doping concentration is disposed closer to the gate 120 than the semiconductor layer 142 doped with the second doping concentration. .

According to the amorphous semiconductor thin film transistor having an active layer doped with a differential concentration proposed in the present invention, the current characteristics and stability can be improved by using an active layer in which a semiconductor layer having a different doping concentration is stacked.

In addition, according to the present invention, the doping concentration of the semiconductor layer in contact with the source and drain is higher than the doping concentration of the semiconductor layer closer to the gate side, thereby increasing the stability of the device and having an effect such as ohmic contact. The contact characteristic can be improved.

Furthermore, according to the present invention, the doping concentration of the semiconductor layer in contact with the source and the drain is lower than the doping concentration of the semiconductor layer closer to the gate side, thereby free electrons in the semiconductor layer closer to the gate side. Increasing the concentration can increase the current characteristics.

1A and 1B illustrate a structure of an amorphous semiconductor thin film transistor having an active layer doped at differential concentrations according to an embodiment of the present invention.
1C and 1D illustrate a structure of an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration with an etch inhibitor according to an embodiment of the present invention.
2 is a view illustrating a trapping phenomenon of free electrons that may occur in a typical amorphous semiconductor thin film transistor as a positive voltage stress condition persists.
3A is a view showing a change in electric field according to the distance inside an active layer in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention.
3B is a view illustrating a change in concentration of free electrons according to a distance inside an active layer in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention.
FIG. 3C is a view illustrating a change of drain current according to a gate voltage in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention. FIG.
FIG. 4A illustrates the variation of drain current with gate voltage in an amorphous semiconductor thin film transistor having an active layer doped at differential concentrations and a conventional amorphous semiconductor thin film transistor doped at a high concentration according to an embodiment of the present invention. FIG.
FIG. 4B is a view showing the change of each electric field according to the distance inside an active layer in an amorphous semiconductor thin film transistor having an active layer doped with a differential concentration and a conventional amorphous semiconductor thin film transistor doped in a high concentration according to an embodiment of the present invention. .
FIG. 4C illustrates the variation of concentration of each free electron with distance within an active layer in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration and a conventional amorphous semiconductor thin film transistor doped at a high concentration according to an embodiment of the present invention. Shown.
5A through 5F illustrate a process of a method of manufacturing an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, in order that those skilled in the art can easily carry out the present invention. In the following detailed description of the preferred embodiments of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. In the drawings, like reference numerals are used throughout the drawings.

In addition, in the entire specification, when a part is referred to as being 'connected' to another part, it may be referred to as 'indirectly connected' not only with 'directly connected' . In addition, the term 'comprising' of an element means that the element may further include other elements, not to exclude other elements unless specifically stated otherwise.

1A to 1D show the structure of an amorphous semiconductor thin film transistor having an active layer doped at differential concentrations, respectively, according to one embodiment of the present invention. 1A to 1D, an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention includes a gate 120 and a gate insulating layer 130 formed on a substrate 110. ), An active layer 140 in which semiconductor layers doped at different concentrations are stacked, and a source 150 and a drain 160 formed in contact with both sides of the active layer, respectively. In addition, as illustrated in FIGS. 1C and 1D, the amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention further includes an etch stopper 170. Can be. According to an embodiment, the amorphous semiconductor thin film transistor according to the present invention may have a bottom gate structure in which a gate insulating layer 130 is formed on the gate 120, and an active layer 140 is formed thereon. Alternatively, the gate insulating layer 130 may be formed on the active layer 140, and may be configured as a top gate structure in which the gate 120 is formed thereon.

The substrate 110 may be formed of a material that may be used as a substrate of a conventional thin film transistor device. For example, glass, silicon, or an organic material may be used.

The gate 120 is a terminal for applying an on / off voltage input to the thin film transistor and may be formed of a conductive material such as metal or metal oxide. For example, Au, Pt, Ag, Cu , Metal such as W, or metal oxide such as AlZnO may be used.

The gate insulating layer 130 may be formed of an insulating material used in a conventional thin film transistor device, and silicon oxide or nitride such as SiO 2 , Al 2 O 3, or a mixture thereof may be used.

The source 150 and the drain 160 are electrodes in which current flows through the active layer according to the voltage applied to the gate electrode, and may be formed using a conductive material. For example, Au, Pt, Ag, Al, or Metal such as Cu or metal oxide such as AlZnO may be used.

The anti-etching agent 170, which may be further provided according to an embodiment of the present invention, is used to prevent the active layer from being etched together when an etching process of removing an unnecessary thin film is performed, and silicon nitride such as SiN x may be used. have.

The semiconductor layer constituting the active layer 140 serves as a path through which a charge carrier moves, and may be formed using an amorphous semiconductor. In this case, the amorphous semiconductor may have different physical and chemical properties according to the doping concentration of impurities. In the amorphous semiconductor thin film transistor according to the present invention, the active layer 140 is formed by including semiconductor layers doped at different concentrations. can do. That is, the active layer 140 may be formed by stacking a semiconductor layer heavily doped with a lightly doped semiconductor layer. In this case, the active layers 140 may be formed such that the thickness of each semiconductor layer is the same or different. In addition, the active layer 140 may be formed by stacking two or more semiconductor layers doped with different concentrations. For example, when three semiconductor layers are stacked, each semiconductor layer may be sequentially doped at high, medium, and low concentrations, or at low, medium, and high concentrations, respectively, in the order of stacking. .

The use of semiconductor layers doped with different concentrations together is for the purpose of improving the stability and current characteristics of the thin film transistor device under positive voltage stress (PBS). First, the stability of the thin film transistor device can be described in relation to the trapping phenomenon of free electrons. 2 illustrates a trap phenomenon of free electrons that may occur in a typical amorphous semiconductor thin film transistor as a positive voltage stress condition persists. In a positive voltage stress situation where a gate voltage (V G ) of 20 V and a drain voltage (V D ) of 10 V are respectively maintained so that a constant current flows in the thin film transistor device, a pseudo Fermi level among free electrons existing in the active layer is quasi. Free electrons having a greater energy than -fermi level 230 are collected to be adjacent to the interface where the active layer 140 and the gate insulating layer 130 meet. At this time, when the electric field is kept strong or the amount of free electrons adjacent to the interface is high, some of the free electrons adjacent to the gate insulating film 130 are present in the gate insulating film 130 or the active layer 140. The trapped phenomenon 210 or 220 may occur. If such a trap phenomenon occurs continuously and frequently, eventually, the characteristics of the device may be changed, thereby preventing the original function of the device. Therefore, even though the strength of the electric field maintaining the positive voltage stress is similar, the less the amount of free electrons near the interface, the less trapping of free electrons occurs, and as a result, the thin film transistor device may be more stable.

FIG. 3A illustrates a change of an electric field according to a distance inside an active layer in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention. More specifically, FIG. 3A illustrates a conventional amorphous semiconductor thin film transistor (Comparative Example 1), and in one embodiment according to the present invention, a bottom gate type amorphous semiconductor thin film transistor formed such that the doping concentration of the upper portion of the active layer is smaller than the doping concentration of the lower portion of the active layer. Embodiment 1), and in another embodiment according to the present invention, the bottom gate type amorphous semiconductor thin film transistor (Example 2) formed such that the doping concentration of the upper portion of the active layer is greater than the doping concentration of the lower portion of the active layer, the distance inside the active layer Indicates the change in electric field. As can be seen in FIG. 3A, a typical amorphous semiconductor thin film transistor (Comparative Example 1), an amorphous semiconductor thin film transistor (Example 1) in which a semiconductor layer adjacent to a gate is heavily doped, and a semiconductor layer adjacent to a gate are lightly doped In all three cases of the amorphous semiconductor thin film transistor (Example 2), the strength of the electric field remains similar in the portion adjacent to the gate inside the active layer.

3B illustrates a change in concentration of free electrons according to a distance inside an active layer in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention. More specifically, FIG. 3B illustrates a conventional amorphous semiconductor thin film transistor (Comparative Example 1), and a bottom gate type amorphous semiconductor thin film transistor formed according to an embodiment of the present invention such that the doping concentration of the upper portion of the active layer is smaller than the doping concentration of the lower portion of the active layer. Embodiment 1), and in another embodiment according to the present invention, the bottom gate type amorphous semiconductor thin film transistor (Example 2) formed so that the doping concentration of the upper portion of the active layer is greater than the doping concentration of the lower portion of the active layer, the distance inside the active layer It shows the change of concentration of free electrons. As can be seen in FIG. 3B, in the case of a conventional amorphous semiconductor thin film transistor (Comparative Example 1) and an amorphous semiconductor thin film transistor (Example 2) doped at a low concentration with a semiconductor layer adjacent to the gate, freedom in a portion adjacent to the gate inside the active layer. The amount of electrons is approximated. However, in the case of the amorphous semiconductor thin film transistor (Example 1) in which the semiconductor layer adjacent to the gate is heavily doped, the amount of free electrons in the adjacent portion of the gate inside the active layer is higher than that of the conventional amorphous semiconductor thin film transistor (Comparative Example 1). Appear more. That is, the stability of the amorphous semiconductor thin film transistor (Example 1) in which the semiconductor layer adjacent to the gate is heavily doped is low in the amorphous semiconductor thin film transistor (Example 2) or the conventional amorphous semiconductor thin film in which the semiconductor layer adjacent to the gate is lightly doped. It can be seen that it is somewhat lower than the transistor (Comparative Example 1).

However, as shown in FIG. 3C, even in the case of the amorphous semiconductor thin film transistor (Example 1) in which the semiconductor layer adjacent to the gate is heavily doped, the current characteristic thereof is higher than that of the conventional amorphous semiconductor thin film transistor (Comparative Example 1). About 2 times better. 3C illustrates a change in drain current according to a gate voltage in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to an embodiment of the present invention. More specifically, FIG. 3C illustrates a conventional amorphous semiconductor thin film transistor (Comparative Example 1), and a bottom gate type amorphous semiconductor thin film transistor formed according to an embodiment of the present invention such that the doping concentration of the upper portion of the active layer is smaller than the doping concentration of the lower portion of the active layer. Embodiment 1), and as another embodiment according to the present invention in the bottom gate type amorphous semiconductor thin film transistor (Example 2) formed so that the doping concentration in the upper portion of the active layer is larger than the doping concentration in the lower portion of the active layer, the gate voltage (V) GS ) shows the change of the drain current I DS . As can be seen in FIG. 3C, when a gate voltage (V GS ) of 20 V and a drain voltage (V DS ) of 10 V are applied, an amorphous semiconductor having a different doping concentration compared to a typical amorphous semiconductor thin film transistor (Comparative Example 1). The drain current I DS value in the thin film transistor (Example 1 or Example 2) is about two times larger. This results from the relationship between the total free electron amount and the current density present in the active layer. That is, the current density is expressed as Equation 1, where J is the current density, q is the charge amount, μ is the mobility of free electrons, n is the free electron amount, and

Figure pat00001
Denotes the strength of the electric field, respectively.

Figure pat00002

From Equation 1, the current density is the strength of the electric field

Figure pat00003
And free electron quantity n, respectively, as shown in FIG. 3A, a typical amorphous semiconductor thin film transistor (Comparative Example 1) and an amorphous semiconductor thin film transistor in which a semiconductor layer adjacent to a gate is heavily doped (implemented) Example 1), and in all three cases of an amorphous semiconductor thin film transistor (Example 2) in which the semiconductor layer adjacent to the gate was lightly doped (Example 2), the intensity of the electric field at the gate adjacent portion inside the active layer
Figure pat00004
Appears almost similarly. As a result, the current density J becomes proportional to the free electron amount n. As shown in FIG. 3B, in the case of the amorphous semiconductor thin film transistor (Example 2) in which the semiconductor layer adjacent to the gate is lightly doped (Example 2), In the distant part, in the case of the amorphous semiconductor thin film transistor (Example 1) in which the semiconductor layer adjacent to the gate is heavily doped, the free electrons are compared with the conventional amorphous semiconductor thin film transistor (Comparative Example 1) at the gate adjacent portion inside the active layer, respectively. A large quantity n appears. That is, in the case of the amorphous semiconductor thin film transistor (Example 2) in which the semiconductor layer adjacent to the gate is lightly doped, the doping concentration of the semiconductor layer in contact with the source and the drain is high, so that the contact resistance is small and the free electrons are easily moved. As a result, the current characteristics are improved, while in the case of an amorphous semiconductor thin film transistor (Example 1) in which a semiconductor layer adjacent to a gate is heavily doped (Example 1), since a large number of free electrons actually move in the semiconductor layer adjacent to the gate, As the doping concentration of the layer increases, the amount of free electrons moving increases to improve current characteristics.

On the other hand, in order to compare the stability of the amorphous semiconductor thin film transistor (Example 2) doped with a low concentration of the semiconductor layer adjacent to the gate and a conventional amorphous semiconductor thin film transistor, as shown in Figure 4a, after the current conditions are equally adjusted, You can check the amount of free electrons near the gate. FIG. 4A shows the variation of the drain current with the gate voltage in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration and a conventional amorphous semiconductor thin film transistor doped at a high concentration according to an embodiment of the present invention. More specifically, FIG. 4A shows a gate voltage of a low density doped amorphous semiconductor thin film transistor (Example 2) and a conventional amorphous semiconductor thin film transistor (Comparative Example 2) in which all of the active layers are heavily doped. The change of the drain current I DS according to (V GS ) is shown. As can be seen in FIG. 4A, in a typical amorphous semiconductor thin film transistor, when the doping concentration of the amorphous semiconductor constituting the active layer is increased to 2 × 10 10 cm -3 , current characteristics when a gate voltage V GS of 20V is applied. Silver appears to be close to the case of the amorphous semiconductor thin film transistor (Example 2) in which the semiconductor layer adjacent to the gate is lightly doped. More specifically, the conventional amorphous semiconductor thin film transistor (Comparative Example 2) in which the drain current I DS of the amorphous semiconductor thin film transistor (Example 2) in which the semiconductor layer adjacent to the gate is lightly doped is heavily doped in all of the active layers. It is about 7㎂ larger than the case, indicating that the current characteristics are improved.

Meanwhile, FIG. 4B illustrates the change of each electric field according to the distance inside the active layer in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration and a conventional amorphous semiconductor thin film transistor doped at a high concentration according to an embodiment of the present invention. Indicates. More specifically, FIG. 4B shows an active layer in an amorphous semiconductor thin film transistor (Example 2) in which the semiconductor layer adjacent to the gate is lightly doped and a typical amorphous semiconductor thin film transistor (Comparative Example 2) in which all of the active layer is heavily doped. It shows the change of electric field according to the distance inside. As can be seen in FIG. 4B, the electric field is approximated in both cases regardless of the distance inside the active layer. As a result, since the magnitude of the electric field is the same, the stability of the two cases can be confirmed by comparing the amount of free electrons in the vicinity of the gate. That is, as the amount of free electrons in the adjacent portion of the gate increases, more free electrons are trapped in the defective state of the gate insulating film or the active layer, and thus, the stability of the thin film transistor may be lowered.

FIG. 4C illustrates the variation of concentration of each free electron with distance within an active layer in an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration and a conventional amorphous semiconductor thin film transistor doped at a high concentration according to an embodiment of the present invention. Indicates. More specifically, FIG. 4C shows an amorphous semiconductor thin film transistor (Example 2) in which a semiconductor layer adjacent to a gate is lightly doped (Example 2), and a conventional amorphous semiconductor thin film transistor (Comparative Example 2) in which all of an active layer is heavily doped. It shows the change of concentration of free electron with distance. As can be seen in FIG. 4C, the amount of free electrons in the adjacent portion of the gate inside the active layer is a typical case where the amorphous semiconductor thin film transistor (Example 2) in which the semiconductor layer adjacent to the gate is lightly doped is highly doped with the entire active layer. It is lower than in the case of the amorphous semiconductor thin film transistor (Comparative Example 2). That is, in the amorphous semiconductor thin film transistor (Example 2) in which the semiconductor layer adjacent to the gate is lightly doped (Example 2), the stability is improved more than in the conventional amorphous semiconductor thin film transistor (Comparative Example 2) doped in a high concentration.

Table 1 shows a high concentration of the amorphous semiconductor thin film transistors (Examples 1 and 2), the conventional amorphous semiconductor thin film transistors (Comparative Example 1), and the active layers, all of which have the active layers doped at the different concentrations described above. In a typical amorphous semiconductor thin film transistor (Comparative Example 2), the pseudo Fermi level, the concentration of free electrons in the region adjacent to the gate, the concentration of free electrons in the entire active layer inside, and the magnitude of the drain current are shown.

Example 1 Example 2 Comparative Example 1 Comparative Example 2 Difference between Evangelism Band and Pseudo Fermi Level (eV)
| Ec-Efn | 0.0527 0.0419 0.039 0.047 Free electron concentration near the gate (cm -3 ) 2.89 × 10 18 2.29 × 10 18 2.17 × 10 18 2.60 × 10 18 Free electron concentration throughout the active layer (cm -3 ) 5.59 × 10 18 5.84 × 10 18 3.54 × 10 18 5.67 × 10 18 Drain current 117 128 63 121

5A to 5F illustrate a process of a bottom gate type amorphous semiconductor thin film transistor having an active layer doped at a differential concentration as another embodiment of the present invention. As shown in FIG. 5A, in order to fabricate an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration according to the present invention, a substrate 110 is first prepared, and a gate 120 is formed thereon. The substrate 110 may be formed using glass, silicon, an organic material, or the like, and the gate 120 may be formed by depositing and patterning a metal or a metal oxide on the substrate 110. Next, as shown in FIG. 5B, the gate insulating layer 130 is formed on the substrate 110 to cover the gate 120. The gate insulating layer 130 may be formed using silicon oxide or nitride.

Subsequently, as shown in FIG. 5C, the semiconductor layer 141 doped with the first doping concentration is formed. In this case, the semiconductor layer 141 doped with the first doping concentration may be formed using physical vapor deposition (PVD), such as evaporation or sputtering. In the bottom gate structure, the semiconductor layer 141 doped with the first doping concentration is formed closer to the gate side. Next, as shown in FIG. 5D, the semiconductor layer 142 doped with the second doping concentration is formed to be stacked on the semiconductor layer 141 having the first doping concentration. In this case, the first doping concentration and the second doping concentration are different concentrations, and according to an embodiment, the first doping concentration and the second doping concentration may be set to high concentration and low concentration, or low concentration and high concentration, respectively. In some embodiments, the thickness of the semiconductor layer 141 doped with the first doping concentration and the thickness of the semiconductor layer 142 doped with the second doping concentration may be the same or different. In some embodiments, a third doping concentration different from the first doping concentration and the second doping concentration may be set, and the semiconductor layer doped with the third doping concentration may be further stacked. In this case, the first doping concentration, the second doping concentration, and the third doping concentration may be sequentially set to high concentration, medium concentration, and low concentration, respectively, or may be set to low concentration, medium concentration, and high concentration, respectively. That is, the active layer 140 may be formed by stacking semiconductor layers having different doping concentrations regardless of the number of stacked semiconductor layers.

Next, as in FIG. 5E, the active layer 140 is patterned to a size corresponding to the gate 120, and then, as shown in FIG. 5F, the source 150 and the drain are respectively in contact with both sides of the active layer 140. To form 160. The source 150 and the drain 160 may be formed by forming a layer of a conductive material such as a metal or a metal oxide to cover the active layer and then patterning the active layer. According to an embodiment, before forming the source 150 and the drain 160, an etch inhibitor 170 using silicon nitride or the like is first formed on the active layer, and then the source 150 and the drain 160 are in contact with the source 150 and the drain 160. Can be formed.

Through the above process, an amorphous semiconductor thin film transistor in which semiconductor layers having different doping concentrations are stacked to form an active layer can be manufactured. According to an exemplary embodiment, an amorphous semiconductor thin film transistor may be manufactured in which the gate 120 and the gate insulating layer 130 are doped at different concentrations so as to have a top gate structure positioned on the active layer 140.

The present invention may be embodied in many other specific forms without departing from the spirit or essential characteristics of the invention.

110: substrate 120: gate
130: gate insulating film 140: active layer
141: semiconductor layer doped with first doping concentration
142: semiconductor layer doped with a second doping concentration
150: source 160: drain
170: etch inhibitor 180: passivation
210: free electrons trapped by the gate insulating film
220: free electron trapped in a defective state of the active layer
230: Doctor Fermi Level

Claims (10)

Gate 120;
The gate insulating layer 130;
An active layer 140 formed by stacking semiconductor layers doped at different concentrations;
And a source (150) and a drain (160) contacted to the active layer, respectively. The amorphous semiconductor thin film transistor having an active layer doped at a differential concentration.
The thin film transistor of claim 1,
An amorphous semiconductor thin film transistor having an active layer doped at a differential concentration, characterized in that it further comprises an etch inhibitor (170).
The method of claim 1, wherein the active layer 140,
The semiconductor layer 141 doped with a first doping concentration and the semiconductor layer 142 doped with a second doping concentration are formed by stacking, and the first and second doping concentrations, characterized in that different, An amorphous semiconductor thin film transistor having an active layer doped at an appropriate concentration.
The method of claim 3, wherein the active layer 140,
The thickness of the semiconductor layer 141 doped with the first doping concentration is the same as the thickness of the semiconductor layer 142 doped with the second doping concentration, the amorphous semiconductor thin film having an active layer doped with a differential concentration transistor.
The method of claim 3, wherein the active layer 140,
The semiconductor layer 141 doped with the first doping concentration is located closer to the gate 120 than the semiconductor layer 142 doped with the second doping concentration, and the first doping concentration is the second. An amorphous semiconductor thin film transistor having an active layer doped with a differential concentration, characterized in that it is lower than the doping concentration.
The method of claim 3, wherein the active layer 140,
The semiconductor layer 141 doped with the first doping concentration is located closer to the gate 120 than the semiconductor layer 142 doped with the second doping concentration, and the first doping concentration is the second. An amorphous semiconductor thin film transistor having an active layer doped at a differential concentration, characterized in that it is higher than the doping concentration.
In the method of manufacturing a thin film transistor including a gate 120, a gate insulating layer 130, an active layer 140, and a source 150 and a drain 160 formed in contact with the active layer, respectively,
The active layer 140,
(1) forming a semiconductor layer 141 doped with a first doping concentration;
(2) forming a semiconductor layer 142 doped with a second doping concentration different from the first doping concentration, wherein the amorphous semiconductor thin film transistor having an active layer doped with a differential concentration is produced. Manufacturing method.
The method of claim 7, wherein
The active layer 140 is formed such that the thickness of the semiconductor layer 141 doped with the first doping concentration and the thickness of the semiconductor layer 142 doped with the second doping concentration are the same. A method for manufacturing an amorphous semiconductor thin film transistor having an active layer doped with a.
The method of claim 7, wherein the first doping concentration is lower than the second doping concentration,
The active layer 140 is formed so that the semiconductor layer 141 doped with the first doping concentration is disposed closer to the gate 120 than the semiconductor layer 142 doped with the second doping concentration. A method for producing an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration.
The method of claim 7, wherein the first doping concentration is higher than the second doping concentration,
The active layer 140 is formed so that the semiconductor layer 141 doped with the first doping concentration is disposed closer to the gate 120 than the semiconductor layer 142 doped with the second doping concentration. A method for producing an amorphous semiconductor thin film transistor having an active layer doped at a differential concentration.
KR1020110110835A 2011-10-27 2011-10-27 Amorphous semiconductor thin film transistor with an active layer doped with differential concentrations and its manufacturing method KR20130046317A (en)

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