KR20130033680A - Method for manufacturing of printed circuit board - Google Patents

Method for manufacturing of printed circuit board Download PDF

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Publication number
KR20130033680A
KR20130033680A KR20110097498A KR20110097498A KR20130033680A KR 20130033680 A KR20130033680 A KR 20130033680A KR 20110097498 A KR20110097498 A KR 20110097498A KR 20110097498 A KR20110097498 A KR 20110097498A KR 20130033680 A KR20130033680 A KR 20130033680A
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KR
South Korea
Prior art keywords
layer
insulating layer
metal
carrier member
metal layer
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KR20110097498A
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Korean (ko)
Inventor
김기환
홍종국
손경진
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삼성전기주식회사
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Priority to KR20110097498A priority Critical patent/KR20130033680A/en
Publication of KR20130033680A publication Critical patent/KR20130033680A/en

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Abstract

PURPOSE: A manufacturing method of a PCB(Printed Circuit Board) is provided to control the hardened contraction of an insulating layer. CONSTITUTION: A first insulating layer(110) is formed on a carrier member(100) comprising an insulating material forming a metal thin film. A pressing plate(200) is arranged on a first metal layer(120) formed on the first insulating layer. The carrier member, the first insulating layer, and the first metal layer are pressured by using a pressing plate. A first circuit layer is formed by patterning the first metal layer.

Description

Method for manufacturing of printed circuit board

The present invention relates to a method of manufacturing a printed circuit board.

In general, a printed circuit board is wired on one or both sides of a board made of various thermosetting synthetic resins with copper foil, and then an IC or an electronic component is disposed and fixed on the board and coated with an insulator by implementing electrical wiring therebetween.

In recent years, there has been a rapid increase in the demand for high performance and light weight shortening of electronic components in the development of the electronic industry, and accordingly, printed circuit boards on which these electronic components are mounted are also required to have high density wiring and thinning.

In particular, a coreless substrate that is capable of reducing the thickness of the entire printed circuit board by reducing the thickness of the printed circuit board and thus shortening the signal processing time has been attracting attention in order to cope with thinning of the printed circuit board.

In order to manufacture the above-mentioned coreless board | substrate, a thin board | substrate, an odd layer board | substrate, etc., the board | substrate is manufactured using the carrier member of various forms.

On the other hand, a method of manufacturing a printed circuit board using a carrier member according to the prior art is disclosed in Patent No. 3811680 (Japanese Patent).

However, in the substrate manufacturing process using the carrier member according to the prior art, the substrate is manufactured through a process of laminating a plurality of insulating layers and circuit layers on the carrier member and heat-compressing the substrate. There is a problem that warpage occurs.

The present invention is to solve the above-mentioned problems of the prior art, an aspect of the present invention is to provide a method for manufacturing a printed circuit board for manufacturing a printed circuit board with a minimized warpage (warpage) generation.

In addition, another aspect of the present invention is to provide a method for manufacturing a printed circuit board for manufacturing a substrate in which the chip mounting process stability is secured.

According to one or more exemplary embodiments, a method of manufacturing a printed circuit board may include preparing a carrier member made of an insulating material having metal foils formed on one or both surfaces thereof, forming a first insulating layer on the carrier member, and Forming a first metal layer on the insulating layer, disposing a pressing plate on the first metal layer, and heat-pressing the carrier member, the first insulating layer, and the first metal layer using the pressing plate. And forming a first circuit layer by patterning the first metal layer, wherein a coefficient of thermal expansion (CTE) of the carrier member is lower than a coefficient of thermal expansion (CTE) of the pressing plate.

Here, the metal foil may be made of a first metal foil and a second metal foil formed on the first metal foil.

The apparatus may further include a release layer formed between the first metal foil and the second metal foil.

In addition, the first metal foil and the second metal foil may be made of copper (Cu).

In addition, the first metal layer may be a copper foil.

In addition, the pressing plate may be made of stainless steel.

In addition, forming the first circuit layer by patterning the first metal layer may include forming an etching resist on the first metal layer, disposing a patterned mask on the etching resist, and exposing and developing processes. The method may include exposing the first metal layer by removing the etching resist of the patterned portion using a photolithography method including a step of removing the exposed first metal layer.

In addition, after the forming of the first circuit layer, forming a second insulating layer on the first insulating layer, forming a second metal layer on the second insulating layer, and the second metal layer Arranging a pressing plate on the substrate; heat pressing the first insulating layer, the second insulating layer, and the second metal layer using the pressing plate; and separating the carrier member from the first insulating layer. It may include.

The method may further include forming a second circuit layer by patterning the second metal layer after heat pressing the first insulating layer, the second insulating layer, and the second metal layer and a plurality of insulating layers on the second insulating layer. And forming a plurality of circuit layers.

The features and advantages of the present invention will become more apparent from the following detailed description based on the accompanying drawings.

Prior to that, terms and words used in the present specification and claims should not be construed in a conventional and dictionary sense, and the inventor may properly define the concept of the term in order to best explain its invention It should be construed as meaning and concept consistent with the technical idea of the present invention.

The present invention has an effect of controlling the degree of cure shrinkage of the insulating layer formed on the carrier member by manufacturing a printed circuit board using a carrier member and a pressure plate having different thermal expansion coefficients.

In addition, the present invention, as described above, by controlling the degree of cure shrinkage (cure shrinkage) of the insulating layer formed on the carrier member, there is an effect that can minimize the occurrence of warpage (warpage) of the final printed circuit board .

In addition, the present invention, as described above, by producing a printed circuit board with a minimized warpage (warpage) generation, there is an effect that can be improved after the stability of the chip mounting process.

1 to 7 are cross-sectional views sequentially illustrating a method of manufacturing a printed circuit board according to an exemplary embodiment of the present invention.

The objects, specific advantages and novel features of the present invention will become more apparent from the following detailed description and embodiments associated with the accompanying drawings. In the present specification, in adding reference numerals to the components of each drawing, it should be noted that the same components as much as possible even if displayed on different drawings. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. In this specification, the terms first, second, etc. are used to distinguish one element from another, and the element is not limited by the terms.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 to 7 are process cross-sectional views sequentially illustrating a method of manufacturing a printed circuit board according to an exemplary embodiment of the present invention.

First, referring to FIG. 1, a carrier member 100 made of an insulating material 101 having metal foils 103 formed on one or both surfaces thereof is prepared.

In the present embodiment, a resin insulating material may be used as the insulating material 101.

The resin insulating material may be a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a resin impregnated with a reinforcing material such as glass fiber or an inorganic filler, for example, a prepreg, and also a thermosetting resin and / or Or a photocurable resin may be used, but is not particularly limited thereto.

In the present embodiment, as shown in FIG. 1, all of the metal foils 103 may be formed on the upper and lower surfaces of the insulating material 100, but is not particularly limited thereto. It is also possible to form only.

In the present embodiment, the metal foil 103 may include the first metal foil 103a and the second metal foil 103b formed on the first metal foil 103a as shown in FIG. 1, but is not particularly limited thereto.

Here, the first metal foil 103a and the second metal foil 103b may be made of copper (Cu), but are not particularly limited thereto, and may be made of nickel or aluminum.

In addition, the first metal foil 103a and the second metal foil 103b may be made of different metals or may be made of the same metals.

In addition, although not shown in FIG. 1, the carrier member 100 according to the present embodiment may further include a release layer (not shown) formed between the first metal foil 103a and the second metal foil 103b.

Here, the release layer (not shown) is for controlling the adhesion between the first metal foil 103a and the second metal foil 103b, and may be made of an adhesive material such as one or more metals or polymer materials.

In this case, when a metal is used as the release layer (not shown), the release layer (not shown) may use a different kind of metal from the first metal foil 103a and the second metal foil 103b.

In addition, the adhesive material such as the polymer material may include a material selected from the group consisting of fluorine-based, silicon-based, polyethylene terephthalate, polymethylpentene, and combinations thereof, but is not particularly limited thereto.

In addition, in this embodiment, the coefficient of thermal expansion (hereinafter, referred to as CTE) of the carrier member 100 is greater than the coefficient of thermal expansion (CTE) of the pressure plate 200 (see FIG. 3) to be used in a subsequent process. Can be low.

This will be described later in detail in the heat compression process step.

Next, referring to FIG. 2, the first insulating layer 110 is formed on the carrier member 100, and the first metal layer 120 is formed on the first insulating layer 110.

Here, the first insulating layer 110 may be a resin insulating material similar to the insulating material 100 described above.

In addition, the first metal layer 120 may be a copper foil, but is not particularly limited thereto.

Next, referring to FIG. 3, the pressing plate 200 is disposed on the first metal layer 120, and the carrier member 100, the first insulating layer 110, and the first metal layer 120 are heat-compressed. .

That is, as shown in FIG. 3, after the pressing plate 200 is disposed on the first metal layer 120, the tissue is loosened by applying pressure in the direction of the arrow to the pressing plate 200 while applying heat. The insulating layer 110, the carrier member 100, and the first metal layer 120 are compressed.

In this embodiment, the pressing plate 200 may be made of stainless steel, but is not particularly limited thereto.

In this process, when the pressing plate 200 is disposed on the first metal layer 120 and applied with heat, as shown in FIG. 3, the carrier member 100, the first metal layer 120, and the pressing plate 200 are directed in an arrow direction. Expansion may occur, and the first insulation layer 110 may have a cure shrinkage in the direction of an arrow.

In general, the carrier member 100 and the metal layer expand as the insulating layer and the metal layer are formed on the carrier member 100 and then pressurized while applying heat for the lamination process. The insulating layer will shrink.

At this time, since the thickness of the carrier member 100 is significantly larger than the thickness of the metal layer, the force that the carrier member 100 expands becomes larger than the force that the metal layer expands.

Accordingly, a portion of the insulating layer compressed on the carrier member 100 that is close to the carrier member 100, that is, less cure shrinkage of the lower portion of the insulating layer is generated, and that is far from the carrier member 100. Curing shrinkage of the upper portion of the insulating layer close to the metal layer is largely generated, so that both ends of the insulating layer are bent upwards, and concave smile warpage occurs in the center portion thereof.

At this time, the larger the coefficient of thermal expansion (CTE) of the carrier member 100, the more warpage may occur in the insulating layer.

Therefore, in the present exemplary embodiment, the thermal expansion coefficient CTE of the carrier member 100 is adjusted to adjust the size of the insulating layer that is close to the carrier member 100 to be cure shrinkage.

That is, if the size of the expansion that is expanded when applying heat by lowering the coefficient of thermal expansion (CTE) of the carrier member 100, the pulling force of the lower insulating layer in contact with the carrier member 100 will also be reduced, thereby insulating The degree of hardening shrinkage of the lower part of the layer is almost similar to that of the upper part of the insulating layer, thereby preventing the insulating layer from bending.

In this case, the coefficient of thermal expansion (CTE) of the carrier member 100 may be controlled by using a kind having a low coefficient of thermal expansion (CTE) for the insulating material 101 constituting the carrier member 100 or a low coefficient of thermal expansion of the metal foil 120 ( By using a metal type having CTE).

In general, the pressing plate 200 used in the lamination process may be made of stainless steel as described above, and the coefficient of thermal expansion (CTE) of the pressing plate 200 made of stainless steel is approximately 11 to 17 ppm. / ° C.

In the present embodiment, the carrier member 100 having a thermal expansion coefficient (CTE) lower than the thermal expansion coefficient (CTE) of the pressing plate 200 is used. In this case, the carrier member 100 is the thermal expansion of the pressing plate 200 described above. It may be prepared to have a coefficient of thermal expansion (CTE) that is approximately 1 to 17 ppm / ℃ difference than the coefficient (CTE), but is not particularly limited thereto.

For example, in the present embodiment, the thermal expansion coefficient CTE of the carrier member 100 is manufactured to be about 5 ppm / ° C. higher than the thermal expansion coefficient CTE of the pressing plate 200, and the thermal expansion of the carrier member 100 is increased. When the coefficient CTE is manufactured to be the same as the coefficient of thermal expansion CTE of the pressing plate 200, and the coefficient of thermal expansion CTE of the carrier member 100 is 5 ppm / than the coefficient of thermal expansion CTE of the pressing plate 200. In the case of manufacturing as small as ℃ ℃ warpage (warpage) changes occurring in the substrate for each was measured, the results are shown in the table below.

CTE- of Pressurized Plate
CTE of carrier member
-5 ppm / ℃ 0 ppm / ℃ 5 ppm / ℃
Warpage change 600 μm (concave) 400 μm (concave) 0 ~ 200㎛ (convex)

As shown in the table, when the coefficient of thermal expansion (CTE) of the carrier member 100 is larger than the coefficient of thermal expansion (CTE) of the pressing plate 200, the substrate has a concave shape in which both ends are bent upwards. When warpage is generated at a level of 600 μm and the coefficient of thermal expansion (CTE) of the carrier member 100 is the same as the coefficient of thermal expansion (CTE) of the pressing plate 200, the substrate has a concave in which both ends are curved upward. When the warpage of one shape is generated at a level of 400 μm and the coefficient of thermal expansion (CTE) of the carrier member 100 is smaller than the coefficient of thermal expansion (CTE) of the pressing plate 200, both ends of the substrate are bent downward. Warpage of the convex shape occurred at a level of 0 to 200 μm.

As such, when the carrier member 100 is manufactured to have a lower coefficient of thermal expansion (CTE) than the coefficient of thermal expansion (CTE) of the pressing plate 200, warpage that may occur in the substrate may be suppressed.

At this time, in the present experiment, when the coefficient of thermal expansion (CTE) of the carrier member 100 is about 5 to 10 ppm / ℃ lower than the coefficient of thermal expansion (CTE) of the pressing plate 200, the optimum results, but limited to this It will be apparent that the type of material and the metal layer stacked on the carrier member 100 may vary depending on the thickness and type of the metal layer.

Next, referring to FIG. 4, the first metal layer 120 is patterned to form the first circuit layer 125.

In this case, the forming of the first circuit layer 125 may be performed by the following process, but is not particularly limited thereto.

First, an etching resist (not shown) is formed on the first metal layer 120.

In this case, the etching resist (not shown) may be a dry film (DF), but is not particularly limited thereto.

Next, a patterned mask (not shown) is disposed on the etching resist (not shown), and then the etching resist (not shown) of the patterned portion is removed by a photolithography method including an exposure and development process. One metal layer 120 is exposed.

Next, the exposed first metal layer 120 is removed to form the first circuit layer 125.

In this case, removing the exposed first metal layer 120 may be performed by an etching process using an etching solution, but is not particularly limited thereto.

Next, referring to FIG. 5, a second insulating layer 130 is formed on the first insulating layer 110 to cover the first circuit layer 125, and a second metal layer is formed on the second insulating layer 130. 140 is formed.

Here, the second insulating layer 130 may be a resin insulating material similar to the insulating material 100 described above.

In addition, the first metal layer 140 may be a copper foil, but is not particularly limited thereto.

Next, referring to FIG. 6, the pressure plate 200 is disposed on the second metal layer 140, and then the pressure is applied to the pressure plate 200 in the direction of the arrow while applying heat to the first insulating layer 110. The second insulating layer 130 and the second metal layer 140 are compressed.

Next, referring to FIG. 7, the carrier member 100 and the first insulating layer 110 are separated.

At this time, as described above, the metal foil 103 of the carrier member 100 is composed of the first metal foil 103a and the second metal foil 103b, and between the first metal foil 103a and the second metal foil 103b. Since a release layer (not shown) is formed, separation of the carrier member 100 and the first insulating layer 110 is performed by the release layer (not shown), and thus the first insulating layer 110 separated after separation is formed. The second metal foil 103b may remain on the phase.

Thereafter, an outermost layer circuit (not shown) may be formed on the separated laminate 300, and a solder resist layer (not shown) may be formed to protect the formed outermost layer circuit (not shown).

Since the method of forming the outermost layer circuit (not shown) and the solder resist layer (not shown) are well known techniques, a detailed description thereof will be omitted.

In addition, the first insulating layer 110, the second insulating layer 130, and the second metal layer 140 may be compressed, and then the second metal layer 140 is patterned to form a second circuit layer (not shown). After forming a build-up layer (not shown) including a plurality of insulating layers (not shown) and a plurality of circuit layers (not shown) on the insulating layer 130 to manufacture a multilayer printed circuit board, as shown in FIG. 7. It is also possible to separate the carrier member 100 and the first insulating layer 110.

Although the present invention has been described in detail through specific embodiments of the present invention, this is for describing the present invention in detail and the method of manufacturing the printed circuit board according to the present invention is not limited thereto. It is obvious that modifications and improvements are possible by those skilled in the art.

It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

100: carrier member 101: insulating material
103: metal foil 103a: first metal foil
103b: second metal foil 110: first insulating layer
120: first metal layer 125: first circuit layer
130: second insulating layer 140: second metal layer
200 press plate 300 laminate

Claims (9)

Preparing a carrier member made of an insulating material having metal foil formed on one or both surfaces thereof;
Forming a first insulating layer on the carrier member;
Forming a first metal layer on the first insulating layer;
Disposing a pressure plate on the first metal layer;
Heating and compressing the carrier member, the first insulating layer, and the first metal layer using the pressing plate; And
Patterning the first metal layer to form a first circuit layer
And a coefficient of thermal expansion (CTE) of the carrier member lower than a coefficient of thermal expansion (CTE) of the pressing plate.
The method according to claim 1,
The metal foil is a manufacturing method of a printed circuit board consisting of a first metal foil and a second metal foil formed on the first metal foil.
The method according to claim 2,
The method of manufacturing a printed circuit board further comprising a release layer formed between the first metal foil and the second metal foil.
The method according to claim 2,
The first metal foil and the second metal foil is a manufacturing method of a printed circuit board made of copper (Cu).
The method according to claim 1,
The first metal layer is a copper foil (Cu foil) manufacturing method of a printed circuit board.
The method according to claim 1,
The pressing plate is a manufacturing method of a printed circuit board made of stainless steel (stainless steel).
The method according to claim 1,
Patterning the first metal layer to form a first circuit layer,
Forming an etching resist on the first metal layer;
Disposing a patterned mask on the etch resist;
Exposing the first metal layer by removing the etch resist of the patterned portion using a photolithography process including an exposure and development process; And
Removing the exposed first metal layer
And a step of forming the printed circuit board.
The method according to claim 1,
After forming the first circuit layer,
Forming a second insulating layer on the first insulating layer;
Forming a second metal layer on the second insulating layer;
Disposing a pressure plate on the second metal layer;
Thermally compressing the first insulating layer, the second insulating layer, and the second metal layer by using the pressing plate; And
Separating the carrier member and the first insulating layer
Further comprising the steps of:
The method according to claim 8,
After the step of thermally compressing the first insulating layer, the second insulating layer and the second metal layer,
Patterning the second metal layer to form a second circuit layer; And
Forming a plurality of insulating layers and a plurality of circuit layers on the second insulating layer
Further comprising the steps of:


KR20110097498A 2011-09-27 2011-09-27 Method for manufacturing of printed circuit board KR20130033680A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113923871A (en) * 2021-09-26 2022-01-11 东莞康源电子有限公司 Edge sealing design and manufacturing method of novel coreless substrate bearing layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113923871A (en) * 2021-09-26 2022-01-11 东莞康源电子有限公司 Edge sealing design and manufacturing method of novel coreless substrate bearing layer

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