KR20130025452A

KR20130025452A - Light emitting device

Info

Publication number: KR20130025452A
Application number: KR1020110085328A
Authority: KR
Inventors: 원종학; 정종필
Original assignee: 엘지이노텍 주식회사
Priority date: 2011-08-25
Filing date: 2011-08-25
Publication date: 2013-03-12

Abstract

PURPOSE: A light emitting device is provided to improve IQE(Internal Quantum Efficiency) by controlling the number of second well layers in a second active layer. CONSTITUTION: A first active layer(120) is arranged on a first semiconductor layer(110) and includes a first well layer. A second active layer(130) includes a second well layer and a second barrier layer. The second well layer is arranged on the first active layer and is thinner than the first well layer. The second barrier layer has a larger energy band gap than the second well layer and includes InxAlyGazN. A second semiconductor layer(150) is arranged on the second active layer.

Description

Light emitting device

An embodiment relates to a light emitting device.

LED (Light Emitting Diode) is a device that converts electrical signals into infrared, visible light or light using the characteristics of compound semiconductors. It is used in household appliances, remote controls, display boards, The use area of LED is becoming wider.

In general, miniaturized LEDs are made of a surface mounting device for mounting directly on a PCB (Printed Circuit Board) substrate, and an LED lamp used as a display device is also being developed as a surface mounting device type . Such a surface mount device can replace a conventional simple lighting lamp, which is used for a lighting indicator for various colors, a character indicator, an image indicator, and the like.

LED semiconductors are grown by a process such as MOCVD or molecular beam epitaxy (MBE) on a substrate such as sapphire or silicon carbide (SiC) having a hexagonal system structure.

In the active layer, the holes provided in the p-type semiconductor layer and the electrons provided in the n-type semiconductor layer recombine to generate light. In the LED, improving the probability of recombination of holes and electrons in the active layer is an important issue for improving the light efficiency. In particular, it is important to maximize the light efficiency at 10 to 60A / cm ² within the driving range of commercialized products. In addition, there is a need to improve the efficiency efficiency (efficiency droop) by increasing the drive current density of the product.

In the active layer, the holes provided in the p-type semiconductor layer and the electrons provided in the n-type semiconductor layer recombine to generate light. In the LED, improving the probability of recombination of holes and electrons in the active layer is an important issue for improving the light efficiency. Publication No. 10-2011-0072424 describes a technique for an active layer to increase the probability of recombination of electrons and holes.

The embodiment provides a light emitting device having improved light efficiency.

The light emitting device according to the embodiment includes a first semiconductor layer; A first active layer disposed on the first semiconductor layer and including the first well layer; Disposed on the first active layer, having a larger energy bandgap than the second well layer and the second well layer, which is thinner than the first well layer, and In _x Al _y Ga _z N (x + y + z = 1, 0 < a second active layer comprising a second barrier layer comprising x ≦ 1, 0 ≦ y <1, 0 ≦ z <1); And a second semiconductor layer disposed on the second active layer.

The light emitting device according to the embodiment has a well structure having a discontinuous energy level and a well structure having a continuous energy level at the same time to maximize the probability of recombination of electrons and holes, and to reduce light efficiency due to an increase in driving current density. ) Can be improved.

In the light emitting device according to the embodiment, the second barrier layer may include indium (In), thereby improving crystallinity.

In the light emitting device according to the embodiment, the second barrier layer may include indium (In) to supply holes provided from the second semiconductor layer to the first active layer.

The light emitting device according to the embodiment may improve the light efficiency of the first active layer by adjusting the number of first barrier layers.

The light emitting device according to the embodiment may improve the internal quantum efficiency (IQE) by adjusting the number of second well layers of the second active layer.

The light emitting device according to the embodiment can minimize the diffusion phenomenon by forming the first barrier layer or the second barrier layer in three layers.

The light emitting device according to the embodiment may control the maximum light efficiency and the light efficiency reduction rate by adjusting the thickness of the first well layer.

1 is a cross-sectional view showing the structure of a light emitting device according to the embodiment;
2 is a view showing an energy band gap of a light emitting device according to an embodiment;
3 is a view showing an energy band gap of a light emitting device according to an embodiment;
4 is a view showing an energy band gap of a light emitting device according to an embodiment;
5A illustrates an energy band gap of a light emitting device according to an embodiment;
5B is a view showing an energy band gap of the light emitting device according to the embodiment, FIG. 6 is a view showing an energy band gap of the light emitting device according to the embodiment;
7 is a graph showing the internal quantum efficiency according to the current change of the light emitting device according to the embodiment;
8 is a cross-sectional view showing the structure of a light emitting device according to the embodiment;
9A is a perspective view showing a light emitting device package including a light emitting device of the embodiment;
9B is a cross-sectional view showing a light emitting device package including a light emitting device of the embodiment;
10A is a perspective view illustrating a lighting device including a light emitting device module according to an embodiment;
10B is a cross-sectional view showing a lighting apparatus including a light emitting device module according to an embodiment;
11 is an exploded perspective view illustrating a backlight unit including a light emitting device module according to an embodiment; and
12 is an exploded perspective view illustrating a backlight unit including a light emitting device module according to an embodiment.

In the description of the embodiments, it is to be understood that each layer (film), region, pattern or structure is formed "on" or "under" a substrate, each layer The terms " on "and " under " encompass both being formed" directly "or" indirectly " In addition, the criteria for above or below each layer will be described with reference to the drawings.

The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.

Hereinafter, embodiments will be described in detail with reference to the drawings.

1 is a cross-sectional view illustrating a structure of a light emitting device 100 according to an embodiment, and FIGS. 2 to 6 are diagrams illustrating energy band gaps of light emitting devices 100 according to other embodiments.

Referring to FIG. 1, a light emitting device according to an embodiment may include a first active layer 120 disposed on a first semiconductor layer 110, a first semiconductor layer 110, and including a first well layer 122. The energy band gap is greater than that of the second well layer 132 and the second well layer 132 disposed on the first active layer 120 and thinner than the first well layer 122, and In _x Al _y Ga _z A second active layer 130 comprising a second barrier layer 134 comprising N (x + y + z = 1, 0 <x ≦ 1, 0 ≦ y <1, 0 ≦ z <1), and 2 includes a second semiconductor layer 150 disposed on the active layer 130.

The substrate (not shown) may be disposed under the first semiconductor layer 110. The substrate (not shown) may support the first semiconductor layer 110. The substrate (not shown) may receive heat from the first semiconductor layer 110. The substrate (not shown) may have a light transmissive property. The substrate (not shown) may have a light transmissive property when using a light transmissive material or formed below a predetermined thickness, but is not limited thereto. The refractive index of the substrate (not shown) is preferably smaller than the refractive index of the first semiconductor layer 110 for light extraction efficiency.

The substrate (not shown) may be formed of a semiconductor material according to an embodiment, for example, silicon (Si), germanium (Ge), gallium arsenide (GaAs), zinc oxide (ZnO), silicon carbide (SiC) It may be implemented as a carrier wafer such as silicon germanium (SiGe), gallium nitride (GaN), gallium (III) oxide (Ga ₂ O ₃ ).

The substrate (not shown) may be formed of a conductive material according to an embodiment. According to the embodiment, the metal may be formed of, for example, gold (Au), nickel (Ni), tungsten (W), molybdenum (Mo), copper (Cu), aluminum (Al), tantalum (Ta), or silver. It may be formed of any one selected from (Ag), platinum (Pt), chromium (Cr) or formed of two or more alloys, and may be formed by stacking two or more of the above materials. When the substrate (not shown) is formed of a metal, it is possible to facilitate the emission of heat generated from the light emitting device to improve the thermal stability of the light emitting device.

The substrate (not shown) may include a patterned substrate (PSS) structure on an upper surface of the substrate to increase light extraction efficiency, but is not limited thereto. The substrate (not shown) may improve the thermal stability of the light emitting device 100 by facilitating the emission of heat generated from the light emitting device 100. The substrate (not shown) may include a layer in which a difference between the first semiconductor layer 110 and the lattice constant exists to alleviate the lattice constant difference between the first semiconductor layer 110 and the first semiconductor layer 110.

The buffer layer (not shown) may be disposed between the substrate (not shown) and the first semiconductor layer 110. Buffer layers (not shown) include gallium nitride (GaN), indium nitride (InN), aluminum nitride (AlN), aluminum indium nitride (AlInN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), and indium It may be formed of one or more materials of aluminum gallium nitride (InAlGaN), but is not limited thereto. The buffer layer (not shown) may be grown as a single crystal on a substrate (not shown).

The buffer layer may reduce lattice mismatch between the substrate and the first semiconductor layer 110. The buffer layer (not shown) may allow the first semiconductor layer 110 to be easily grown on the top surface. The buffer layer (not shown) may improve crystallinity of the first semiconductor layer 110 disposed on the upper surface. The buffer layer (not shown) may be made of a material that can alleviate the lattice constant difference between the substrate (not shown) and the first semiconductor layer 110.

The first semiconductor layer 110 may be disposed on a substrate (not shown). The first semiconductor layer 110 may be disposed on the buffer layer (not shown) to match the difference in lattice constant with the substrate (not shown), but is not limited thereto. The first semiconductor layer 110 may be grown on a substrate (not shown), but is not limited to the horizontal light emitting device but may be applied to the vertical light emitting device.

The first semiconductor layer 110 may be implemented as an n-type semiconductor layer, and the n-type semiconductor layer may be, for example, In _x Al _y Ga ₁ _-x- _y N (0 ≦ x ≦ 1, 0 ≦ _y ≦ 1, A semiconductor material having a composition formula of 0 ≦ x + y ≦ 1, for example, gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium nitride (InN), InAlGaN, AlInN and the like can be selected. For example, the first semiconductor layer 110 may be doped with n-type dopants such as silicon (Si), germanium (Ge), tin (Sn), selenium (Se), and tellurium (Te).

The first semiconductor layer 110 may receive power from the outside. The first semiconductor layer 110 may provide electrons to the first active layer 120 and the second active layer 130.

The first active layer 120 may be disposed on the first semiconductor layer 110. The first active layer 120 may be disposed between the second semiconductor layer 150 and the first semiconductor layer 110.

The first active layer 120 may be formed of a semiconductor material. The first active layer 120 may be formed in a single or multiple well structure using a compound semiconductor material of Group III-Group 5 elements. The first active layer 120 may be formed of a nitride semiconductor. For example, the first active layer 120 may include gallium nitride (GaN), indium gallium nitride (InGaN), indium gallium nitride (InAlGaN), or the like.

A first well layer having a compositional formula of the first active layer 120 is for _{example, In x Al y Ga 1 -x-} y N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) ( 122) or _a first barrier layer 124 having a compositional formula of In _a Al _b Ga ₁ _-a- _b N (0 _{≦ a ≦} ₁ , 0 _≦ _b _≦ ₁ , 0 _{≦ a} + b _≦ 1) or It can have multiple well structures. The first well layer 122 may be formed of a material having a band gap smaller than the band gap of the first barrier layer 124.

The first active layer 120 may be formed by alternately stacking a plurality of first well layers 122 and a first barrier layer 124. The first active layer 120 may include a plurality of first well layers 122 to maximize light efficiency.

Referring to FIG. 2, the first active layer 120 includes a first well layer 122. The first active layer 120 may adjust the maximum light efficiency value by adjusting the thickness of the first well layer 122. The first well layer 122 may be thicker than the second well layer 132. As the thickness of the first well layer 122 increases, the maximum light efficiency value IQE may be lowered, the maximum light efficiency attained current density value may be increased, and the light efficiency degradation phenomenon may be improved.

The first well layer 122 may have a higher content of indium (In) than the first barrier layer 124. The first well layer 122 may have a smaller energy band gap than the first barrier layer 124. The first well layer 122 may have a smaller energy band gap than the first semiconductor layer 110. The first well layer 122 may have a continuous energy level of a carrier.

The thickness of the first well layer 122 may be 5 to 15 nm. When the thickness of the first well layer 122 is less than or equal to 5 nm, the energy level of the carrier may be discontinuously changed, thereby reducing the efficiency of light efficiency decrease due to the increase of the current, and the thickness of the first well layer 122 may be reduced. In the case of 15 nm or more, the improvement effect of the efficiency droop due to the increase of the driving current density increases, but the maximum light efficiency (IQE) may decrease.

The first barrier layer 124 can help carriers collect in the first well layer 122. A plurality of first barrier layers 124 may be stacked and stacked with a plurality of first well layers 122 to improve light efficiency of the first active layer 120, but is not limited thereto. The first barrier layer 124 may be repeatedly stacked alternately with the first well layer 122. The first barrier layer 124 may improve the light efficiency reduction phenomenon improvement function of the first active layer 120.

The first active layer 120 may have a small change in light efficiency in a high current region. The first active layer 120 may improve light efficiency degradation due to an increase in driving current density. The first active layer 120 may allow the light emitting device 100 to stabilize light efficiency even with a change in current.

The first barrier layer 124 may be disposed on the first well layer 122. The first barrier layer 124 may include In _x Al _y Ga _z N (x + y + z = 1, 0 <x ≦ 1, 0 ≦ y <1, 0 ≦ z <1). The first barrier layer 124 may have a larger energy band gap than the first well layer 122.

The first barrier layer 124 may be grown at about 700 ° C. The first barrier layer 124 may contain indium (In) to lower the growth temperature. The first barrier layer 124 may contain indium (In) to improve crystallinity.

The first barrier layer 124 adjacent to the second active layer 130 may have a thickness of about 5 nm to about 6 nm. When the thickness of the first barrier layer 124 is 5 nm or less, it is difficult to form a layer, and the function of collecting electrons and holes in the first well layer 122 may be degraded. The number of holes reaching the first well layer 122 may be reduced since the layer 124 may be lost due to non-emitting defects or the like.

Referring to FIG. 3, the first barrier layer 124 is formed of the first layer 12, the second layer 14 disposed on the first layer 12, and the second layer 14 disposed on the second layer 14. Three layers 16 may be included.

The energy bandgap of the second layer 14 may be smaller than the energy bandgap of the first layer 12 and the third layer 16. In the light emitting device according to the embodiment, the first layer 12 and the third layer 16 include gallium nitride (GaN), and the second layer 24 is formed of In _a Ga ₁ _-a N (0). <a≤1). In this embodiment, the second layer 14 contains indium (In), so that the energy bandgap of the second layer 14 may be smaller than the energy bandgap of the first layer 12 or the third layer 16. have. The first layer 12 or the third layer 16 may be formed of gallium nitride (GaN) to minimize diffusion that may occur through the first barrier layer 124.

In a light emitting device according to another embodiment, the second layer 14 includes In _a Ga ₁ _-a N (0 <a ≦ 1), and the first layer 12 and the third layer 16 are In _b Ga _1- _b N (0 <b <a ≦ 1). In the present embodiment, the indium (In) content of the second layer 14 is greater than the indium (In) content of the first layer 12 and the third layer 16, so that the second layer 14 The energy bandgap may be smaller than the energy bandgap of the first layer 12 or the third layer 16. Indium (In) content of the first layer 12 or the third layer 16 is lower than that of the second layer 14, and thus may be generated through the first barrier layer 124 than when only the second layer 14 is present. This can minimize the diffusion phenomenon.

The indium (In) content a of the second layer 14 may be 0.01 to 0.06. When a, the indium (In) content of the second layer 14 is less than 0.01, the effect of reducing the energy band gap is insignificant, so that the effect of providing the carrier to the first well layer 122 may be reduced. If greater than 0.06, the second layer 14 may have flexibility due to the influence of indium (In), which may make it difficult to maintain the structure of the second layer 14.

The thickness of the first layer 12 or the third layer 16 may be 1 to 2 nm. When the thickness of the first layer 12 or the third layer 16 is 1 nm or less, the effect of reducing interdiffusion that may occur in the first barrier layer 124 may be reduced, and the thickness may be 2 nm or more. In this case, the light efficiency can be reduced by excessively inhibiting the movement of electrons or holes.

The second active layer 130 may be disposed on the first active layer 120. The second active layer 130 may be formed of a single or multiple quantum well structure, a quantum-wire structure, a quantum dot structure, or the like using a compound semiconductor material of a group III-V group element. .

When the second active layer 130 is formed of a quantum well structure, for example, a compositional formula of _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) A second barrier layer having a composition formula of a second well layer 132 having In _a Al _b Ga ₁ _-a- _b N (0 _{≦ a ≦} ₁ , 0 _≦ _b _≦ ₁ , 0 _{≦ a} + b _≦ ₁ ) 134) may have a single or quantum well structure. The second well layer 132 may be formed of a material having a band gap smaller than the band gap of the second barrier layer 134.

Referring to FIG. 4, the second active layer 130 may be formed by alternately stacking a plurality of second well layers 132 and a second barrier layer 134. The second active layer 130 may include a plurality of second well layers 132 to maximize light efficiency by increasing the recombination rate of holes and electrons.

The second barrier layer 134 may have a lower content of indium (In) than the second well layer 132. The second well layer 132 may have a smaller energy band gap than the second barrier layer 134. The energy barrier gap of the second barrier layer 134 may be smaller than or equal to that of the second semiconductor layer 150. In the second well layer 132, the energy level of the carrier may be discontinuous. That is, the energy level of the second well layer 132 may be quantized.

The second barrier layer 134 can help carriers collect in the second well layer 132. The second barrier layer 134 may be plural and stacked with a plurality of second well layers 132 to improve the light efficiency of the second active layer 130, but is not limited thereto. The second barrier layer 134 may be repeatedly stacked alternately with the second well layer 132. The second barrier layer 134 may improve a light efficiency reduction phenomenon improvement function of the second active layer 130.

The second barrier layer 134 may be disposed on the second well layer 132. The second barrier layer 134 may include In _x Al _y Ga _z N (x + y + z = 1, 0 <x ≦ 1, 0 ≦ y <1, 0 ≦ z <1). The second barrier layer 134 may have a larger energy band gap than the second well layer 132.

In the light emitting device 100 according to an exemplary embodiment, the energy band gap of the second barrier layer 134 adjacent to the second semiconductor layer 150 may be smaller than the energy band gap of the second semiconductor layer 150. The second barrier layer 134 may help holes that are injected and moved from the second semiconductor layer 150 to the first well layer 122.

Referring to FIG. 5A, in the light emitting device 100 according to another exemplary embodiment, the energy band gap of the second barrier layer 134 adjacent to the second semiconductor layer 150 may correspond to the energy band gap of the second semiconductor layer 150. May be the same. In this case, the second barrier layer 134 may have an effect of primarily blocking electrons. The second barrier layer 134 may help the function of an electron blocking layer (EBL).

The second barrier layer 134 may be grown at about 700 ° C. The second barrier layer 134 may contain indium (In) to lower the growth temperature. The second barrier layer 134 may contain indium (In) to improve crystallinity.

A plurality of second barrier layers 134 and closer to the first active layer 120 may have a higher content of indium (In). The closer the second barrier layer 134 is to the first active layer 120, the smaller the energy band gap. The second barrier layer 134 may improve the efficiency of transferring holes from the second semiconductor layer 150 to the first well layer 122.

Referring to FIG. 5B, the light emitting device 100 may have a plurality of second barrier layers 132, and the second barrier layer 132 may be closer to the first active layer 120. have.

As the second barrier layer 132 is closer to the first active layer 120, the energy band gap may be smaller. The second barrier layer 132 may maximize the hole transfer efficiency to the first well layer 122.

Referring to FIG. 6, the second barrier layer 134 is formed of the fourth layer 22, the fifth layer 24 disposed on the fourth layer 22, and the fifth layer 24 disposed on the fifth layer 24. Six layers 26 may be included.

The energy bandgap of the fifth layer 24 may be smaller than the energy bandgap of the fourth layer 22 and the sixth layer 26. In the light emitting device according to the embodiment, the fourth layer 22 and the sixth layer 26 include gallium nitride (GaN), and the fifth layer 24 includes In _a Ga ₁ _-a N (0 < a ≦ 1). In this embodiment, the fifth layer 24 contains indium (In), so that the energy bandgap of the fifth layer 24 may be smaller than the energy bandgap of the fourth layer 22 or the sixth layer 26. have. The fourth layer 12 or the sixth layer 26 may be formed of gallium nitride (GaN) to minimize diffusion that may occur through the second barrier layer 134.

In the light emitting device according to another embodiment, the fifth layer 24 includes In _a Ga ₁ _-a N (0 <a ≦ 1), and the fourth layer 22 and the sixth layer 26 are In _b Ga _1- _b N (0 <b <a ≦ 1). In this embodiment, the indium (In) content of the fifth layer 24 is greater than the indium (In) content of the fourth layer 22 and the sixth layer 26, so that the fifth layer 24 The energy band gap may be smaller than the energy band gap of the fourth layer 22 or the sixth layer 26. The fourth layer 22 or the sixth layer 26 has a lower indium (In) content than the fifth layer 24, and thus may be generated through the second barrier layer 134 than when the fifth layer 24 is present. This can minimize the diffusion phenomenon.

The indium (In) content a of the fifth layer 24 may be 0.01 to 0.06. When the indium (In) content a of the fifth layer 24 is less than 0.01, the effect of reducing the energy band gap is insignificant, so that holes are provided in the first well layer 122 or the second well layer 132. When the effect may be reduced and a becomes larger than 0.06, the fifth layer 24 may have flexibility due to the influence of indium (In), which may make it difficult to maintain the structure of the fifth layer 24.

The thickness of the fourth layer 22 or the sixth layer 26 may be 1 to 2 nm. When the thickness of the fourth layer 22 or the sixth layer 26 is 1 nm or less, the effect of reducing the interdiffusion that may occur in the second barrier layer 134 may be reduced, and the thickness may be 2 nm. In this case, the light efficiency can be reduced by excessively inhibiting the movement of electrons or holes.

7 is a graph showing the internal quantum efficiency according to the current change of the light emitting device according to the embodiment.

Referring to FIG. 7, when the graph a includes multiple quantum wells (MQWs), the graph b shows the first barrier layer 124 and the second barrier layer 134 contain indium (In). In one case, the graph c shows that the first barrier layer 124 comprises the first layer 12, the second layer 14, and the third layer 16, and the second barrier layer 134 is the fourth layer. Internal quantum efficiency according to the current change of the light emitting element 100 in the case of including (22), the fifth layer 24, and the sixth layer 26 is shown.

The light emitting device 100 includes a first active layer 120 having a continuous energy level and a second active layer 130 having a discontinuous energy level, and a barrier layer included in each of the light emitting devices 100 includes indium (In). Can be maintained. Referring to the graph b, in the light emitting device 100, holes provided in the second semiconductor layer 150 may be provided to the first active layer 120 and the second active layer 130 at about the same time. The light emission may be simultaneously started in the second active layer 130. Light emitting device 100 is 10A / cm ₂ In the low current region below, the light emitting diode may have a maximum light efficiency similar to that of a light emitting diode having a multiple quantum well structure (MQW). In addition, the light emitting device 100 may improve an efficiency droop due to an increase in driving current density that may occur in a 10 to 60 A / cm ₂ region.

Referring to the graph c, it is confirmed that the efficiency droop is improved by increasing the driving current density more than the case where the first barrier layer 124 and the second barrier layer 134 contain indium (In). Can be.

The second semiconductor layer 150 may be formed on the second active layer 130. The second semiconductor layer 150 may be implemented as a p-type semiconductor layer doped with a p-type dopant. A second semiconductor layer 150 contains a semiconductor material, for example, having a compositional formula of _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) It can be selected from gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), Indium nitride (InN), InAlGaN, AlInN, etc. P-type dopants such as calcium (Ca), strontium (Sr), and barium (Ba) may be doped.

The first semiconductor layer 110, the first active layer 120, the second active layer 130, and the second semiconductor layer 150 may be, for example, metal organic chemical vapor deposition (MOCVD) or chemical vapor deposition. Chemical Vapor Deposition (PECVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE) It may be formed using, but is not limited thereto.

The doping concentrations of the conductive dopants in the first semiconductor layer 110 and the second semiconductor layer 150 may be formed uniformly or non-uniformly, but are not limited thereto.

When the light emitting device 100 is a horizontal light emitting diode, the first electrode layer (not shown) may be disposed in one region of the first semiconductor layer 110. The first electrode layer (not shown) may be electrically connected to the first semiconductor layer 110. The first electrode layer (not shown) may transfer power connected from the outside to the first semiconductor layer 110.

The second electrode layer (not shown) may be disposed in one region of the second semiconductor layer 150. The second electrode layer (not shown) may be electrically connected to the second semiconductor layer 150. The second electrode layer (not shown) may provide power to the second semiconductor layer 150 provided from the outside.

The first electrode layer (not shown) and the second electrode layer (not shown) may be conductive materials such as indium (In), cobalt (Co), silicon (Si), germanium (Ge), gold (Au), and palladium (Pd). ), Platinum (Pt), ruthenium (Ru), rhenium (Re), magnesium (Mg), zinc (Zn), hafnium (Hf), tantalum (Ta), rhodium (Rh), iridium (Ir), tungsten (W ), Titanium (Ti), silver (Ag), chromium (Cr), molybdenum (Mo), niobium (Nb), aluminum (Al), nickel (Ni), copper (Cu), and titanium tungsten alloy (WTi) It can be formed in a single layer or multiple layers using a metal or alloy selected from among.

An electron blocking layer (EBL) 140 may be disposed between the second active layer 130 and the second semiconductor layer 150. In the electron blocking layer 140, electrons transferred from the first semiconductor layer 110 do not recombine with holes in the first well layer 122 or the second well layer 132, and exit to the second semiconductor layer 150. Can be blocked.

Referring to FIG. 8, the light emitting device may be a vertical light emitting diode. The foregoing is not explained in detail.

The light emitting device is disposed on the substrate 210, the first electrode layer 240 disposed on the substrate 210, the second semiconductor layer 260 disposed on the first electrode layer 240, and the second semiconductor layer 260. On the electron blocking layer 262, the second active layer 264 disposed on the electron blocking layer 262, on the first active layer 266 and the first active layer 266 disposed on the second active layer 264. The first semiconductor layer 268 is disposed on, and the second electrode layer 280 is disposed on the first semiconductor layer 268.

The substrate 210 may be formed using a material having excellent thermal conductivity, and may also be formed of a conductive material, and may be formed using a metal material or a conductive ceramic. The substrate 210 may be formed of a single layer, and may be formed of a dual structure or multiple multiple structures.

The first electrode layer 240 may be formed on the substrate 210, and the first electrode layer 240 may be an ohmic layer 246, a reflective layer 242, and a bonding layer. (Not shown). For example, the first electrode layer 240 may be a structure of an ohmic layer / reflective layer / bonding layer, a stacked structure of an ohmic layer / reflective layer, or a structure of a reflective layer (including ohmic) / bonding layer, but is not limited thereto. For example, the first electrode layer 240 may have a form in which the reflective layer 242 and the ohmic layer 246 are sequentially stacked on the insulating layer.

The reflective layer 242 may be disposed between the ohmic layer 246 and an insulating layer (not shown), and have a good reflective property, for example, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn , Pt, Au, Hf and may be formed from a material consisting of a selective combination thereof, or may be formed in a multi-layer using the metal material and a light-transmitting conductive material such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO. . In addition, the reflective layer 242 may be laminated with IZO / Ni, AZO / Ag, IZO / Ag / Ni, AZO / Ag / Ni, or the like. In addition, when the reflective layer 242 is formed of a material in ohmic contact with the second semiconductor layer 260, the ohmic layer 246 may not be separately formed, but is not limited thereto.

The ohmic layer 246 is in ohmic contact with a lower surface of the second semiconductor layer 260 and may be formed in a layer or a plurality of patterns. The ohmic layer 246 may be selectively used as a light transmitting electrode layer and a metal. For example, the indium tin oxide (ITO), the indium zinc oxide (IZO), the indium zinc tin oxide (IZTO), and the indium aluminum zinc oxide (IAZO) may be used. , Indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IrO _x , RuO _x , RuO _x / ITO, Ni , Ag, Ni / IrO _x / Au, and Ni / IrO _x / Au / ITO may be used to implement a single layer or multiple layers. The ohmic layer 246 is for smoothly injecting a carrier into the second semiconductor layer 260 and is not necessarily formed.

The second semiconductor layer 260 may be disposed on the first electrode layer 240. The second semiconductor layer 260 may be implemented as a p-type semiconductor layer doped with a p-type dopant. The p-type semiconductor layer is a semiconductor material having a composition formula of In _x Al _y Ga ₁ _-x- _y N (0≤x≤1, 0≤y≤1, 0≤x + y≤1), for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN and the like may be selected, and p-type dopants such as Mg, Zn, Ca, Sr, and Ba may be doped.

The electron blocking layer 262 may be disposed on the second semiconductor layer 260.

Electron blocking layer 262 may be, for example, be formed by a semiconductor material having a composition of _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1). On the other hand, the higher the composition of Al, the greater the bandgap energy, so that the composition of Al in the electron blocking layer 262 may gradually increase in the thickness direction, but is not limited thereto.

The electron blocking layer 262 may not be recombined with holes from the first well layer (not shown) or the second well layer (not shown) to the second semiconductor layer 260. You can block the exit.

The second active layer 264 may be disposed on the electron blocking layer 262. The second active layer 264 may be formed by alternately stacking a plurality of second well layers (not shown) and second barrier layers (not shown). The second active layer 264 may include a plurality of second well layers (not shown) to maximize light efficiency. The second barrier layer (not shown) may include indium (In), thereby improving crystallinity and having an energy band gap smaller than that of the second semiconductor layer 260. The second barrier layer (not shown) may improve the efficiency of transferring holes provided from the second semiconductor layer 260 to the first active layer 266.

The first active layer 266 may be disposed on the second active layer 264. The first active layer 266 may be formed by alternately stacking a plurality of first well layers (not shown) and first barrier layers (not shown). The first active layer 266 may include a plurality of first well layers (not shown) to maximize light efficiency. The first barrier layer (not shown) may include indium (In), thereby improving crystallinity and having an energy band gap smaller than that of the first semiconductor layer 260. The second barrier layer (not shown) may improve efficiency of transferring holes provided from the second semiconductor layer 260 to the first well layer (not shown).

The first semiconductor layer 268 may be disposed on the first active layer 266. The first semiconductor layer 268 may be implemented as an n-type semiconductor layer, and the n-type semiconductor layer may be, for example, In _x Al _y Ga ₁ _-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x a semiconductor material having a compositional formula of + y ≦ 1), for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, and the like, and for example, n, such as Si, Ge, Sn, Se, Te, etc. Type dopants may be doped.

The light extraction structure 270 may be formed on the first semiconductor layer 268.

The light extracting structure 270 may be formed on the upper surface of the first semiconductor layer 268, but is not limited thereto.

The light extracting structure 270 may be formed in a part or the entire area of the upper surface of the first semiconductor layer 268. The light extracting structure 270 may be formed by performing etching on at least one region of the upper surface of the first semiconductor layer 268, but is not limited thereto. The etching process may include a wet or dry etching process, and as the etching process is performed, the top surface of the first semiconductor layer 268 may include roughness forming the light extraction structure 270. The roughness may be irregularly formed in a random size, but is not limited thereto. The roughness may be at least one of a texture pattern, a concave-convex pattern, and an uneven pattern, which is an uneven surface.

The roughness may be formed to have various shapes such as a cylinder, a polygonal column, a cone, a polygonal pyramid, a truncated cone, a polygonal pyramid, and the like, preferably including a horn shape.

The light extraction structure 270 may be formed by a method such as photo electrochemical (PEC), but is not limited thereto. As the light extracting structure 270 is formed on the upper surface of the first semiconductor layer 268, light generated from the first well layer (not shown) and the second well layer (not shown) is transferred to the first semiconductor layer 268. Since it can be prevented from being totally reflected from the upper surface of the re-absorbed or scattered, it can contribute to the improvement of the light extraction efficiency of the light emitting device.

A second electrode layer 280 electrically connected to the first semiconductor layer 268 may be formed on the first semiconductor layer 268, and the second electrode layer 280 may include at least one pad or an electrode having a predetermined pattern. It may include. The second electrode layer 280 may be disposed in the center region, the outer region, or the corner region of the upper surface of the first semiconductor layer 268, but is not limited thereto. The second electrode layer 280 may be disposed in an area other than the upper surface of the first semiconductor layer 268, but is not limited thereto.

The second electrode layer 280 is a conductive material, for example, In, Co, Si, Ge, Au, Pd, Pt, Ru, Re, Mg, Zn, Hf, Ta, Rh, Ir, W, Ti, Ag, Cr It may be formed in a single layer or multiple layers using a metal or an alloy selected from among Mo, Nb, Al, Ni, Cu, and WTi.

9A is a perspective view illustrating a light emitting device package 300 according to an embodiment of the present invention, and FIG. 9B is a cross-sectional view illustrating a cross section of the light emitting device package 300 according to another embodiment.

9A and 9B, the light emitting device package 300 according to the embodiment may include a body 310 having a cavity formed therein, and first and second electrodes 340 and 350 mounted on the body 310. The light emitting device 320 electrically connected to the two electrodes and the encapsulant 330 formed in the cavity may be included, and the encapsulant 330 may include a phosphor (not shown).

The body 310 may be made of a resin material such as polyphthalamide (PPA), silicon (Si), aluminum (Al), aluminum nitride (AlN), photo sensitive glass (PSG), polyamide 9T ), new geo-isotactic polystyrene (SPS), metal materials, sapphire (Al ₂ O _3), beryllium oxide (BeO), is a printed circuit board (PCB, printed circuit board), it may be formed of at least one of ceramic. The body 310 may be formed by injection molding, etching, or the like, but is not limited thereto.

The inner surface of the body 310 may be formed with an inclined surface. The reflection angle of the light emitted from the light emitting device 320 can be changed according to the angle of the inclined surface, and thus the directivity angle of the light emitted to the outside can be adjusted.

The shape of the cavity formed in the body 310 as viewed from above may be circular, rectangular, polygonal, elliptical, or the like, and in particular, may have a curved shape, but is not limited thereto.

The encapsulant 330 may be filled in the cavity and may include a phosphor (not shown). The encapsulant 330 may be formed of transparent silicone, epoxy, and other resin materials. The encapsulant 330 may be formed in such a manner that the encapsulant 330 is filled in the cavity and then cured by ultraviolet rays or heat.

The phosphor (not shown) may be selected according to the wavelength of the light emitted from the light emitting device 320 to allow the light emitting device package 300 to realize white light.

The fluorescent material (not shown) included in the encapsulant 330 may be a blue light emitting phosphor, a blue light emitting fluorescent material, a green light emitting fluorescent material, a yellow green light emitting fluorescent material, a yellow light emitting fluorescent material, Fluorescent material, orange light-emitting fluorescent material, and red light-emitting fluorescent material may be applied.

The phosphor (not shown) may be excited by the light having the first light emitted from the light emitting device 320 to generate the second light. For example, when the light emitting element 320 is a blue light emitting diode and the phosphor (not shown) is a yellow phosphor, the yellow phosphor may be excited by blue light to emit yellow light, and blue light emitted from the blue light emitting diode As the yellow light generated by excitation by blue light is mixed, the light emitting device package 300 can provide white light.

When the light emitting device 320 is a green light emitting diode, a magenta phosphor or a blue and red phosphor (not shown) is mixed. When the light emitting device 320 is a red light emitting diode, a cyan phosphor or a blue and green phosphor is mixed. For example,

The phosphor (not shown) may be a known one such as YAG, TAG, sulfide, silicate, aluminate, nitride, carbide, nitridosilicate, borate, fluoride, or phosphate.

The first electrode 340 and the second electrode 350 may be mounted on the body 310. The first electrode 340 and the second electrode 350 may be electrically connected to the light emitting device 320 to supply power to the light emitting device 320.

The first electrode 340 and the second electrode 350 are electrically separated from each other and reflect light generated from the light emitting device 320 to increase light efficiency. The first electrode 340 and the second electrode 350 may discharge heat generated from the light emitting device 320 to the outside.

In FIG. 9B, the light emitting device 320 is mounted on the first electrode 340, but is not limited thereto. The light emitting device 320, the first electrode 340, and the second electrode 350 may be wire bonded. May be electrically connected by any one of the following methods, a flip chip method, and a die bonding method.

The first electrode 340 and the second electrode 350 may be formed of a metal material such as titanium (Ti), copper (Cu), nickel (Ni), gold (Au), chromium (Cr), tantalum ), Platinum (Pt), tin (Sn), silver (Ag), phosphorous (P), aluminum (Al), indium (In), palladium (Pd), cobalt ), Hafnium (Hf), ruthenium (Ru), and iron (Fe). The first electrode 340 and the second electrode 350 may have a single-layer structure or a multi-layer structure, but the present invention is not limited thereto.

The light emitting device 320 is mounted on the first electrode 340 and may be a light emitting device that emits light such as red, green, blue, or white, or a UV (Ultra Violet) However, the present invention is not limited thereto. One or more light emitting devices 320 may be mounted.

The light emitting device 320 is applicable to both a horizontal type whose electrical terminals are all formed on the upper surface, a vertical type formed on the upper and lower surfaces, or a flip chip.

The light emitting device package 300 may include a light emitting device.

The light emitting device 320 may include a first active layer (not shown) and a second active layer (not shown) in which the barrier layer includes indium (In). The light emitting device 320 includes a first barrier layer (not shown) and a second barrier layer (not shown) including indium (In) to maintain mobility of holes provided in the second semiconductor layer (not shown). It may be provided to the first well layer (not shown) and the second well layer (not shown).

The light emitting device 320 may include the first barrier layer (not shown) and the second barrier layer (not shown) to maximize reliability and light extraction amount of the light emitting device package 300.

A light guide plate, a prism sheet, a diffusion sheet, and the like, which are optical members, may be disposed on a light path of the light emitting device package 300.

The light emitting device package 300, the substrate, and the optical member may function as a light unit. Another embodiment may be implemented as a display device, an indicating device, a lighting system including a light emitting device (not shown) or a light emitting device package 300, for example, the lighting system may include a lamp, a streetlight .

10A is a perspective view illustrating a lighting system 400 including a light emitting device according to an embodiment, and FIG. 10B is a cross-sectional view illustrating a cross-sectional view taken along line D-D 'of the lighting system of FIG. 10A.

That is, FIG. 10B is a cross-sectional view of the illumination system 400 of FIG. 10A cut in the plane of the longitudinal direction Z and the height direction X, and viewed in the horizontal direction Y. FIG.

10A and 10B, the lighting system 400 may include a body 410, a cover 430 coupled to the body 410, and a closing cap 450 positioned at both ends of the body 410. have.

The lower surface of the body 410 is fastened to the light emitting device module 443, the body 410 is conductive and so that the heat generated from the light emitting device package 444 can be discharged to the outside through the upper surface of the body 410 The heat dissipation effect may be formed of an excellent metal material, but is not limited thereto.

The light emitting device package 444 may include a light emitting device.

The light emitting device (not shown) may include a first active layer (not shown) and a second active layer (not shown) in which the barrier layer includes indium (In). The light emitting device (not shown) maintains the mobility of holes provided in the second semiconductor layer (not shown), including a first barrier layer (not shown) and a second barrier layer (not shown) including indium (In). The first well layer (not shown) and the second well layer (not shown) can be provided.

Including a light emitting device (not shown) including the first barrier layer (not shown) and the second barrier layer (not shown) can maximize the reliability and light extraction of the light emitting device package 444 and the lighting system 400. have.

The light emitting device package 444 may be mounted on the substrate 442 in multiple colors and in multiple rows to form a module. The light emitting device package 444 may be mounted at the same interval or may be mounted at various separation distances as necessary to adjust brightness. As the substrate 442, a metal core PCB (MCPCB) or a PCB made of FR4 may be used.

The cover 430 may be formed in a circular shape to surround the lower surface of the body 410, but is not limited thereto.

The cover 430 may protect the light emitting device module 443 from the foreign matters. The cover 430 may include diffusing particles to prevent glare of light generated from the light emitting device package 444 and to uniformly emit light to the outside, and may also include at least one of an inner surface and an outer surface of the cover 430. A prism pattern or the like may be formed on the surface. In addition, a phosphor may be applied to at least one of an inner surface and an outer surface of the cover 430.

Since the light generated from the light emitting device package 444 is emitted to the outside through the cover 430, the cover 430 should be excellent in light transmittance, and sufficient heat resistance to withstand the heat generated from the light emitting device package 444. The cover 430 may be formed of a material including polyethylene terephthalate (PET), polycarbonate (PC), polymethyl methacrylate (PMMA), or the like. .

Closing cap 450 is located at both ends of the body 410 may be used for sealing the power supply (not shown). Power cap 452 is formed in the closing cap 450, the lighting system 400 according to the embodiment can be used immediately without a separate device to the terminal from which the existing fluorescent lamps are removed.

11 is an exploded perspective view of a liquid crystal display including a light emitting device according to an embodiment.

FIG. 11 illustrates an edge-light method, and the liquid crystal display 500 may include a liquid crystal display panel 510 and a backlight unit 570 for providing light to the liquid crystal display panel 510.

The liquid crystal display panel 510 may display an image by using light provided from the backlight unit 570. The liquid crystal display panel 510 may include a color filter substrate 512 and a thin film transistor substrate 514 facing each other with a liquid crystal interposed therebetween.

The color filter substrate 512 may implement colors of an image displayed through the liquid crystal display panel 510.

The thin film transistor substrate 514 is electrically connected to the printed circuit board 518 on which a plurality of circuit components are mounted through the driving film 517. The thin film transistor substrate 514 may apply a driving voltage provided from the printed circuit board 518 to the liquid crystal in response to a driving signal provided from the printed circuit board 518.

The thin film transistor substrate 514 may include a thin film transistor and a pixel electrode formed of a thin film on another substrate of a transparent material such as glass or plastic.

The backlight unit 570 may convert the light provided from the light emitting device module 520, the light emitting device module 520 into a surface light source, and provide the light guide plate 530 to the liquid crystal display panel 510. Reflective sheet for reflecting the light emitted from the rear of the light guide plate 530 and the plurality of films 550, 560, 564 to uniform the luminance distribution of the light provided from the 530 and improve the vertical incidence ( 540.

The light emitting device module 520 may include a printed circuit board 522 such that a plurality of light emitting device packages 524 and a plurality of light emitting device packages 524 are mounted to form a module.

The light emitting device package 524 may include a light emitting device.

Including a light emitting device (not shown) including the first barrier layer (not shown) and the second barrier layer (not shown) to maximize the reliability and light extraction of the light emitting device package 524 and the backlight unit 570. have.

The backlight unit 570 includes a diffusion film 566 for diffusing light incident from the light guide plate 530 toward the liquid crystal display panel 510 and a prism film 550 for condensing the diffused light to improve vertical incidence. It may be configured, and may include a protective film 564 for protecting the prism film 550.

12 is an exploded perspective view of a liquid crystal display including the light emitting device according to the embodiment. However, the parts shown and described in Fig. 11 are not repeatedly described in detail.

12 illustrates a liquid crystal display 600 of a direct type according to an embodiment. The liquid crystal display 600 may include a liquid crystal display panel 610 and a backlight unit 670 for providing light to the liquid crystal display panel 610. Since the liquid crystal display panel 610 is the same as that described with reference to FIG. 11, a detailed description thereof will be omitted.

The backlight unit 670 may include a plurality of light emitting device modules 623, a reflective sheet 624, a lower chassis 630 in which the light emitting device modules 623 and the reflective sheet 624 are accommodated, and an upper portion of the light emitting device module 623. It may include a diffusion plate 640 and a plurality of optical film 660 disposed in the.

The light emitting device module 623 may include a printed circuit board 621 such that a plurality of light emitting device packages 622 and a plurality of light emitting device packages 622 may be mounted to form a module.

The light emitting device package 622 may include a light emitting device.

Including a light emitting device (not shown) including the first barrier layer (not shown) and the second barrier layer (not shown) can maximize the reliability and light extraction of the light emitting device package 622 and the backlight unit 670. have.

The reflective sheet 624 reflects the light generated from the light emitting device package 622 in the direction in which the liquid crystal display panel 610 is positioned to improve light utilization efficiency.

Light generated by the light emitting device module 623 is incident on the diffusion plate 640, and the optical film 660 is disposed on the diffusion plate 640. The optical film 660 includes a diffusion film 666, a prism film 650, and a protective film 664.

The configuration and the method of the embodiments described above are not limitedly applied, but the embodiments may be modified so that all or some of the embodiments are selectively combined so that various modifications can be made. .

Although the preferred embodiments have been illustrated and described above, the invention is not limited to the specific embodiments described above, and does not depart from the gist of the invention as claimed in the claims. Various modifications can be made by the person who has them, and these modifications should not be understood individually from the technical idea or the prospect of the present invention.

110: first semiconductor layer 120: first active layer
130: second active layer 140: electron blocking layer
150: second semiconductor layer
300: light emitting device package.

Claims

A first semiconductor layer;
A first active layer disposed on the first semiconductor layer and including a first well layer;
A second well layer disposed on the first active layer and having a thinner thickness than that of the first well layer and a larger energy band gap than the second well layer, wherein In _x Al _y Ga _z N (x + y + z = 1, A second active layer comprising a second barrier layer comprising 0 ≦ x ≦ 1, 0 ≦ y <1, and 0 ≦ z <1); And
And a second semiconductor layer disposed on the second active layer.

The method of claim 1,
The first well layer is a light emitting device of a continuous energy level.

The method of claim 1,
The second well layer is a light emitting device in which the energy level is quantized.

The method of claim 1,
The first active layer further comprises a first barrier layer disposed on the first well layer,
The first barrier layer adjacent to the second active layer includes In _x Al _y Ga _z N (x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y <1, 0 ≦ z <1). Light emitting element.

5. The method of claim 4,
The first barrier layer adjacent to the second active layer has a thickness of 5 to 6nm.

5. The method of claim 4,
The first well layer and the first barrier layer is a plurality of light emitting devices are alternately stacked.

5. The method of claim 4,
The first barrier layer includes a first layer, a second layer disposed on the first layer, and a third layer disposed on the second layer.

The method of claim 7, wherein
The energy band gap of the second layer is smaller than the energy band gap of the first layer and the third layer.

The method of claim 7, wherein
The first layer and the third layer includes gallium nitride (GaN), and the second layer includes In _a Ga ₁ _-a N (0 <a ≤ 1).

The method of claim 7, wherein
The second layer includes In _a Ga ₁ _-a N (0 <a ≦ 1), and the first layer and the third layer form In _b Ga _1-b N (0 <b <a ≦ 1). Light emitting device comprising.

11. The method according to claim 9 or 10,
Indium (In) content a of the second layer is a light emitting device of 0.01 to 0.06.

The method of claim 7, wherein
The thickness of the first layer or the third layer is 1 to 2nm light emitting device.

The method of claim 1,
The band gap of the second barrier layer is larger than the band gap of the second well layer.

The method of claim 1,
The indium (In) content of the second barrier layer is lower than the indium (In) content of the second well layer.

The method of claim 1,
The second barrier layer includes a fourth layer, a fifth layer disposed on the fourth layer, and a sixth layer disposed on the fifth layer.

16. The method of claim 15,
The fourth layer and the sixth layer include gallium nitride (GaN), and the fifth layer includes In _a Ga ₁ _-a N (0 <a ≦ 1).

16. The method of claim 15,
The energy band gap of the fifth layer is smaller than the energy band gap of the fourth layer and the sixth layer.

16. The method of claim 15,
The fifth layer includes In _a Ga ₁ _-a N (0 <a ≦ 1), and the fourth layer and the sixth layer have In _b Ga _1-b N (0 <b <a ≦ 1). Light emitting device comprising.

The method of claim 16 or 18,
Indium (In) content a of the fifth layer is a light emitting device of 0.01 to 0.06.

16. The method of claim 15,
The fourth layer or sixth layer has a thickness of 1 to 2nm.

The method of claim 1,
The first well layer has a thickness of 5 to 15nm.

The method of claim 1,
The second well layer and the second barrier layer is a plurality of light emitting elements are alternately stacked.

The method of claim 1,
The second barrier layer is a plurality,
The second barrier layer is closer to the first active layer, the higher the indium (In) content of the light emitting device.

The method of claim 1,
The second barrier layer is a plurality,
The light emitting device of claim 2, wherein an energy band gap of the second barrier layer adjacent to the second semiconductor layer is smaller than that of the second semiconductor layer.

The method of claim 1,
The second barrier layer is a plurality,
And a second energy barrier layer adjacent to the second semiconductor layer has an energy band gap equal to that of the second semiconductor layer.