KR20110052281A - A printed circuit board and a method of manufacturing the same - Google Patents

A printed circuit board and a method of manufacturing the same Download PDF

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Publication number
KR20110052281A
KR20110052281A KR1020090109252A KR20090109252A KR20110052281A KR 20110052281 A KR20110052281 A KR 20110052281A KR 1020090109252 A KR1020090109252 A KR 1020090109252A KR 20090109252 A KR20090109252 A KR 20090109252A KR 20110052281 A KR20110052281 A KR 20110052281A
Authority
KR
South Korea
Prior art keywords
layer
via hole
printed circuit
circuit board
insulating
Prior art date
Application number
KR1020090109252A
Other languages
Korean (ko)
Inventor
서현인
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020090109252A priority Critical patent/KR20110052281A/en
Publication of KR20110052281A publication Critical patent/KR20110052281A/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections

Abstract

PURPOSE: A printed circuit board and manufacturing method thereof are provided to prevent disconnection phenomenon by forming a second via hole and to form a protective resin layer on an insulating layer. CONSTITUTION: A base substrate(102) includes a first circuit layer. An insulating layer(103) is formed in the base substrate in which the first circuit layer is formed. An insulating layer is formed in a first via hole. A protection resin layer(105) is formed including the inner via-hole in the insulating layer. The protection resin layer is formed in a second via hole.

Description

Printed circuit board and manufacturing method thereof {A PRINTED CIRCUIT BOARD AND A METHOD OF MANUFACTURING THE SAME}

The present invention relates to a printed circuit board and a method of manufacturing the same.

Recently, the trend of multifunctional and high speed electronic products is progressing at a rapid pace. To cope with this trend, semiconductor chips and printed circuit boards for connecting semiconductor chips and main boards are also developing at a very high speed.

The requirements for the development of semiconductor chip mounted printed circuit boards are closely related to the high speed and high density of semiconductor chip mounted printed circuit boards. In order to satisfy these requirements, the thin and small size, fine circuit, and excellent electrical characteristics of printed circuit boards are satisfied. Many improvements and developments of semiconductor chip-mounted printed circuit boards, such as high reliability, high-speed signal transmission structure, are needed.

In particular, as the printed circuit board becomes increasingly finer, an unexpected short circuit phenomenon occurs due to a shorter distance between circuit layers or vias.

1 to 3 are process cross-sectional views for explaining a method of manufacturing a printed circuit board according to the prior art. Hereinafter, the manufacturing method will be described with reference to FIGS. 1 to 3.

First, as shown in FIG. 1, the insulating layer 13 is formed on the base substrate 12 on which the first circuit layer 11 is formed.

Next, as shown in FIG. 2, a via hole 14 is formed in the insulating layer 13.

Next, as shown in FIG. 3, the via 15 is formed in the via hole 14, and the second circuit layer 16 is formed on the insulating layer 13.

In the conventional printed circuit board, the insulation layer 13 may be formed of an insulating resin 13a and a glass cloth (b) glass cloth impregnated in the insulating resin 13a, thereby partially reducing the warpage of the printed circuit board. .

However, in the case of the conventional printed circuit board, when plating the via 15 and the second circuit layer 16, as shown in FIG. 4, the boundary line between the glass cloth 13b and the insulating resin 13a is formed. Accordingly, as the metal charges are moved and shorted between the vias 15, an unexpected shorting layer 17 is formed. In particular, in recent years, the via 15 becomes smaller and smaller in relation to the miniaturization of a printed circuit board, and the problem between the vias 15 is getting closer.

The present invention was created to solve the problems of the prior art as described above, and an object of the present invention is to include a glass cloth in an insulating layer while reducing the warpage phenomenon of the printed circuit board, the metal along the boundary line between the glass cloth and the insulating resin. An object of the present invention is to provide a printed circuit board and a manufacturing method thereof, in which charge transfer phenomenon does not occur.

The printed circuit board according to the preferred embodiment of the present invention is formed on a base substrate having a first circuit layer, the base substrate on which the first circuit layer is formed, an insulating layer having a first via hole, and the first via hole. And a protective resin layer formed in the insulating layer and having a second via hole having a diameter smaller than the first via hole at a position where the first via hole is formed, and a via and the protective resin layer formed inside the second via hole. It characterized in that it comprises a second circuit layer formed.

Here, the insulating layer is characterized by consisting of an insulating resin impregnated with glass cloth.

In addition, the via is electrically connected to the first circuit layer and the second circuit layer.

In addition, the protective resin layer is characterized in that consisting of the same material as the insulating resin.

In a method of manufacturing a printed circuit board according to a preferred embodiment of the present invention, (A) forming an insulating layer on a base substrate having a first circuit layer, and forming a first via hole in the insulating layer, (B) the Forming a protective resin layer on the insulating layer including a first via hole, and forming a second via hole having a diameter smaller than that of the first via hole at a position where the first via hole is formed; and (C) forming a second via hole. And forming a second circuit layer on the protective resin layer while forming a via therein.

In this case, the first via hole and the second via hole may be formed by a laser method or a photolithography method.

In addition, the insulating layer is characterized by consisting of an insulating resin impregnated with glass cloth.

In addition, the protective resin layer is characterized in that consisting of the same material as the insulating resin.

In addition, the via is electrically connected to the first circuit layer and the second circuit layer.

The features and advantages of the present invention will become more apparent from the following detailed description based on the accompanying drawings.

Prior to this, the terms or words used in this specification and claims should not be interpreted in their ordinary and dictionary meanings, and the inventors will be required to properly define the concepts of terms in order to best describe their own invention. On the basis of the principle that it can be interpreted as meaning and concept corresponding to the technical idea of the present invention.

In the printed circuit board according to the present invention, the glass cloth is not exposed by forming a protective resin layer in the insulating layer having the first via hole and forming the second via hole, so that no metal charge transfer phenomenon occurs and a short circuit between vias does not occur. There is no advantage.

In addition, according to the present invention, the protective resin layer is made of the same material as the insulating resin has the advantage that the matching is improved.

BRIEF DESCRIPTION OF THE DRAWINGS The objects, particular advantages and novel features of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. In the present specification, in adding reference numerals to the components of each drawing, it should be noted that the same components as possible, even if displayed on different drawings have the same number as possible. In addition, terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. In addition, in describing the present invention, if it is determined that the detailed description of the related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Printed Circuit Board Structure

5 is a cross-sectional view of a printed circuit board 100 according to a preferred embodiment of the present invention. Hereinafter, the printed circuit board 100 according to the present exemplary embodiment will be described with reference to the drawings.

As shown in FIG. 5, the printed circuit board 100 according to the present exemplary embodiment includes a via 107 connecting the first circuit layer 101 and the second circuit layer 108 of the base substrate 102. In particular, the protective resin layer 104 is further formed on the insulating layer 103 between the first circuit layer 101 and the second circuit layer 108.

The base substrate 102 is a part of the present embodiment. In FIG. 5, only the first circuit layer 101 is illustrated. However, the base substrate 102 is not limited thereto. It may be upstairs.

The first circuit layer 101 is a layer that electrically connects the base substrate 102 and the second circuit layer 108. For example, the first circuit layer 101 may be formed of an electrically conductive metal such as gold, silver, copper, or nickel. . Meanwhile, in FIG. 5, the first circuit layer 101 and the second circuit layer 108 are connected to each other, but for convenience of description, the first circuit layer 101 and the second circuit layer 108 are illustrated. Can be seen as patterned.

The insulating layer 103 is a layer that electrically insulates the first circuit layer 101 and the second circuit layer 108, and a first via hole 104 is formed in the insulating layer 103.

Here, the insulating layer 103 may be a composite polymer resin typically used as an interlayer insulating material. For example, the prepreg may be adopted as the insulating layer 103 to make the printed circuit board 100 thinner. Alternatively, a microcircuit may be easily implemented by adopting Ajinomoto Build up Film (ABF) as the insulating layer 103. In addition, the insulating layer 103 may be an epoxy resin such as FR-4 and BT (Bismaleimide Triazine), but is not particularly limited thereto.

Meanwhile, in the present embodiment, a case where the insulating layer 103 is formed of an insulating resin 103a impregnated with the glass cloth 103b, for example, a prepreg, will be described.

The protective resin layer 105 is formed on the insulating layer 103 including the first via hole 104 to cover the inner surface of the first via hole 104 so that the glass cloth 103b is not exposed.

Here, the protective resin layer 105 covers the glass cloth 103b exposed on the inner side surface of the first via hole 104 to prevent metal charge movement, and the insulating resin of the insulating layer 103 Consist of the same material as 103a) can improve the compatibility

Meanwhile, a second via hole 106 is formed at a point where the first via hole 104 is formed on the protective resin layer 105. In this case, the diameter of the second via hole 106 is preferably smaller than the diameter of the first via hole 104. This is because when the diameter of the second via hole 106 is larger than the diameter of the first via hole 104, the glass cloth 103b may be exposed to the inner side surface of the second via hole 106.

The second circuit layer 108 is formed on the protective resin layer 105, and the vias 107 are formed in the second via hole 106 to form the first circuit layer 101 and the second circuit layer 108. ) Is electrically connected.

Here, the outer surface of the via 107 is in contact with the protective resin layer 105, and the glass cloth 103b is not exposed, so the via 107 and the class cloth 103b are not in direct contact.

Manufacturing method of printed circuit board

6 to 10 are cross-sectional views illustrating a method of manufacturing the printed circuit board 100 shown in FIG. 5. Hereinafter, referring to this, a manufacturing method of the printed circuit board 100 according to the preferred embodiment of the present invention will be described.

First, as shown in FIG. 6, the insulating layer 103 is laminated on the base substrate 102 having the first circuit layer 101.

In this case, the base substrate 102 may be a build-up layer composed of multiple layers or a single layer, and the first circuit layer 101 is formed on the base substrate 102. In addition, the insulating layer 103 is stacked on the base substrate 102 on which the first circuit layer 101 is formed, and the insulating layer 103 is impregnated with the glass cloth 103b in the center layer of the insulating resin 103a. It may be configured in a shape. In addition, it can be seen that the first circuit layer 101 is patterned by, for example, a semiadditive method.

Next, as shown in FIG. 7, the first via hole 104 is formed in the insulating layer 103.

In this case, the first via hole 104 is formed up to an upper surface of the first circuit layer 101, and is a portion where the second via hole 106 is formed. In addition, the first via hole 104 may be formed by, for example, a laser method, a machining drill method, or a photolithography method. When using the laser method, the first circuit layer 101 is made of a metal, it can serve as a stopper of the laser.

Meanwhile, as the first via hole 104 is formed, the glass cloth 103b is exposed to the outside along the inner side surface of the first via hole 104.

Next, as shown in FIG. 8, the protective resin layer 105 is formed in the insulating layer 103 including the first via hole 104.

In this case, the protective resin layer 105 is a layer for preventing the metal charge movement phenomenon appearing when the via is formed directly inside the first via hole 104 and fills all of the inside of the first via hole 104. In addition, the protective resin layer 105 may be made of the same material as the insulating resin (103a) to improve the matching.

Next, as shown in FIG. 9, a second via hole 106 is formed in the protective resin layer 105.

In this case, the second via hole 106 may be formed to the upper surface of the first circuit layer 101 and may be formed in the same manner as the first via hole 104. The diameter of the second via hole 106 is preferably smaller than the diameter of the first via hole 104 because the glass cloth 103b is not exposed in this case.

Next, as shown in FIG. 10, a via 107 is formed in the second via hole 106, and a second circuit layer 108 is formed on the protective resin layer 105.

In this case, the via 107 forming process and the second circuit layer 108 forming process may be performed by one plating process. In addition, the via 107 serves to electrically connect the first circuit layer 101 and the second circuit layer 108. In addition, the second circuit layer 108 may be patterned by, for example, a semiadditive method.

On the other hand, the inside of the second via hole 106 is smooth without the glass cloth 103b being exposed, so that metal charges along the gap between the insulating resin 103a and the glass cloth 103b during the plating process of the via 107. You will not be able to move. Therefore, the case where the vias 107 are shorted with each other does not occur.

By this manufacturing process, the printed circuit board 100 according to the preferred embodiment of the present invention shown in FIG. 10 is manufactured.

Although the present invention has been described in detail through specific embodiments, this is for explaining the present invention in detail, and the printed circuit board and its manufacturing method according to the present invention are not limited thereto, and the present invention is applicable within the spirit of the present invention. It will be apparent that modifications and improvements are possible by those skilled in the art.

All simple modifications and variations of the present invention fall within the scope of the present invention, and the specific scope of protection of the present invention will be apparent from the appended claims.

1 to 4 are diagrams for explaining a printed circuit board according to the prior art.

5 is a cross-sectional view of a printed circuit board according to a preferred embodiment of the present invention.

6 to 10 are cross-sectional views illustrating a method of manufacturing the printed circuit board shown in FIG. 5.

<Description of the symbols for the main parts of the drawings>

101: first circuit layer 102: base substrate

103: insulating layer 103a: insulating resin

103b: Glass cloth 104: First via hole

105: protective resin layer 106: second via hole

107: via 108: second circuit layer

Claims (9)

A base substrate having a first circuit layer; An insulating layer formed on the base substrate on which the first circuit layer is formed, the first via hole being formed; A protective resin layer formed in the insulating layer including the first via hole and having a second via hole having a diameter smaller than that of the first via hole at a position where the first via hole is formed; And A second circuit layer formed in the via and the protective resin layer formed in the second via hole; Printed circuit board comprising a. The method according to claim 1, The insulating layer is a printed circuit board, characterized in that consisting of an insulating resin impregnated with glass cloth. The method according to claim 1, The via is a printed circuit board, characterized in that for electrically connecting the first circuit layer and the second circuit layer. The method according to claim 2, The protective resin layer is a printed circuit board, characterized in that made of the same material as the insulating resin. (A) forming an insulating layer on the base substrate having the first circuit layer, and forming a first via hole in the insulating layer; (B) forming a protective resin layer on the insulating layer including the first via hole and forming a second via hole having a diameter smaller than that of the first via hole at a position where the first via hole is formed; And (C) forming a via in the second via hole and simultaneously forming a second circuit layer in the protective resin layer; Method of manufacturing a printed circuit board comprising a. The method according to claim 5, Wherein the first via hole and the second via hole are formed by a laser method or a photolithography method. The method according to claim 5, The insulating layer is a manufacturing method of a printed circuit board, characterized in that consisting of an insulating resin impregnated glass cloth. The method of claim 7, The protective resin layer is a manufacturing method of a printed circuit board, characterized in that made of the same material as the insulating resin. The method according to claim 5, The via is a method of manufacturing a printed circuit board, characterized in that for electrically connecting the first circuit layer and the second circuit layer.
KR1020090109252A 2009-11-12 2009-11-12 A printed circuit board and a method of manufacturing the same KR20110052281A (en)

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Application Number Priority Date Filing Date Title
KR1020090109252A KR20110052281A (en) 2009-11-12 2009-11-12 A printed circuit board and a method of manufacturing the same

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Application Number Priority Date Filing Date Title
KR1020090109252A KR20110052281A (en) 2009-11-12 2009-11-12 A printed circuit board and a method of manufacturing the same

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KR20110052281A true KR20110052281A (en) 2011-05-18

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023231530A1 (en) * 2022-06-02 2023-12-07 International Business Machines Corporation Method to manufacture conductive anodic filament-resistant microvias

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023231530A1 (en) * 2022-06-02 2023-12-07 International Business Machines Corporation Method to manufacture conductive anodic filament-resistant microvias
US11968780B2 (en) 2022-06-02 2024-04-23 International Business Machines Corporation Method to manufacture conductive anodic filament-resistant microvias

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