KR20100106863A - Method and device for processing signal in tdma communication - Google Patents

Method and device for processing signal in tdma communication Download PDF

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KR20100106863A
KR20100106863A KR1020090025119A KR20090025119A KR20100106863A KR 20100106863 A KR20100106863 A KR 20100106863A KR 1020090025119 A KR1020090025119 A KR 1020090025119A KR 20090025119 A KR20090025119 A KR 20090025119A KR 20100106863 A KR20100106863 A KR 20100106863A
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South Korea
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signal
frequency
phase error
multiple access
division multiple
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KR1020090025119A
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Korean (ko)
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박성복
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국방과학연구소
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/14—Relay systems
    • H04B7/15—Active relay systems
    • H04B7/204—Multiple access
    • H04B7/212—Time-division multiple access [TDMA]
    • H04B7/2125—Synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
    • H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
    • H04B7/2643—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile using time-division multiple access [TDMA]
    • H04B7/2656—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile using time-division multiple access [TDMA] for structure of frame, burst
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1694—Allocation of channels in TDM/TDMA networks, e.g. distributed multiplexers

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE: A method and device for processing a signal in TDMA(Time Division Multiple Access) communication are provided to improve high synchronous performance even within a poor noise environment. CONSTITUTION: A frequency of a signal which first correction signal is received or phase error are corrected as a feed-forward way. A second signal corrects a remaining frequency of a first correction signal or phase error as a feed-back way. A preamble corrects the frequency or phase error. The preamble is oversampled as a plurality of symbol.

Description

Signal processing method and signal processing device of time division multiple access communication {METHOD AND DEVICE FOR PROCESSING SIGNAL IN TDMA COMMUNICATION}

The present invention relates to a method for processing a signal received in time division multiple access (TDMA) communication and a signal processing apparatus using the same.

Time division multiple access (TDMA) is one of channel access methods for sharing network resources. Time division multiple access allows multiple users to share the same frequency channel by using different timeslots. Network users transmit data at high speed using the time slots assigned to them. This time division multiple access scheme enables multiple base stations to communicate by sharing one communication means (including, for example, radio frequency channels, etc.).

Time-division multiple access is used in the second generation of cellular systems such as Global System for Mobile Communications (GSM), IS-136, Personal Digital Cellular (PDC), iDEN, and Digital Enhanced Cordless Telecommunications (DECT). Time division multiple access schemes are also used in satellite and military wireless communication systems.

In time division multiple access communication, synchronous performance is an important factor that affects the performance of the whole system. In time division multiple access communication, consideration is required for a signal processing method for synchronization of received signals.

The present invention is to achieve stable and reliable synchronization performance with respect to the received time division multiple access signal in time division multiple access communication.

A signal processing method related to an embodiment of the present invention for realizing the above-described problem comprises the steps of receiving a time division multiple access (TDMA) signal and a frequency or phase error of the received signal. Generating a first correction signal corrected in a feed-forward format and generating a second correction signal corrected in a feed-back format of a residual frequency or phase error of the first correction signal; Steps.

In one aspect of the invention, the received signal may include a preamble for correcting the frequency or phase error.

In another aspect of the present invention, the preamble may be oversampled into a plurality of symbols.

In another aspect of the present invention, the preamble may be oversampled at a rate specified by a user.

In another aspect of the present invention, the generating of the first correction signal may include generating a first correction signal by correcting a frequency or a phase error using an MLE algorithm.

In another aspect of the present invention, the generating of the second correction signal may include generating a second correction signal by correcting a residual frequency or a phase error using a DPLL algorithm.

In another aspect of the present invention, the DPLL algorithm may correct the residual frequency or phase error by a loop filter having a loop filter coefficient specified by the user.

According to yet another aspect of the present invention, there is provided a signal processing apparatus including a signal transmitting and receiving unit for receiving a time division multiple access (TDMA) signal, and a frequency of the received signal. Or a first synchronizer for generating a first correction signal correcting a phase error in a feed-forward form and a residual frequency or phase error of the first correction signal in a feed-back form. And a second synchronization unit generating a second correction signal.

In one aspect of the invention, the received signal may include a preamble for correcting the frequency or phase error.

In another aspect of the present invention, the preamble may be oversampled into a plurality of symbols.

In another aspect of the present invention, the preamble may be oversampled at a rate specified by a user.

In another aspect of the present invention, the first synchronization unit may generate a first correction signal by correcting a frequency or phase error using an MLE algorithm.

In another aspect of the present invention, the second synchronization unit may generate a second correction signal by correcting a residual frequency or a phase error using a DPLL algorithm.

In another aspect of the present invention, the second synchronization unit may include a loop filter that corrects a residual frequency or phase error by using a DPLL algorithm.

In another aspect of the present invention, the loop filter may have a loop filter coefficient specified by a user.

The signal processing method of the time division multiple access method according to at least one embodiment of the present invention configured as described above can improve the high speed synchronization performance even in a poor noise environment.

In addition, the present invention can increase the efficiency of signal transmission by synchronizing using a relatively small preamble even in a poor noise environment.

Hereinafter, a signal processing apparatus according to the present invention will be described in more detail with reference to the drawings. The suffixes "module" and "unit" for components used in the following description are given or used in consideration of ease of specification, and do not have distinct meanings or roles from each other.

The time division multiple access signal has an error in frequency or phase while being received through a channel. In receiving and processing a time division multiple access signal, synchronization exaggeration is required to improve the reception rate. To do this, the receiver should process the signal in a manner of correcting errors by giving an appropriate frequency or phase offset considering the frequency or phase error.

Representative frequency or phase error synchronization algorithms include feedforward and feedback methods. A representative example of a feedback method is a digital phase-lock loop (DPLL) algorithm.

1 is a diagram illustrating a method of correcting frequency or phase error using a DPLL algorithm.

As shown in Figure 1, the DPLL algorithm tracks the offset of the frequency or phase error by measuring the frequency or phase error from the processed signal. The MLE algorithm corrects frequency or phase error by the tracked offset. The corrected processed signal is then used recursively to predict the frequency or phase error.

Although the DPLL algorithm has high synchronization performance, a hang-up phenomenon or a pull-up phenomenon may occur. Such a hang-up phenomenon or a pull-up phenomenon may affect a large number of users in a time division multiple access method in which a plurality of users share a frequency using a plurality of timeslots even if a short time occurs.

For this reason, in the conventional time division multiple access method, a frequency or phase error correction method of a feed forward method may be used.

A representative example of the feed forward method is MLE (Maximum Likelyhood Estimation).

2 is a diagram illustrating a method of correcting frequency or phase error using an MLE algorithm.

As shown in FIG. 2, the MLE algorithm tracks an offset of the frequency or phase error using a preamble (PREAMBLE) included in one signal unit (see FIG. 3). The MLE algorithm corrects frequency or phase error by the tracked offset.

When the MLE algorithm is used to reduce this effect, the MLE algorithm is less accurate than the DPLL in the environment where the signal-to-noise ratio (SNR) of the signal is low, and when the length of the preamble is increased to make up for this problem. In other words, the preamble part itself consumes channel resources, thereby reducing the data rate.

4 is a block diagram of a signal processing apparatus according to an embodiment of the present invention.

The signal processing apparatus 100 may include a signal transmitter / receiver 110, a matched filter 120, a first synchronizer 130, and a second synchronizer 140. Since the components shown in FIG. 1 are not essential, a signal processing apparatus having more or fewer components may be implemented.

Hereinafter, the components will be described in order.

The new transmitter / receiver 110 may transmit or receive a signal from the outside using wireless communication. The signal transceiver may transmit and receive a signal of a time division multiple access method. The received signal may include a preamble for correcting the frequency or phase error. The preamble may be oversampled into a plurality of symbols. The rate at which the preamble is oversampled may be specified by the user.

The matched filter 120 may be a matched filter that matches the transmission filter of the time division multiple access method.

The first synchronizer 130 may correct the frequency or phase error of the received signal by the signal transmitter / receiver 110. The first synchronization unit 130 may generate a first correction signal by correcting a frequency or phase error using an MLE algorithm.

The second synchronizer 140 may correct a residual frequency or phase error of the first correction signal corrected by the first synchronizer. The second synchronizer 140 may generate a second correction signal by correcting a residual frequency or a phase error using a DPLL algorithm. The second synchronizer 140 may include a loop filter that corrects a residual frequency or phase error by using a DPLL algorithm, and the loop filter may have a user-specified loop filter coefficient.

The received equivalent baseband signal including the frequency and phase offset may be expressed by Equation 1 below.

As shown in FIG. 4, the present invention is designed by deforming a feedforward based data-aided MLE scheme and a feedback based decision directed DPLL scheme.

In the signal processing apparatus, a signal including a noise component is first demodulated synchronously. The synchronously demodulated signal may be converted into a baseband signal r (t) that includes a frequency or phase offset due to mismatching of the transmitter and receiver. The baseband signal r (t) is oversampled for digital processing and matched by the matched filter 120.

The received equivalent baseband signal including the frequency or phase offset may be expressed as Equation 1 below.

Figure 112009017802001-PAT00001

Where v (t) is Additive Wight Gausian Noise (AWGN) with bilateral power density of No / 2, and u (t) is an equivalent baseband signal of QPSK (Quadrature Phase Shift Key). Equation 2

Figure 112009017802001-PAT00002

Where A is the amplitude of the inpahse (I) and quadrature (Q) components.

The matching filter 120 for transmission band limitation may apply a root raised cosine (RRC) filter having an impulse response characteristic as shown in Equation 3 below.

Figure 112009017802001-PAT00003

r is a roll-off factor that determines bandwidth and may have a value of 0.5.

After oversampling with the sampling rate Ts, the received signal, r (kTs), which has passed the matched filter, is expressed as in Equation 4 below.

Figure 112009017802001-PAT00004

Where k is a sample index and N may mean the number of samples for parameter estimation.

In the signal processing method related to the exemplary embodiment of the present invention, the frequency offset estimation parameter may be expressed as f and the phase offset estimation parameter may be expressed as Ψ.

Frequency offset estimation

Since the parameter to be estimated is not a random variable but a deterministic value, the criterion for parameter estimation is Maximum Likeihood that maximizes the likelyhood function value as shown in Equation 5 below.

Figure 112009017802001-PAT00005

Where Ω is rad. Per sample and represents frequency offset.

The maximum value of Equation 5 with respect to the frequency offset Ω is to take the derivative of Equation 5 as shown in Equation 6 below to find an Ω value that becomes '0'.

Figure 112009017802001-PAT00006

Let Cd = k-m (k> m) and rearrange the terms of Equation 6 below.

Figure 112009017802001-PAT00007

Therefore, the frequency offset to be estimated from Equation 7 is expressed by Equation 8 below.

Figure 112009017802001-PAT00008

As shown in Equation 8, the estimated frequency offset is a phase component of the autocorrelation function having a correlation distance Cd.

The correlation distance Cd determines the frequency offset estimation range, and the accuracy of the estimation depends on the correlation function sample number (N-Cd) and the correlation distance Cd.

5 is a block diagram for implementing a frequency offset estimation algorithm.

Where arg (·) represents the phase of equation (8).

Phase offset estimation

If the frequency offset compensated preamble sample number for data-aided phase offset estimation is Np, the k th sample data is expressed as in Equation (9).

Figure 112009017802001-PAT00009

Where ΔΩ represents residual frequency error due to incorrect frequency offset.

Since the phase offset is not a random variable, as in the frequency offset estimation, the phase offset value may be estimated by a maximum likeihood estimation that maximizes the likelyhood function value of Equation 10 below.

Figure 112009017802001-PAT00010

The phase estimation value estimated from Equation 10 using the statistical ergodic of the signal is shown in Equation 11 below.

Figure 112009017802001-PAT00011

6 is a block diagram for implementing a phase offset estimation algorithm, where arg (·) represents the phase of Equation 11 above.

▶ Residual Phase Offset Tracking

In general, when the size of the user data is small in the burst of the time division multiple access system, the parameter estimation is sufficient once using the MLE. However, when the preamble size is reduced or the user data is increased in consideration of the transmission efficiency, especially when the application field is a multi-platform common data link (CDL), the residual frequency and phase offset due to the MLE are accumulated in the data. Phase tracking is essential because it drastically degrades performance.

Viterbi & Viterbi NonData-aided phase tracking based on nonlinear transformation shows good performance as feedforward method. However, when the SNR value is low or the residual phase offset is not small, the estimation performance is deteriorated and the bit error rate (BER) performance is degraded. Therefore, the estimation performance of the previous stage MLE should be good to maintain the performance. This means that the preamble size is increased, resulting in a decrease in transmission efficiency.

In the proposed hybrid carrier synchronization technique, a feedback-based DPLL technique is applied for phase tracking, and a decision-directed DPLL of a secondary loop having a transfer characteristic as shown in Equation 12 is a good example.

Figure 112009017802001-PAT00012

7 is a block diagram of a DPLL according to an embodiment of the present invention.

In Equation 12, K 1 and K 2 are constants for determining a loop bandwidth and determine an estimated range. In the signal processing apparatus 100 according to the exemplary embodiment of the present invention, it was experimentally confirmed that the PLL operates stably at K 1 = 0.01 and K 2 = 0.005.

 Of course, the DPLL has a hang-up characteristic, but this characteristic occurs when the initial tracking error approaches the unstable equilibrium point. In the proposed method, this condition can be eliminated due to MLE and the initial acquisition range of the DPLL. Since the loop bandwidth can be narrowed, PLL estimation accuracy can be increased.

In addition, according to an embodiment of the present invention, the above-described method may be implemented as code that can be read by a processor in a medium in which a program is recorded. Examples of processor-readable media include ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage, and the like, and may be implemented in the form of a carrier wave (for example, transmission over the Internet). Include.

The signal processing apparatus having the above-described signal processing method may not be limitedly applied to the configuration and method of the above-described embodiments, but the embodiments may be all or part of each embodiment so that various modifications may be made. May be optionally combined.

1 illustrates a method of correcting frequency or phase error using a DPLL algorithm.

2 is a diagram illustrating a method of correcting frequency or phase error using an MLE algorithm.

3 is a diagram illustrating data units in a time division multiple access scheme according to an embodiment of the present invention.

4 is a block diagram of a signal processing apparatus according to an embodiment of the present invention.

5 is a block diagram for implementing a frequency offset estimation algorithm.

6 is a block diagram for implementing a phase offset estimation algorithm.

7 is a block diagram of a DPLL according to an embodiment of the present invention.

Claims (15)

Receiving a time division multiple access (TDMA) signal; Generating a first correction signal obtained by correcting a frequency or phase error of the received signal in a feed-forward form; and And generating a second correction signal in which a residual frequency or a phase error of the first correction signal is corrected in a feed-back format. According to claim 1, The received signal is, A signal processing method for time division multiple access communication comprising a preamble for correcting the frequency or phase error. The method of claim 2, The preamble, A signal processing method of time division multiple access method communication oversampled with a plurality of symbols. The method of claim 3, The preamble, Signal processing method for time division multiple access communication oversampled by user specified rate. According to claim 1, The generating of the first correction signal may include: A signal processing method of time division multiple access communication, the step of generating a first correction signal by correcting a frequency or phase error using an MLE algorithm. According to claim 1, The generating of the second correction signal may include: And a second correction signal is generated by correcting a residual frequency or a phase error using a DPLL algorithm. The method according to claim 6, The DPLL algorithm is A signal processing method for time division multiple access communication in which a residual frequency or phase error is corrected by a loop filter having a user specified loop filter coefficient. A signal transmitting and receiving unit for receiving a time division multiple access (TDMA) signal; A first synchronizer configured to generate a first correction signal corrected in a feed-forward form by frequency or phase error of the received signal; and And a second synchronization unit configured to generate a second correction signal correcting the residual frequency or phase error of the first correction signal in a feed-back format. The method of claim 8, The received signal is, And a preamble (Preamble) for correcting the frequency or phase error. The method of claim 9, The preamble, A signal processing apparatus for time division multiple access communication that is oversampled with a plurality of symbols. The method of claim 10, The preamble, Signal processing device for time division multiple access communication oversampled by user specified ratio. The method of claim 8, The first synchronization unit, A signal processing apparatus for time division multiple access communication that generates a first correction signal by correcting a frequency or phase error using an MLE algorithm. The method of claim 8, The second synchronization unit, A signal processing apparatus for time division multiple access communication that generates a second correction signal by correcting a residual frequency or a phase error using a DPLL algorithm. The method of claim 13, The second synchronization unit, A signal processing apparatus for time division multiple access communication comprising a loop filter for correcting residual frequency or phase error using a DPLL algorithm. The method of claim 15, The loop filter, A signal processing apparatus for time division multiple access communication having a user specified loop filter coefficient.
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