KR20090093081A - 정렬된 나노와이어의 제조방법 및 나노와이어 응용소자 - Google Patents
정렬된 나노와이어의 제조방법 및 나노와이어 응용소자Info
- Publication number
- KR20090093081A KR20090093081A KR1020080018410A KR20080018410A KR20090093081A KR 20090093081 A KR20090093081 A KR 20090093081A KR 1020080018410 A KR1020080018410 A KR 1020080018410A KR 20080018410 A KR20080018410 A KR 20080018410A KR 20090093081 A KR20090093081 A KR 20090093081A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- nanowire
- thin film
- depositing
- sacrificial layer
- Prior art date
Links
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82B—NANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
- B82B3/00—Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
- B82B3/0095—Manufacture or treatments or nanostructures not provided for in groups B82B3/0009 - B82B3/009
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Carbon And Carbon Compounds (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
Claims (3)
- 기판 상에 절연층을 증착하는 단계와;상기 절연층 상에 식각 방지층을 증착하는 단계와;상기 식각 방지층 상에 희생층을 증착하는 단계와;상기 희생층을 부분 식각하여 나노와이어의 형성을 위한 패턴을 만드는 단계와;원자층 증착법을 이용하여 상기 희생층의 부분 식각에 의해 노출된 식각 방지층 및 상기 희생층 상에 수평층 및 수직층이 균일한 두께를 갖도록 반도체 박막 또는 금속 박막을 증착하는 단계와;상기 반도체 박막 또는 금속 박막의 수평층을 제거하는 단계와;잔존하는 상기 희생층을 제거하여 반도체 나노와이어를 형성하는 단계;를 포함하여 이루어지는 것을 특징으로 하는 정렬된 나노와이어의 제조방법.
- 제1항에 있어서, 상기 식각방지층은 비정질 카본 또는 Si3N4로 이루어지는 것을 특징으로 하는 정렬된 나노와이어의 제조방법.
- 제1항 또는 제2항의 제조방법에 의해 제조된 나노와이어를 이용하여 제조된 것을 특징으로 하는 나노와이어 응용소자.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080018410A KR100971587B1 (ko) | 2008-02-28 | 2008-02-28 | 정렬된 나노와이어의 제조방법 및 나노와이어 응용소자 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080018410A KR100971587B1 (ko) | 2008-02-28 | 2008-02-28 | 정렬된 나노와이어의 제조방법 및 나노와이어 응용소자 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20090093081A true KR20090093081A (ko) | 2009-09-02 |
KR100971587B1 KR100971587B1 (ko) | 2010-07-20 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020080018410A KR100971587B1 (ko) | 2008-02-28 | 2008-02-28 | 정렬된 나노와이어의 제조방법 및 나노와이어 응용소자 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100971587B1 (ko) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013089388A1 (en) * | 2011-12-13 | 2013-06-20 | Lg Innotek Co., Ltd. | Nanowire grid structure and method of manufacturing nanowire |
WO2014142952A1 (en) * | 2013-03-15 | 2014-09-18 | Intel Corporation | Nanowire transistor with underlayer etch stops |
KR20160040409A (ko) * | 2014-10-03 | 2016-04-14 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 나노와이어 형성 방법 |
US10070515B2 (en) | 2015-08-10 | 2018-09-04 | Samsung Electronics Co., Ltd. | Transparent electrode using amorphous alloy and method of manufacturing the same |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101996870B1 (ko) * | 2017-08-07 | 2019-07-09 | 한국생산기술연구원 | 신축성 기판에 사용되는 전선 구조체의 제조방법 |
-
2008
- 2008-02-28 KR KR1020080018410A patent/KR100971587B1/ko active IP Right Grant
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9456501B2 (en) | 2011-12-13 | 2016-09-27 | Lg Innotek Co., Ltd. | Nanowire grid structure having grid patterns and a sacrificial layer |
WO2013089388A1 (en) * | 2011-12-13 | 2013-06-20 | Lg Innotek Co., Ltd. | Nanowire grid structure and method of manufacturing nanowire |
US9614060B2 (en) | 2013-03-15 | 2017-04-04 | Intel Corporation | Nanowire transistor with underlayer etch stops |
GB2526457A (en) * | 2013-03-15 | 2015-11-25 | Intel Corp | Nanowire transistor with underlayer etch stops |
US9385221B2 (en) | 2013-03-15 | 2016-07-05 | Intel Corporation | Nanowire transistor with underlayer etch stops |
US9064944B2 (en) | 2013-03-15 | 2015-06-23 | Intel Corporation | Nanowire transistor with underlayer etch stops |
WO2014142952A1 (en) * | 2013-03-15 | 2014-09-18 | Intel Corporation | Nanowire transistor with underlayer etch stops |
GB2526457B (en) * | 2013-03-15 | 2018-08-22 | Intel Corp | Nanowire transistor with underlayer etch stops |
KR20160040409A (ko) * | 2014-10-03 | 2016-04-14 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 나노와이어 형성 방법 |
US9437699B2 (en) | 2014-10-03 | 2016-09-06 | Taiwan Semiconductor Manufacturing Company Limited | Method of forming nanowires |
CN106206246A (zh) * | 2014-10-03 | 2016-12-07 | 台湾积体电路制造股份有限公司 | 纳米线的形成方法 |
CN106206246B (zh) * | 2014-10-03 | 2020-10-27 | 台湾积体电路制造股份有限公司 | 纳米线的形成方法 |
US10923566B2 (en) | 2014-10-03 | 2021-02-16 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor structures and methods of forming the same |
US10070515B2 (en) | 2015-08-10 | 2018-09-04 | Samsung Electronics Co., Ltd. | Transparent electrode using amorphous alloy and method of manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
KR100971587B1 (ko) | 2010-07-20 |
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