KR20090000868A - Method for optical proximity correct - Google Patents
Method for optical proximity correct Download PDFInfo
- Publication number
- KR20090000868A KR20090000868A KR1020070064744A KR20070064744A KR20090000868A KR 20090000868 A KR20090000868 A KR 20090000868A KR 1020070064744 A KR1020070064744 A KR 1020070064744A KR 20070064744 A KR20070064744 A KR 20070064744A KR 20090000868 A KR20090000868 A KR 20090000868A
- Authority
- KR
- South Korea
- Prior art keywords
- layout
- wafer
- line width
- error
- pattern
- Prior art date
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/956—Inspecting patterns on the surface of objects
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
- G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
- G03F7/70441—Optical proximity correction [OPC]
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70625—Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Biochemistry (AREA)
- General Health & Medical Sciences (AREA)
- Computer Hardware Design (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
Abstract
The optical proximity effect correction method of the present invention comprises the steps of: manufacturing a test mask in which a design layout of target patterns is arranged; Transferring patterns onto the wafer using a test mask; Measuring wafer linewidth (CD) data of the patterns; Extracting the wafer line width (CD) error data using a tool capable of measuring wafer line width (CD) data and wafer line width (CD) errors in the entire wafer area to form a rule file database. ; And modifying the layout by selecting a coordinate of the layout to be modified and a wafer line width (CD) error value from a rule file database.
Description
1A to 1C are diagrams for explaining the optical proximity effect correction method according to the prior art.
2 is a view illustrating a threshold error in the conventional optical proximity effect correction.
3A to 3C are diagrams for explaining a correction limit according to a peripheral pattern of a pattern.
4 is a flowchart illustrating the optical proximity effect correction method according to the present invention.
5 to 8 are diagrams for explaining the optical proximity effect correction according to an embodiment of the present invention.
The present invention relates to a semiconductor device, and more particularly, to a light proximity effect correction method.
As the degree of integration of semiconductor devices increases, the size of patterns decreases as design rules decrease. This makes it difficult to implement patterns as designed in the design layout. One of the reasons why it is difficult to implement a pattern according to a design layout is an optical proximity effect (OPE) generated in an exposure process. The optical proximity effect (OPE) is a pattern deformation caused by an imbalance in energy intensity due to light diffraction in the exposure process. In order to solve the problem that the pattern is deformed by the optical proximity effect and to increase the resolution, an optical proximity effect correction (OPC) method is used. The optical proximity effect correction (OPC) method is a method of correcting the layout of a target pattern to be transferred to a wafer in consideration of the optical proximity effect (OPE).
Currently, the optical proximity effect correction (OPC) method is used by applying a rule-based approach or a model-based approach. The rule base approach or model base approach is a method of calibrating the layout according to the surrounding environment of the part being calibrated. Therefore, the accuracy may vary depending on the surrounding environment and how to write related models and rules. In addition, the critical dimensions (CD) of all wafers cannot be satisfied for any layout having various shapes.
1A to 1C are diagrams for explaining the optical proximity effect correction method according to the prior art. 2 is a view illustrating a threshold dimension error in conventional optical proximity correction.
1A to 1C, a rule base approach or a model base approach for optical proximity correction is calibrated with respect to the
Referring to FIG. 2, it can be seen that the
The technical problem to be achieved by the present invention is to provide an optical proximity effect correction method that can improve OPC accuracy by performing local correction on the layout to be corrected in order to correct the wafer line width in the layout arranged in various forms throughout the chip. It is.
In order to achieve the above technical problem, the optical proximity effect correction method according to the present invention, manufacturing a test mask in which the design layout of the target pattern is disposed; Transferring patterns onto a wafer using the test mask; Measuring wafer linewidth (CD) data of the patterns; Extracting the wafer line width (CD) error data using a tool for measuring the wafer line width (CD) error in the entire wafer area and the wafer line width (CD) data to form a rule file database step; And modifying the layout by selecting a coordinate of a layout to be corrected and a wafer line width (CD) error value from the rule file database.
In the present invention, after measuring the wafer line width (CD) data, a manual OPC for extracting the coordinates and correction amount of the portion having a large line width error from the measured wafer line width (CD) data results to correct the layout of the same coordinates It is preferable to further include the step of proceeding.
The target pattern preferably includes a first pattern having a uniform left and right space spacing of the pattern and a second pattern having an asymmetric space of the left and right patterns.
In the correcting of the layout, the coordinate file and the wafer line width (CD) error value may be automatically corrected from the rule file database.
In order to achieve the above technical problem, in the optical proximity effect correction method according to the present invention, in a total frame in which a main chip on which a first layout and a second layout are arranged is arranged, a wafer CD error is compared to a design database in an entire wafer area. Extracting wafer linewidth (CD) error data of a layout disposed in the main chip by using a tool that can measure the data to form a rule file database; And extracting coordinates and CD error values of the first and second layouts from the rule file database and modifying the first and second layouts.
In this invention, the space | interval of the said 1st layout and the adjacent layout are arrange | positioned symmetrically.
The second layout is arranged asymmetrically with a space spacing from the adjacent layout.
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.
3A to 3C are diagrams for explaining a correction limit according to a peripheral pattern of a pattern.
In order to improve the resolution of the pattern transferred onto the wafer, an optical proximity effect correction method (hereinafter, OPC) is used. The OPC method is a method of obtaining and correcting a difference between a threshold CD on a database and a pattern threshold CD formed on a wafer. This OPC method may vary in accuracy depending on the surrounding environment of the layout being calibrated.
Referring to FIGS. 3A through 3C, in the case of the
4 is a flowchart illustrating the optical proximity effect correction method according to the present invention. 5 to 8 are diagrams for explaining the optical proximity effect correction according to an embodiment of the present invention. In particular, FIG. 8 is an enlarged view of the region 'X' of FIG. 7.
4 and 5, a layout of a target pattern to be transferred onto a wafer is designed to form a test mask in which the layout of the target pattern is formed as a test pattern (step 400). The
Next, a manual OPC is performed on a portion of the wafer width CD data having a large line width CD error. In the manual OPC, only the target layout is corrected by determining the coordinates and the amount to be corrected for the portion where the line width (CD) error is large in the measured wafer width (CD).
This method provides accurate line width where DRAM, cell boundary, cell boundary, sense amplifier or sub wordline driver are arrayed in DRAM devices. (CD) This is the method used for correction. In other words, if the layout is repeated, the parts using the same layout in the same product family may be modified using the manual OPC. In this case, the manual OPC may be modified by the designer using a layout editor.
However, subholes, main wordline drivers (MWDs), decoders, and peripherals use a variety of layouts and vary from product to product, making them difficult to modify using these manual OPCs. This is because it is difficult to specify the exact CD error for all the layouts.
Accordingly, a rule file database is formed using a tool capable of measuring wafer CD errors relative to the design database for the entire wafer area (step 430). Using this tool, it is possible to extract a wide range of wafer line widths (CDs) in areas such as peripheral circuit areas having various layouts.
4 and 6, the
In this case, the layout modification method cannot be modified by the designer using the layout editor like the manual OPC. This is because the peripheral circuit region has a random layout and a large number of layouts having different patterns. Therefore, the layout is modified with the rule file database. In other words, coordinate and line width error data are fetched from the rule file database, and the target layout to be modified is automatically modified using this. The coordinate and line width error data uses data measured using a tool for measuring wafer CD errors over the entire wafer area compared to the design target database.
Referring to FIGS. 7 to 8, which illustrate specific embodiments of the layout modification method, the total frame (or reticle, X) may have a layout corresponding to the main chip (Y) and the
In the layout of the main chip X arranged as described above, first, the
Using the rule file database, not only can the
As described above, according to the optical proximity effect correction method according to the present invention, a manual OPC for a layout or an OPC for a specific region may be performed to correct wafer line widths in various layouts. This can improve accuracy for layouts in which the left and right spaces are asymmetric. In addition, even in layouts having the same left and right spaces, the accuracy can be improved by independently correcting the wafer widths. In addition, the accuracy of rule base correction, model base correction, and hybrid correction can be improved.
Claims (7)
Priority Applications (1)
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KR1020070064744A KR20090000868A (en) | 2007-06-28 | 2007-06-28 | Method for optical proximity correct |
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KR1020070064744A KR20090000868A (en) | 2007-06-28 | 2007-06-28 | Method for optical proximity correct |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112614784A (en) * | 2020-12-17 | 2021-04-06 | 上海集成电路装备材料产业创新中心有限公司 | Method for improving appearance line width difference of dense and isolated patterns of fin type device |
CN115457350A (en) * | 2022-11-08 | 2022-12-09 | 华芯程(杭州)科技有限公司 | Optical proximity correction etching model training method and optical proximity correction method |
US11733428B2 (en) | 2021-08-11 | 2023-08-22 | National Institute of Meteorological Sciences | Self-powered apparatus for measuring precipitation and method for controlling the same |
CN116931389A (en) * | 2023-09-18 | 2023-10-24 | 粤芯半导体技术股份有限公司 | Line width measuring method |
-
2007
- 2007-06-28 KR KR1020070064744A patent/KR20090000868A/en not_active Application Discontinuation
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112614784A (en) * | 2020-12-17 | 2021-04-06 | 上海集成电路装备材料产业创新中心有限公司 | Method for improving appearance line width difference of dense and isolated patterns of fin type device |
US11733428B2 (en) | 2021-08-11 | 2023-08-22 | National Institute of Meteorological Sciences | Self-powered apparatus for measuring precipitation and method for controlling the same |
CN115457350A (en) * | 2022-11-08 | 2022-12-09 | 华芯程(杭州)科技有限公司 | Optical proximity correction etching model training method and optical proximity correction method |
CN116931389A (en) * | 2023-09-18 | 2023-10-24 | 粤芯半导体技术股份有限公司 | Line width measuring method |
CN116931389B (en) * | 2023-09-18 | 2023-12-08 | 粤芯半导体技术股份有限公司 | Line width measuring method |
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