KR20030058516A - Driving circuit for tft-lcd - Google Patents

Driving circuit for tft-lcd Download PDF

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KR20030058516A
KR20030058516A KR1020010088972A KR20010088972A KR20030058516A KR 20030058516 A KR20030058516 A KR 20030058516A KR 1020010088972 A KR1020010088972 A KR 1020010088972A KR 20010088972 A KR20010088972 A KR 20010088972A KR 20030058516 A KR20030058516 A KR 20030058516A
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data
pixel data
signal
liquid crystal
unit
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KR1020010088972A
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Korean (ko)
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최유진
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비오이 하이디스 테크놀로지 주식회사
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Priority to KR1020010088972A priority Critical patent/KR20030058516A/en
Publication of KR20030058516A publication Critical patent/KR20030058516A/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/08Details of timing specific for flat panels, other than clock recovery

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

PURPOSE: A driving circuit of a thin film transistor liquid crystal display is provided to improve the response speed between gray scales, thereby obtaining clearer quality of a moving picture. CONSTITUTION: A memory unit(80) stores pixel data. A controller(70) receives the pixel data, a control signal, a clock signal, a horizontal synchronizing signal, and a vertical synchronizing signal. The controller stores the pixel data in the memory unit and reads the pixel data from the memory unit, compares the current data with data of a previous field for generating transformed data. A timing controller(120) receives the transformed pixel data, the horizontal synchronizing signal, the vertical synchronizing signal, the control signal, and the clock signal, and generates a signal driving a liquid crystal panel(150) to a gate driver unit(130) and a data driver unit(140).

Description

박막트랜지스터 액정표시장치의 구동 회로{DRIVING CIRCUIT FOR TFT-LCD}Driving circuit for thin film transistor liquid crystal display device {DRIVING CIRCUIT FOR TFT-LCD}

본 발명은 박막트랜지스터 액정표시장치(TFT-LCD)의 구동 회로에 관한 것으로, 특히 계조간 응답속도를 개선시켜 동영상에서 보다 선명한 화질을 얻을 수 있는 TFT-LCD의 구동 회로에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit of a thin film transistor liquid crystal display (TFT-LCD), and more particularly, to a driving circuit of a TFT-LCD capable of obtaining clearer image quality in moving images by improving response speed between grayscales.

도 1은 종래의 일반적인 TFT-LCD의 구동 회로를 도시한 것이다. 도 1을 참조하면, 전원전압(VDD)을 입력하여 게이트구동용 전원전압(VG+, VG-)을 발생하는 DC-DC 변환기(10)와, 외부로부터 RGB 데이터(RGBin)와 제어신호(DE, DCLK, Hsync, Vsync 등)를 입력하여 게이트 드라이버(30)와 데이터 드라이버(40)에 액정패널 구동신호를 발생하는 타이밍 콘트롤러(20)와, 각각 게이트 구동신호와 데이터구동신호를 발생하여 액정패널(50)을 구동시켜 주는 게이트 드라이버(30) 및 데이터 드라이버(40) 그리고 타이밍 콘트롤러(20)로부터 극성신호(POL)를 입력하여 액정패널(50)에 공통전압(Vcom)을 발생하는 기준전압 및 공통전압 발생회로(60)를 구비한다.1 shows a driving circuit of a conventional general TFT-LCD. Referring to FIG. 1, a DC-DC converter 10 which inputs a power supply voltage VDD to generate gate driving power supply voltages VG + and VG-, and RGB data RGBin and a control signal DE, DCLK, Hsync, Vsync, etc.) to input the liquid crystal panel driving signal to the gate driver 30 and the data driver 40, and a timing controller 20 to generate the gate driving signal and the data driving signal, respectively. A reference voltage and a common voltage for generating the common voltage Vcom to the liquid crystal panel 50 by inputting the polarity signal POL from the gate driver 30, the data driver 40, and the timing controller 20 driving the 50. A voltage generator circuit 60 is provided.

그러나, 종래의 TFT-LCD의 구동 회로에 있어서는, 응답속도가 프레임(Frame)의 변환 속도보다 느리기 때문에 동화면 표시에서 화면의 윤곽이 흐리게 보이는 브러링(blurring) 효과가 발생된다. 특히, 계조간 응답속도가 느려 그레이(Gray) 화면에서 응답특성이 나쁘며, 이는 동화면의 화질을 떨어뜨리는 주요 원인이 되었다.However, in the driving circuit of the conventional TFT-LCD, since the response speed is slower than the conversion speed of the frame, a blurring effect in which the outline of the screen is blurred in the moving picture display is generated. In particular, the response speed between grays is low, so the response characteristics of the gray screen are poor, which is a major cause of deterioration of the picture quality.

따라서, 본 발명은 상기 문제점을 해결하기 위하여 이루어진 것으로, 본 발명의 목적은 계조간 응답속도를 개선시켜 동영상에서 보다 선명한 화질을 얻을 수 있는 TFT-LCD의 구동 회로를 제공하는데 있다.Accordingly, the present invention has been made to solve the above problems, and an object of the present invention is to provide a driving circuit of a TFT-LCD which can obtain a clearer picture quality in a moving picture by improving the response speed between grayscales.

도 1은 종래의 일반적인 TFT-LCD의 구동 회로를 나타낸 구성도1 is a configuration diagram showing a driving circuit of a conventional general TFT-LCD

도 2는 본 발명에 의한 TFT-LCD의 구동 회로를 나타낸 구성도2 is a configuration diagram showing a driving circuit of the TFT-LCD according to the present invention.

(도면의 주요 부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)

70 : 컨트롤러부80 : 메모리부70: controller portion 80: memory portion

120 : 타이밍 컨트롤러부130 : 게이트 드라이브부120: timing controller unit 130: gate drive unit

140 : 데이타 드라이브부150 : 액정 패널140: data drive unit 150: liquid crystal panel

상기 목적을 달성하기 위하여, 본 발명에 의한 TFT-LCD의 구동 회로는,In order to achieve the above object, the driving circuit of the TFT-LCD according to the present invention,

화소 데이타를 저장하는 메모리부와,A memory unit for storing pixel data,

화소 데이타, 제어신호, 클럭 신호, 수평 및 수직 동기신호를 수신하며, 상기 메모리부에 상기 화소 데이타를 저장하고 다시 읽어들이며, 현재의 데이타와 이전 필드의 데이타를 비교한 후 변형된 데이타를 발생하는 컨트롤러부와,Receives pixel data, control signals, clock signals, horizontal and vertical sync signals, stores and reads the pixel data in the memory unit, compares current data with data of previous fields, and generates modified data. Controller unit,

상기 컨트롤러부에서 변형된 화소 데이타, 상기 수평 및 수직 동기신호, 상기 제어신호 및 상기 클럭 신호를 수신하며, 액정 패널을 구동시키는 신호를 게이트 드라이버부 및 데이타 드라이브부로 각각 발생하는 타이밍 컨트롤러부를 구비한 것을 특징으로 한다.And a timing controller unit configured to receive the pixel data, the horizontal and vertical synchronization signals, the control signal, and the clock signal modified by the controller unit, and to generate a signal for driving the liquid crystal panel to the gate driver unit and the data driver unit, respectively. It features.

상기 메모리부로부터 액세스되는 데이타의 비트수는 상기 컨트롤러부로 수신되는 화소 데이타의 비트수 보다 약 1.3∼2.5배 정도 많은 것을 특징으로 한다.The number of bits of data accessed from the memory unit is about 1.3 to 2.5 times more than the number of bits of pixel data received by the controller unit.

이하 첨부한 도면에 의거하여 본 발명의 바람직한 실시예를 자세히 설명하도록 한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도 2는 본 발명에 의한 TFT-LCD의 구동 회로를 도시한 것이다. 상기 TFT-LCD의 구동 회로는 도시된 바와 같이, 컨트롤러부(70), 메모리부(80), 타이밍 컨트롤러부(120), 게이트 드라이브부(130), 데이타 드라이브부(140) 및 액정 패널(150)을 구비한다.2 shows a driving circuit of the TFT-LCD according to the present invention. As illustrated, the driving circuit of the TFT-LCD includes a controller unit 70, a memory unit 80, a timing controller unit 120, a gate drive unit 130, a data driver unit 140, and a liquid crystal panel 150. ).

상기 컨트롤러부(70)는 외부로부터 RGB 데이터(RGB), 제어신호(DE), 클럭 신호(DCLK), 수평 및 수직 동기신호(Hsync)(Vsync)를 수신하며, 상기 메모리부(80)에 1 필드(field)의 R,G,B 데이타를 저장하고 다시 읽어들이며, 현재의 데이타와 이전 필드(field)의 데이타를 비교한 후 데이타를 변형시키는 역할을 한다. 이렇게 변형된 데이타(R',G',B')는 타이밍 컨트롤러부(120)로 출력된다. 이때, 상기 메모리부(80)로부터 액세스되는 데이타의 비트수는 R,G,B 데이타의 비트수 보다 약 1.3∼2.5배 정도 많은 것을 특징으로 한다.The controller 70 receives RGB data RGB, a control signal DE, a clock signal DCLK, horizontal and vertical synchronization signals Hsync Vsync from an external device, and transmits 1 to the memory unit 80. It stores and reads the R, G, and B data of the field again, and compares the current data with the data of the previous field and transforms the data. The modified data R ', G', and B 'are output to the timing controller 120. At this time, the number of bits of data accessed from the memory unit 80 is about 1.3 to 2.5 times more than the number of bits of R, G, and B data.

상기 타이밍 컨트롤러부(120)는 상기 컨트롤러부(70)에서 변형된 데이타 신호(R',G',B'), 수평 및 수직 동기신호(Hsync)(Vsync), 제어신호(DE) 및 클럭신호(DCLK)를 수신하며, 상기 액정 패널(150)을 구동시키는 신호를 상기 게이트 드라이브부(130) 및 데이타 드라이브부(140)로 발생한다.The timing controller 120 includes data signals R ′, G ′, and B ′ modified in the controller 70, horizontal and vertical synchronization signals Hsync, Vsync, control signals DE, and clock signals. Receives a DCLK and generates a signal for driving the liquid crystal panel 150 to the gate driver 130 and the data driver 140.

상기 게이트 드라이버(130)는 게이트 구동신호를 발생하여 액정패널(150)의 게이트 라인을 구동시키고, 상기 데이타 드라이브부(140)는 데이타 구동신호를 발생하여 액정패널(150)의 데이타 라인을 구동시킨다.The gate driver 130 generates a gate driving signal to drive the gate line of the liquid crystal panel 150, and the data driver 140 generates a data driving signal to drive the data line of the liquid crystal panel 150. .

그리고, 도면에는 도시되지 않았지만, 상기 타이밍 콘트롤러(120)로부터 극성신호(POL)를 입력하여 상기 액정패널(150)에 공통전압(Vcom)을 발생하는 기준전압 및 공통전압 발생회로를 구비하고 있다.Although not shown in the drawing, a reference voltage and a common voltage generation circuit are provided to generate the common voltage Vcom to the liquid crystal panel 150 by inputting the polarity signal POL from the timing controller 120.

상기 구성에서, 상기 컨트롤러부(70)와 상기 타이밍 컨트롤러부(120)는 단일 칩(Chip)으로 구성할 수 있다.In the above configuration, the controller unit 70 and the timing controller unit 120 may be configured as a single chip.

한편, 상기 컨트롤러부(70)가 데이타를 변형할 시간을 얻기 위해 R,G,B 데이타 비트수보다 메모리 액세스 비트가 더 많아야 한다.On the other hand, in order to obtain time for the controller unit 70 to transform the data, the memory access bits should be larger than the number of R, G, and B data bits.

예컨대, R,G,B 데이타가 각각 8비트라고 할 때, 메모리 액세스 데이타 비트는 32비트에서 64비트 정도는 되어야 한다. 그 이유는 다음과 같다.For example, when the R, G, and B data are each 8 bits, the memory access data bits should be 32 to 64 bits. The reason for this is as follows.

상기 컨트롤러부(70)가 R,G,B 데이타를 받아서 메모리부(80)에 저장하거나 상기 메모리부(80)로부터 데이타를 읽어들이는 시간은 어떤 로오 선택 기간의 50∼80% 이내에 이루어져야한다. 이때, 나머지 시간을 데이타를 비교하고 변형하는데 쓰여진다.The time for the controller unit 70 to receive the R, G, and B data and store the data in the memory unit 80 or to read the data from the memory unit 80 should be within 50 to 80% of a certain row selection period. The remaining time is then used to compare and transform the data.

이를 위해선, 상기 메모리부(80)로부터 액세스되는 데이타의 비트수가 R,G,B 데이타 비트수 보다 약 1.3∼2.5배 정도 많아야만 소정의 시간내에 메모리를리드(Read) 또는 라이트(Write) 동작을 완료할 수 있다.To do this, the number of bits of data accessed from the memory unit 80 is about 1.3 to 2.5 times larger than the number of R, G, and B data bits, so that the read or write operation of the memory can be performed within a predetermined time. You can finish it.

이상에서 자세히 설명된 바와 같이, 본 발명에 의한 박막트랜지스터 액정표시장치(TFT-LCD)의 구동 회로에 의하면, 계조간 응답속도를 개선시켜 동영상에서 보다 선명한 화질을 얻을 수 있다.As described in detail above, according to the driving circuit of the TFT-LCD according to the present invention, it is possible to obtain a clearer picture quality in a video by improving the response speed between grayscales.

아울러 본 발명의 바람직한 실시예들은 예시의 목적을 위해 개시된 것이며, 당업자라면 본 발명의 사상과 범위 안에서 다양한 수정, 변경, 부가등이 가능할 것이며, 이러한 수정 변경등은 이하의 특허청구범위에 속하는 것으로 보아야 할 것이다.In addition, preferred embodiments of the present invention are disclosed for the purpose of illustration, those skilled in the art will be able to various modifications, changes, additions, etc. within the spirit and scope of the present invention, these modifications and changes should be seen as belonging to the following claims. something to do.

Claims (2)

박막트랜지스터 액정표시장치의 구동 회로에 있어서,In a driving circuit of a thin film transistor liquid crystal display device, 화소 데이타를 저장하는 메모리부와,A memory unit for storing pixel data, 화소 데이타, 제어신호, 클럭 신호, 수평 및 수직 동기신호를 수신하며, 상기 메모리부에 상기 화소 데이타를 저장하고 다시 읽어들이며, 현재의 데이타와 이전 필드의 데이타를 비교한 후 변형된 데이타를 발생하는 컨트롤러부와,Receives pixel data, control signals, clock signals, horizontal and vertical sync signals, stores and reads the pixel data in the memory unit, compares current data with data of previous fields, and generates modified data. Controller unit, 상기 컨트롤러부에서 변형된 화소 데이타, 상기 수평 및 수직 동기신호, 상기 제어신호 및 상기 클럭 신호를 수신하며, 액정 패널을 구동시키는 신호를 게이트 드라이버부 및 데이타 드라이브부로 각각 발생하는 타이밍 컨트롤러부를 구비한 것을 특징으로 하는 박막트랜지스터 액정표시장치의 구동 회로.And a timing controller unit configured to receive the pixel data, the horizontal and vertical synchronization signals, the control signal, and the clock signal modified by the controller unit, and to generate a signal for driving the liquid crystal panel to the gate driver unit and the data driver unit, respectively. A driving circuit for a thin film transistor liquid crystal display device. 제 1 항에 있어서,The method of claim 1, 상기 메모리부로부터 액세스되는 데이타의 비트수는 상기 컨트롤러부로 수신되는 화소 데이타의 비트수 보다 약 1.3∼2.5배 정도 많은 것을 특징으로 하는 박막트랜지스터 액정표시장치의 구동 회로.And the number of bits of data accessed from the memory unit is about 1.3 to 2.5 times more than the number of bits of pixel data received by the controller unit.
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KR100694435B1 (en) * 2005-12-22 2007-03-12 주식회사 대우일렉트로닉스 System and method for setting pass word on the personal video recorder

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JPH1039837A (en) * 1996-07-22 1998-02-13 Hitachi Ltd Liquid crystal display device
JP2000221475A (en) * 1999-02-03 2000-08-11 Nec Corp Liquid crystal display device and drive method therefor
KR20010055986A (en) * 1999-12-13 2001-07-04 노봉규 Apparatus For Driving LCD with a Brief Response time and Method therefor
JP2001201763A (en) * 2000-01-19 2001-07-27 Mitsubishi Electric Corp Liquid crystal display device

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JPH1039837A (en) * 1996-07-22 1998-02-13 Hitachi Ltd Liquid crystal display device
JP2000221475A (en) * 1999-02-03 2000-08-11 Nec Corp Liquid crystal display device and drive method therefor
KR20010055986A (en) * 1999-12-13 2001-07-04 노봉규 Apparatus For Driving LCD with a Brief Response time and Method therefor
JP2001201763A (en) * 2000-01-19 2001-07-27 Mitsubishi Electric Corp Liquid crystal display device

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* Cited by examiner, † Cited by third party
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KR100694435B1 (en) * 2005-12-22 2007-03-12 주식회사 대우일렉트로닉스 System and method for setting pass word on the personal video recorder

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