KR20020060794A - Fabrication method of hemispherical grained Si using plasma cleaning - Google Patents
Fabrication method of hemispherical grained Si using plasma cleaning Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 31
- 238000004140 cleaning Methods 0.000 title claims abstract description 27
- 238000004519 manufacturing process Methods 0.000 title description 5
- 239000007789 gas Substances 0.000 claims abstract description 24
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 9
- 239000011737 fluorine Substances 0.000 claims abstract description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 3
- 239000001257 hydrogen Substances 0.000 claims abstract description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 3
- 239000000758 substrate Substances 0.000 claims abstract description 3
- 239000000203 mixture Substances 0.000 claims abstract 2
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- 239000000356 contaminant Substances 0.000 abstract description 4
- 238000010521 absorption reaction Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- 235000012431 wafers Nutrition 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 239000012159 carrier gas Substances 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011534 incubation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/84—Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
- H01L21/3247—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02046—Dry cleaning only
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- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Drying Of Semiconductors (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Description
본 발명은 HSG-Si(hemispherical grained Si) 형성방법에 관한 것으로서, 특히 플라즈마 세정을 이용하는 HSG-Si 형성방법에 관한 것이다.The present invention relates to a method of forming HSG-Si (hemispherical grained Si), and more particularly to a method of forming HSG-Si using plasma cleaning.
반도체 메모리 소자의 집적도 증가에 따른 셀 정전용량의 감소는 메모리 셀의 독출능력을 저하시키고 소프트 에러율을 증가시킬 뿐 만 아니라 저전압에서의 소자동작을 어렵게 만든다. 따라서 반도체 메모리 소자의 고집적화를 위해서 셀 정전용량의 감소는 반드시 해결되어야 할 문제이다.The decrease in cell capacitance due to the increase in the density of semiconductor memory devices not only reduces the readability of the memory cells, increases the soft error rate, but also makes it difficult to operate the devices at low voltages. Therefore, reduction of cell capacitance is a problem that must be solved for high integration of semiconductor memory devices.
따라서, 셀 정전용량의 증가를 위하여 3차원적 구조를 갖는 커패시터가 제안되었다. 후지쯔(Fujisu)사의 핀 구조(Fin Structure) 하부전극, 도시바(Toshiba)사의 박스 구조(Box Structure) 하부전극 및 미쯔비시(Mitsubishi)사의 원통 구조(Cylindrical Structure) 하부전극 등이 바로 그것이다.Therefore, a capacitor having a three-dimensional structure has been proposed for increasing cell capacitance. Fujisu's Fin Structure bottom electrode, Toshiba's Box Structure bottom electrode, and Mitsubishi's Cylindrical Structure bottom electrode.
그러나, 3차원 구조의 커패시터는 그 제조 공정이 복잡할 뿐만 아니라 제조 과정에서 결함이 발생하기 쉽기 때문에 실제로 적용하기가 용이하지 않다. 또한, 최근에 커패시터의 정전용량을 증대시키기 위해 고유전 박막에 대한 접근이 시도되고 있기는 하지만 아직 실용화에는 많은 문제점을 갖고 있다.However, the capacitor of the three-dimensional structure is not easy to apply because the manufacturing process is complicated and defects are likely to occur in the manufacturing process. In addition, although an approach to a high dielectric thin film has recently been attempted to increase the capacitance of a capacitor, there are still many problems in practical use.
이에, 정전용량을 증대시키기 위하여 국부적으로 면적을 증가시키는 요철형 하부전극의 제조방법에 대하여 많은 연구가 진행되어 왔다. 이러한 요철형 하부전극의 제조방법 중에서 대표적인 것이 하부 전극의 표면에 요철이 생기도록 HSG-Si을 형성하는 방법이다.Accordingly, many studies have been conducted on the manufacturing method of the uneven lower electrode which locally increases the area in order to increase the capacitance. A typical method of manufacturing the uneven lower electrode is a method of forming HSG-Si such that unevenness occurs on the surface of the lower electrode.
하부전극의 표면에 HSG-Si을 형성하는 방법으로는 (1) 비정질 실리콘에서 다결정 실리콘으로 상 변태하는 온도에서 실리콘을 화학기상증착하는 방법, (2) 자연산화막이 없는 비정질 실리콘을 고진공에서 어닐링하는 방법, (3) SiH4나 Si2H6등이 기체를 이용한 화학기상증착방법으로 HSG-Si 종자(seed)를 형성하거나 SiH4나 Si2H6분자를 빔(beam) 형태로 비정질 실리콘에 조사(irradiation)하여 HSG-Si 종자를 형성한 후 이를 성장시키는 종자 형성법(seeding method) 등이 있다.HSG-Si is formed on the surface of the lower electrode by (1) chemical vapor deposition of silicon at a temperature of phase transformation from amorphous silicon to polycrystalline silicon, and (2) annealing amorphous silicon without a natural oxide film at high vacuum. Method (3) SiH 4 or Si 2 H 6 is a chemical vapor deposition method using gas to form HSG-Si seeds or SiH 4 or Si 2 H 6 molecules in the form of a beam to amorphous silicon There is a seeding method of irradiating to form HSG-Si seed and growing it.
비정질 실리콘 상에 HSG-Si을 형성할 경우에는 비정질 실리콘의 표면이 매우깨끗해야 한다. 하지만, 실리콘 표면이 대기에 노출되면 산소와의 결합으로 인해 표면에 얇은 자연산화막이 형성되거나 미세한 오염입자가 흡착되게 된다. 이러한 자연산화막이나 미세 오염입자는 HSG-Si의 형성에 치명적으로 나쁜 영향을 미친다. 따라서, 이들을 제거해야 하는데, 이를 위해 HF를 이용하는 습식세정이 주로 많이 사용된다.When HSG-Si is formed on amorphous silicon, the surface of amorphous silicon must be very clean. However, when the silicon surface is exposed to the atmosphere, a thin natural oxide film is formed on the surface due to the bonding with oxygen, or the fine polluted particles are adsorbed. Such natural oxide film or finely contaminated particles adversely affect the formation of HSG-Si. Therefore, they have to be removed. For this purpose, wet cleaning using HF is mainly used.
그러나, 이러한 습식세정을 하더라도 습식 세정후에 웨이퍼가 오랜시간, 예컨대 약 30분 이상 대기중에 방치되면 다시 비정질 실리콘 표면에 자연산화막이 형성되거나 미세 오염입자가 흡착되게 되어 HSG가 제대로 형성되지 않아 문제이다.However, even after such wet cleaning, if the wafer is left in the air for a long time after wet cleaning, for example, for about 30 minutes or more, a natural oxide film is formed on the surface of the amorphous silicon, or fine contaminant particles are adsorbed, and thus HSG is not properly formed.
최근들어 300mm 크기의 웨이퍼가 적용될 수 있는 장비들이 등장하고 있는데, 이러한 장비들은 로드락 챔버(load lock chamber)가 진공상태를 유지하지 않도록 설계되는 경우가 많기 때문에 상기와 같은 현상이 중요한 문제점으로 대두되고 있다.Recently, equipments that can be applied to wafers of 300 mm size have been introduced. These devices are often a problem because the load lock chamber is designed not to maintain a vacuum state. have.
따라서, 본 발명이 이루고자 하는 기술적 과제는, 플라즈마를 이용하여 HSG-Si 형성 전(前)에 세정공정을 진행함으로써 상술한 종래의 문제점을 해결할 수 있는 HSG-Si 형성방법을 제공하는 데 있다.Accordingly, the technical problem to be achieved by the present invention is to provide a HSG-Si forming method that can solve the above-described conventional problems by performing a cleaning process before forming HSG-Si using plasma.
도 1의 (a)는 Ar 과 SF6혼합기체의 플라즈마를 사용하여 전(前) 세정을 하고 HSG-Si을 형성한 경우에 대한 SEM 사진이고, (b)는 H2와 SF6혼합기체의 플라즈마를 사용하여 전(前) 세정을 한 경우에 대한 SEM 사진이다.FIG. 1 (a) is a SEM photograph of the case where HSG-Si is formed after pre-cleaning using plasma of Ar and SF 6 mixed gas, and (b) shows H 2 and SF 6 mixed gas. SEM photograph of the case where pre-cleaning was performed using plasma.
상기 기술적 과제를 달성하기 위한 본 발명에 따른 HSG-Si 형성방법은, 기판표면을 수소성분과 플루오르성분을 함유하는 플라즈마로 세정 한 후에 HSG-Si을 형성하는 것을 특징으로 한다.The HSG-Si forming method according to the present invention for achieving the above technical problem is characterized in that to form the HSG-Si after cleaning the substrate surface with a plasma containing a hydrogen component and a fluorine component.
여기서, 상기 플라즈마는 H2와 SF6의 혼합기체로 형성하는 것이 바람직하며, 이 때, 상기 H2는 200~500 sccm 유속으로 공급되고, 상기 SF6은 2~100 sccm 유속으로 공급되는 것이 바람직하다. 그리고, 상기 플라즈마 형성을 위하여 인가되는 RF 전력은 50~200W인 것이 바람직하다.Here, the plasma is preferably formed of a mixed gas of H 2 and SF 6 , wherein, H 2 is supplied at a flow rate of 200 ~ 500 sccm, SF 6 is preferably supplied at a flow rate of 2 ~ 100 sccm. Do. In addition, the RF power applied to form the plasma is preferably 50 ~ 200W.
한편, 상기 플라즈마 세정과 상기 HSG-Si 형성은 동일한 챔버 내에서 행해지는 것이 바람직하다.On the other hand, the plasma cleaning and the HSG-Si formation are preferably performed in the same chamber.
이하에서, 본 발명의 바람직한 실시예를 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.
본 발명은, 비정질 실리콘 표면상의 자연산화막을 식각하기 위해서 플루오르(F) 성분을 사용한다. 그러나, HSG-Si 형성은 비교적 고진공 하에서 진행되기 때문에 플루오르성분 함유기체만을 사용하여서는 플라즈마를 발생시키기가 어렵다. 따라서, 본 발명은 플라즈마 발생을 위한 운반기체를 추가로 더 사용한다.In the present invention, a fluorine (F) component is used to etch a native oxide film on an amorphous silicon surface. However, since HSG-Si formation proceeds under relatively high vacuum, it is difficult to generate plasma using only a fluorine-containing gas. Thus, the present invention further uses a carrier gas for plasma generation.
플루오르성분 함유기체로는 SF6기체를 사용하는 것이 바람직하고, 운반기체로는 H2기체를 사용하는 것이 바람직하다. 즉, 이 경우 자연산화막의 제거는 SF6에서 분해된 플루오르(F)에 의해서 이루어지며, 플라즈마 발생을 위한 압력의 증가는H2기체에 의해서 주로 이루어지게 된다.It is preferable to use SF 6 gas as the fluorine-containing gas, and H 2 gas as the carrier gas. That is, in this case, the removal of the natural oxide film is made by fluorine (F) decomposed in SF 6 , and the increase in pressure for plasma generation is mainly made by H 2 gas.
자연산화막의 식각을 위한 기체로서 NF3나 Cl2기체 등을 사용할 수도 있으나, HSG-Si의 형성에 방해가 되지 않으면서 자연산화막을 제거하기 위해서는 SF6을 사용하는 것이 가장 바람직하다. 그러나, 플루오르 성분이 너무 많게 되면 HSG-Si의 형성에 방해가 되기 때문에 플루오르 성분은 가능한 소량 사용하는 것이 바람직하다. 예컨대, H2와 SF6혼합기체의 플라즈마를 사용하여 플라즈마 세정을 행할 경우, H2와 SF6을 200~500 sccm 및 2~10 sccm의 유속비로 챔버에 각각 공급하는 것이 바람직하다.NF 3 or Cl 2 gas may be used as a gas for etching the natural oxide layer, but SF 6 is most preferably used to remove the native oxide layer without interfering with the formation of HSG-Si. However, since too much fluorine component will interfere with the formation of HSG-Si, it is preferable to use a small amount of the fluorine component as much as possible. For example, when performing plasma cleaning using plasma of H 2 and SF 6 mixed gas, it is preferable to supply H 2 and SF 6 to the chamber at a flow rate ratio of 200 to 500 sccm and 2 to 10 sccm, respectively.
플라즈마 형성을 위해 인가되는 RF 전력이 너무 세면, HSG-Si이 손상을 받을 수 있으므로, RF 전력은 50~200W 의 범위로 하는 것이 바람직하다.If the RF power applied for plasma formation is too strong, HSG-Si may be damaged, so the RF power is preferably in the range of 50 to 200W.
운반기체로서 H2기체 대신에 Ar 기체를 사용할 수도 있다. Ar 기체를 사용할 경우에는 인큐베이션 시간(incubation time)이 증가되어 HSG-Si 형성에 있어서 선택비(selectivity)가 매우 향상되기는 하지만, HSG-Si의 모양측면에서는 H2기체를 사용하는 경우에 비해 바람직하지 않다.Ar gas may be used instead of H 2 gas as the carrier gas. In the case of using Ar gas, the incubation time is increased, which greatly improves the selectivity in forming HSG-Si. However, in terms of shape of HSG-Si, it is not preferable compared to using H 2 gas. not.
도 1은 Ar 기체를 사용하는 경우와 H2기체를 사용한 경우를 비교하여 관찰한 주사전자현미경(SEM) 사진이다. 여기서 (a)는 Ar 과 SF6혼합기체의 플라즈마를 사용하여 전(前) 세정을 하고 HSG-Si을 형성한 경우이고, (b)는 H2와 SF6혼합기체의 플라즈마를 사용하여 전 세정을 한 경우에 대한 것이다. 이 때의 플라즈마 세정은 15초 동안 하였으며, RF 전력은 50W 이었다.1 is a scanning electron microscope (SEM) photograph of the comparison between the case using Ar gas and the case of using H 2 gas. Where (a) is a case where pre-cleaning is performed using plasma of Ar and SF 6 mixed gas and HSG-Si is formed, and (b) is pre-cleaning using plasma of H 2 and SF 6 mixed gas. Is for one case. Plasma cleaning at this time was carried out for 15 seconds, RF power was 50W.
도 1을 참조하면, (b)의 경우는 HSG-Si의 밀도가 높으면서 모양도 좋은 반면에, (a)의 경우는 HSG-Si의 그레인(grain) 크기가 작고 HSG-Si이 형성되지 않은 부분이 많다는 것을 볼 수 있다. 즉, H2기체를 사용하는 경우보다 Ar 기체를 사용하는 경우가 HSG-Si에 손상(damage)을 많이 입히게 되어 HSG-Si이 제대로 성장되지 못하게 된다는 것을 알 수 있다.Referring to FIG. 1, in case of (b), the density of HSG-Si is high and the shape is good, whereas in case of (a), the grain size of HSG-Si is small and the HSG-Si is not formed. You can see that there are a lot. That is, it can be seen that the use of Ar gas causes more damage to HSG-Si than the case of using H 2 gas, thereby preventing HSG-Si from growing properly.
플라즈마 세정공정과 HSG-Si은 동일한 챔버 내에서 수행되는 것이 특히 바람직하다. 이 때에는 웨이퍼가 대기 중에 노출되지 않기 때문에, 플라즈마 세정공정과 HSG-Si 형성공정 사이에 어느 정도의 시간지연이 생겨도 종래와 같이 자연산화막이 형성되거나 미세 오염물이 실리콘 표면에 흡착되는 것이 방지된다.It is particularly preferable that the plasma cleaning process and the HSG-Si be performed in the same chamber. Since the wafer is not exposed to the atmosphere at this time, even if some time delay occurs between the plasma cleaning process and the HSG-Si forming process, the natural oxide film is prevented from being formed or the fine contaminants are adsorbed on the silicon surface as in the prior art.
상술한 바와 같은 본 발명에 따른 HSG-Si 형성방법은, 세정을 진공 중에서 플라즈마로 하기 때문에 세정 후에 대기 중에 노출시킴이 없이 다른 챔버로 웨이퍼를 이송하여 HSG-Si 형성공정을 수행하는 것이 용이하게 된다. 물론, 동일한 챔버 내에서 플라즈마 세정과 HSG-Si 형성공정을 모두 수행할 수도 있다.As described above, the HSG-Si forming method according to the present invention facilitates the HSG-Si forming process by transferring the wafer to another chamber without exposing to the atmosphere after cleaning because the cleaning is performed in a plasma in vacuum. . Of course, both the plasma cleaning and the HSG-Si forming process may be performed in the same chamber.
따라서, 종래와 같이 세정공정과 HSG-Si 형성공정 사이에서 실리콘 표면에 자연산화막이 형성되거나 미세 오염물이 흡착되는 것이 방지되어 균일하고도 치밀한 HSG-Si을 형성시킬 수 있게 된다.Therefore, as in the prior art, the natural oxide film is prevented from being formed on the silicon surface or the fine contaminants are adsorbed between the cleaning process and the HSG-Si forming process, thereby forming a uniform and dense HSG-Si.
본 발명은 상기 실시예에만 한정되지 않으며, 본 발명의 기술적 사상 내에서 당 분야에서 통상의 지식을 가진 자에 의해 많은 변형이 가능함은 명백하다.The present invention is not limited to the above embodiments, and it is apparent that many modifications are possible by those skilled in the art within the technical spirit of the present invention.
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| KR20040048019A (en) * | 2002-12-02 | 2004-06-07 | 주성엔지니어링(주) | Forming method of Silicon epitaxial layer |
| WO2010021508A2 (en) * | 2008-08-21 | 2010-02-25 | 트리플코어스코리아 | Method for cleaning components of semiconductor equipment and apparatus for cleaning components of semiconductor equipment using the same |
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| JP2972145B2 (en) * | 1996-04-10 | 1999-11-08 | ユナイテッド マイクロエレクトロニクス コープ | Method for growing hemispherical granular silicon |
| KR100328360B1 (en) * | 1999-04-26 | 2002-03-13 | 윤종용 | Method for forming hemispherical grain |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20040048019A (en) * | 2002-12-02 | 2004-06-07 | 주성엔지니어링(주) | Forming method of Silicon epitaxial layer |
| WO2010021508A2 (en) * | 2008-08-21 | 2010-02-25 | 트리플코어스코리아 | Method for cleaning components of semiconductor equipment and apparatus for cleaning components of semiconductor equipment using the same |
| WO2010021508A3 (en) * | 2008-08-21 | 2010-06-17 | 트리플코어스코리아 | Method for cleaning components of semiconductor equipment and apparatus for cleaning components of semiconductor equipment using the same |
| KR100987977B1 (en) * | 2008-08-21 | 2010-10-18 | (주)트리플코어스코리아 | A method for cleaning parts of semiconductor equipment and an apparatus for cleaning parts of semiconductor equipment using the same |
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