KR20010065180A - Method of manufacturing a capacitor in a semiconductor device - Google Patents

Method of manufacturing a capacitor in a semiconductor device Download PDF

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KR20010065180A
KR20010065180A KR1019990065049A KR19990065049A KR20010065180A KR 20010065180 A KR20010065180 A KR 20010065180A KR 1019990065049 A KR1019990065049 A KR 1019990065049A KR 19990065049 A KR19990065049 A KR 19990065049A KR 20010065180 A KR20010065180 A KR 20010065180A
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heat treatment
semiconductor device
bst
treatment process
thin film
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KR1019990065049A
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KR100347534B1 (en
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김유성
조호진
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박종섭
주식회사 하이닉스반도체
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/65—Electrodes comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE: A method for forming a capacitor of a semiconductor device is provided to improve the uniformity of the composition of a titanium in a wafer using N2O and the characteristic of the BST film using UV/O2 treatment when a BST film is formed. CONSTITUTION: The method includes four steps. The first step is to form the lower electrode(12) on a substrate(11) on which a lower structure is formed. The second step is to form a dielectric film(13) by depositing a BST film on the lower electrode with a CVD(Chemical Vapor Deposition)method using N2O as an oxidizer. The third step is to sequentially perform a low temperature thermal treatment process and a high temperature thermal treatment process after depositing the BST thin film. The fourth step is to form the upper electrode on the dielectric film.

Description

반도체 소자의 캐패시터 제조방법{Method of manufacturing a capacitor in a semiconductor device}Method of manufacturing a capacitor in a semiconductor device

본 발명은 반도체 소자의 캐패시터 제조방법에 관한 것으로, 특히 BST 유전체막의 조성 균일도를 향상시키고 BST막 내의 잔류 카본(Carbon)기를 제거하여 유전체막의 전기적 특성을 향상시킬 수 있는 반도체 소자의 캐패시터 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device, and more particularly, to a method of manufacturing a capacitor of a semiconductor device capable of improving the composition uniformity of a BST dielectric film and removing residual carbon groups in the BST film to improve electrical characteristics of the dielectric film. will be.

일반적으로, (Ba, Sr)TiO3(이하, 'BST'라 함)는 기존의 DRAM용 캐패시터의 유전물질인 ONO보다 20배 이상, Ta2O5보다는 약 10배 정도의 유전율을 가지므로, 4G 이상의 고집적도가 요구되는 DRAM의 캐패시터 물질로서 연구가 진행되고 있다.In general, (Ba, Sr) TiO 3 (hereinafter referred to as 'BST') has a dielectric constant of about 20 times or more than ONO, which is a dielectric material of the conventional DRAM capacitor, and about 10 times than Ta 2 O 5 , Research is underway as a capacitor material for DRAMs that require high density of 4G or higher.

BST 박막은 물리기상증착(Physical Vapor Deposition; PVD)법 또는 화학기상증착(Chemical Vapor Deposition; CVD)법으로 형성한다. PVD법으로는 플라즈마 스퍼터링(Plasma Sputtering)법이 주로 사용되는데, 이렇게 성막된 박막은 조성비가 우수하고 조밀한 성질을 가진다. 그러나 이 방법은 강한 직진성을 가진 플럭스(Flux)를 형성하므로 스텝 커버리지(Step Coverage)가 불량한 단점이 있다. 한편, CVD법은 액체나 고체 소오스를 기화(Vaporization)하여 박막을 제조하는 방법이다. CVD 공정을 사용하여 형성한 BST 박막은 PVD법에 비해 매우 양호한 스텝 커버리지 특성을 가지므로 실제 소자 제조에 적용시 유리하다. 이와 같이 성막된 BST 박막은 후속 열처리 공정에 의해 유전특성과 누설특성이 향상되는 특징을 갖는다.The BST thin film is formed by physical vapor deposition (PVD) or chemical vapor deposition (CVD). As the PVD method, a plasma sputtering method is mainly used. The thin film thus formed has an excellent composition ratio and has a dense property. However, this method has a disadvantage in that step coverage is poor because it forms a flux having strong straightness. On the other hand, the CVD method is a method of manufacturing a thin film by vaporizing a liquid or a solid source. The BST thin film formed by the CVD process has very good step coverage characteristics compared to the PVD method, which is advantageous when applied to actual device fabrication. The BST thin film thus formed has a characteristic of improving dielectric and leakage characteristics by a subsequent heat treatment process.

CVD법을 이용한 BST 유전체막의 증착은 소오스를 기화시킨 후 산화제(Oxidant)와 반응에 의해 이루어진다. 산화제로는 주로 O2가스가 사용되는데, 이 경우 웨이퍼 내 BST 박막의 조성 균일성이 불량해지게 된다. 또한, BST 박막을 CVD법에 의해 비정질 증착하는 경우에는 BST 박막 내에 다량의 유기 불순물(Organic Impurity; C, H)을 다량 포함하고 있어 결정성이 열악한 특성을 갖는다. 이와 같은 유기 불순물을 제거하고 박막의 결정성을 향상시키기 위해 후속 열처리 공정을 실시하여야 하며, 후속 열처리 공정은 450℃ 이하에서 진행하는 저온 열처리 공정과 500℃ 이상에서 진행하는 고온 열공정으로 이루어진다. 저온 열처리 공정시에는 유기 불순물과 산소를 반응시켜 불순물을 제거하는 플라즈마 처리 또는 UV/O3처리를 실시하고, BST 박막의 결정성을 향상시켜주기 위한 고온 열처리 공정시에는 RTP 등을 실시한다. 그런데, 열처리 온도가 너무 높으면 금속 하부전극과 BST 유전체막과의 계면에서 금속-산화물막이 형성되거나 장벽 산화가 일어나게 되는 문제점이 있다. 이에 따라 BST 캐패시터의 전기적 특성이 열화되어 소자의 동작 전압에서 충분한 충전 용량을 확보할 수 없게 되므로, 데이터를 저장하는 캐패시터로서 사용할 수 없게 된다. 따라서 안정한 전극 구조를 유지하면서 BST 박막의 질을 향상시키기 위한 연구가 진행되고 있다.Deposition of the BST dielectric film using the CVD method is performed by reaction with an oxidant after vaporizing the source. O 2 gas is mainly used as the oxidizing agent, in which case the uniformity of composition of the BST thin film in the wafer becomes poor. In addition, in the case of amorphous deposition of a BST thin film by CVD, a large amount of organic impurity (C, H) is contained in the BST thin film, so that the crystallinity is poor. In order to remove such organic impurities and improve the crystallinity of the thin film, a subsequent heat treatment process should be performed. The subsequent heat treatment process includes a low temperature heat treatment process performed at 450 ° C. or lower and a high temperature thermal process performed at 500 ° C. or higher. In the low temperature heat treatment process, plasma treatment or UV / O 3 treatment is performed to remove impurities by reacting organic impurities with oxygen, and RTP is performed during the high temperature heat treatment process to improve crystallinity of the BST thin film. However, if the heat treatment temperature is too high, there is a problem that a metal-oxide film is formed or a barrier oxidation occurs at the interface between the metal lower electrode and the BST dielectric film. As a result, the electrical characteristics of the BST capacitor deteriorate and sufficient charging capacity cannot be secured at the operating voltage of the device, and thus it cannot be used as a capacitor for storing data. Therefore, research is being conducted to improve the quality of BST thin films while maintaining a stable electrode structure.

따라서, 본 발명은 BST 유전체막 형성시 N2O 가스를 사용하여 웨이퍼 내에서 티타늄 조성 균일도를 향상시키고 UV/O3처리를 사용하여 BST 유전체막의 특성을 개선할 수 있는 반도체 소자의 캐패시터 제조방법을 제공하는데 그 목적이 있다.Accordingly, the present invention provides a method for manufacturing a capacitor of a semiconductor device capable of improving the uniformity of titanium composition in a wafer using N 2 O gas when forming a BST dielectric film and improving the properties of the BST dielectric film using UV / O 3 treatment. The purpose is to provide.

상술한 목적을 달성하기 위한 본 발명에 따른 반도체 소자의 캐패시터 제조방법은 하부구조가 형성된 기판 상에 하부전극을 형성하는 단계; 상기 하부전극 상에 N2O 가스를 산화제로 이용한 화학기상증착법으로 BST를 증착하고, 이로 인하여 유전체막이 형성되는 단계; 상기 BST 박막 증착 후 저온 열처리 공정 및 고온 열처리 공정을 순차적으로 실시하는 단계; 및 상기 유전체막 상에 상부전극을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 한다.Capacitor manufacturing method of a semiconductor device according to the present invention for achieving the above object comprises the steps of forming a lower electrode on a substrate formed with a lower structure; Depositing BST on the lower electrode by chemical vapor deposition using an N 2 O gas as an oxidant, thereby forming a dielectric film; Sequentially depositing the BST thin film and then performing a low temperature heat treatment process and a high temperature heat treatment process; And forming an upper electrode on the dielectric film.

도 1a 내지 1c는 본 발명에 따른 반도체 소자의 캐패시터 제조방법을 설명하기 위해 순차적으로 도시한 소자의 단면도.1A to 1C are cross-sectional views of devices sequentially shown to illustrate a method of manufacturing a capacitor of a semiconductor device according to the present invention.

도 2는 산화질소 가스 사용 비율에 따른 BST 박막 내 티타늄의 균일도 및 BST 박막의 조성비 변화를 실험한 결과를 나타낸 그래프.Figure 2 is a graph showing the results of experiments in the variation of the composition ratio of the titanium uniformity and BST thin film in the BST thin film according to the nitrogen oxide gas use ratio.

도 3a 및 3b는 산화질소 가를 사용한 BST 박막의 열처리 전후 오제(Auger) 프로파일을 설명하기 위해 도시한 그래프.3A and 3B are graphs for explaining Auger profiles before and after heat treatment of BST thin films using nitric oxide value.

<도면의 주요 부분에 대한 부호 설명><Description of the symbols for the main parts of the drawings>

11 : 기판 12 : 하부전극11 substrate 12 lower electrode

13 : 유전체막 14 : 상부전극13 dielectric film 14 upper electrode

이하, 첨부된 도면을 참조하여 본 발명의 실시 예를 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

도 1a 내지 1c는 본 발명에 따른 반도체 소자의 캐패시터 제조방법을 설명하기 위해 순차적으로 도시한 소자의 단면도이다.1A to 1C are cross-sectional views of devices sequentially shown to explain a method of manufacturing a capacitor of a semiconductor device according to the present invention.

도 1a에 도시된 바와 같이, 하부구조가 형성된 기판(11) 상에 하부전극(12)을 형성한다. 하부전극(12)은 플래티늄(Pt), 루테늄(Ru), 이리디움(Ir) 등을 이용하여 형성한다.As shown in FIG. 1A, the lower electrode 12 is formed on the substrate 11 on which the lower structure is formed. The lower electrode 12 is formed using platinum (Pt), ruthenium (Ru), iridium (Ir), or the like.

도 1b에 도시된 바와 같이, 하부전극(12) 상에 유전체막(13)을 형성한다. 유전체막(13)은 400 내지 420℃의 온도 조건 및 1 내지 2Torr의 압력 조건에서 BST를 200 내지 300Å의 두께로 증착하여 형성하며, 산화제로는 N2O를 사용한다. 또한, 산화제인 N2O의 유량은 300 내지 1000sccm으로 하며, BST 박막의 조성은 Ba : Sr : Ti= 0.5 : 0.5: 1이 되도록 한다. BST 박막을 증착하고 난 후에는 저온 열처리 공정 및 고온 열처리 공정을 순차적으로 실시한다.As shown in FIG. 1B, the dielectric film 13 is formed on the lower electrode 12. The dielectric film 13 is formed by depositing BST at a thickness of 200 to 300 kPa under a temperature condition of 400 to 420 ° C. and a pressure condition of 1 to 2 Torr, and N 2 O is used as the oxidant. In addition, the flow rate of N 2 O, which is an oxidizing agent, is 300 to 1000 sccm, and the composition of the BST thin film is set to Ba: Sr: Ti = 0.5: 0.5: 1. After depositing the BST thin film, a low temperature heat treatment process and a high temperature heat treatment process are sequentially performed.

BST 박막 내에 포함되어 있는 유기 불순물을 제거하기 위한 저온 열처리 공정시에는 UV/O3열처리를 실시한다. UV/O3열처리 공정은 300 내지 450℃의 온도에서 120 내지 125mW/㎠의 전력을 공급하여 실시하며, 이때 O3의 농도는 20 내지 25mg/Nm으로 한다. 또한, UV/O3처리 시간은 BST 박막 내에 포함된 유기 불순물인 C가 모두 제거되고 하부전극 구조의 산화가 일어나지 않도록 10 내지 30분 정도로 한다. 고온 열처리 공정은 600 내지 700℃에서 급속 열처리(RTP) 공정으로 진행한다.UV / O 3 heat treatment is performed during the low temperature heat treatment process to remove organic impurities contained in the BST thin film. UV / O 3 heat treatment process is performed by supplying a power of 120 to 125mW / ㎠ at a temperature of 300 to 450 ℃, the concentration of O 3 is 20 to 25mg / Nm. In addition, UV / O 3 treatment time is about 10 to 30 minutes so that all organic impurities C included in the BST thin film are removed and oxidation of the lower electrode structure does not occur. The high temperature heat treatment process is a rapid heat treatment (RTP) process at 600 to 700 ℃.

이와 같은 방법으로 유전체막(13)을 형성하고 난 후에는 도 1c에 도시된 바와 같이, 유전체막(14) 상에 상부전극을 형성한다.After the dielectric film 13 is formed in this manner, the upper electrode is formed on the dielectric film 14 as shown in FIG. 1C.

도 2는 산화질소 가스 사용 비율에 따른 BST 박막 내 티타늄의 균일도 및 BST 박막의 조성비 변화를 실험한 결과를 나타낸 그래프이다.Figure 2 is a graph showing the results of experiments in the variation of the composition ratio of the titanium uniformity and BST thin film in the BST thin film according to the nitrogen oxide gas use ratio.

즉, CVD 법으로 BST 박막을 제조할 때 산화제 가스로 사용된 O2와 N2O의 사용비율에 따른 웨이퍼 내 티타늄의 균일도(A)와 BST 박막의 조성비(B)를 나타낸 것이다. 도시된 것과 같이, 산화제 가스로 O2대신 N2O를 사용하는 경우 BST 박막의 티타늄 균일도가 크게 향상되고, BST 박막의 조성비 또한 향상되는 것을 알 수 있다.그런데, N2O를 사용한 경우 O2를 사용한 경우보다 BST 박막 내 C의 양이 크게 증가하게 된다. BST 박막 내에 C가 많이 포함되게 되면 BST 박막의 유전 특성뿐만 아니라 누설전류 특성도 저하된다. 그러므로, 후속 열공정을 통하여 BST 박막 내의 불순물을 제거하여야 한다.That is, it shows the uniformity (A) of titanium in the wafer and the composition ratio (B) of the BST thin film according to the use ratio of O 2 and N 2 O used as the oxidant gas when manufacturing the BST thin film by the CVD method. As shown, when using N 2 O instead of O 2 as the oxidant gas, it can be seen that the titanium uniformity of the BST thin film is greatly improved, and that the composition ratio of the BST thin film is also improved. Rather, the amount of C in the BST thin film is greatly increased. When a large amount of C is included in the BST thin film, not only the dielectric properties but also the leakage current characteristics of the BST thin film are degraded. Therefore, it is necessary to remove impurities in the BST thin film through a subsequent thermal process.

도 3a 및 3b는 산화질소 가를 사용한 BST 박막의 열처리 전후 오제(Auger) 프로파일을 설명하기 위해 도시한 그래프로서, 도 3a는 비정질 BST 박막을 증착하고 UV/O3열처리를 실시하기 전 오제 프로파일에 대한 그래프이고, 도 3b는 UV/O3열처리 후 오제 프로파일에 대한 그래프이다.3A and 3B are graphs illustrating the Auger profile before and after heat treatment of a BST thin film using nitric oxide value. FIG. 3A is a graph showing the Auger profile before depositing an amorphous BST thin film and performing UV / O 3 heat treatment. 3B is a graph for Auger profiles after UV / O 3 heat treatment.

도 3a에 도시된 것과 같이, 비정질 BST 박막 내에는 유기 소오스에 기인하는 불순물 C가 약 10% 함유되어 있는데, 열처리를 실시한 후 BST 박막 내의 C가 대부분 제거되었음을 알 수 있다.As shown in FIG. 3A, the amorphous BST thin film contains about 10% of impurity C attributable to the organic source. After the heat treatment, most of the C in the BST thin film is removed.

상술한 바와 같이, 본 발명은 BST 박막 형성시 N2O 가스를 산화제로 사용하므로써, 웨이퍼 내 티타늄의 균일성 및 BST 박막의 조성비를 개선할 수 있다. 또한, N2O 가스를 산화제로 하여 BST 박막을 형성한 후 UV/O3 열처리를 실시하여 BST 박막 내 유기 불순물을 제거하므로써 BST 박막의 막질을 개선할 수 있다. 이에 따라 BST 박막의 유전특성 및 캐패시터의 누설전류 특성을 향상시킬 수 있고, 이에따라 BST 캐패시터의 유효 산화막 두께를 최소화할 수 있어 캐패시터의 정전용량을 충분히 확보할 수 있는 효과가 있다.As described above, the present invention can improve the uniformity of titanium in the wafer and the composition ratio of the BST thin film by using N2O gas as the oxidant when forming the BST thin film. In addition, the film quality of the BST thin film can be improved by removing the organic impurities in the BST thin film by performing UV / O3 heat treatment after forming the BST thin film using the N 2 O gas as the oxidizing agent. Accordingly, the dielectric characteristics of the BST thin film and the leakage current characteristics of the capacitor can be improved, and accordingly, the effective oxide film thickness of the BST capacitor can be minimized, thereby sufficiently securing the capacitance of the capacitor.

Claims (9)

하부구조가 형성된 기판 상에 하부전극을 형성하는 단계;Forming a lower electrode on the substrate on which the lower structure is formed; 상기 하부전극 상에 N2O 가스를 산화제로 이용한 화학기상증착법으로 BST를 증착하고, 이로 인하여 유전체막이 형성되는 단계;Depositing BST on the lower electrode by chemical vapor deposition using an N 2 O gas as an oxidant, thereby forming a dielectric film; 상기 BST 박막 증착 후 저온 열처리 공정 및 고온 열처리 공정을 순차적으로 실시하는 단계; 및Sequentially depositing the BST thin film and then performing a low temperature heat treatment process and a high temperature heat treatment process; And 상기 유전체막 상에 상부전극을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.And forming an upper electrode on the dielectric film. 제 1 항에 있어서,The method of claim 1, 상기 하부전극은 플래티늄, 루테늄, 이리디움 중 어느 하나를 이용하여 형성하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.The lower electrode is a capacitor manufacturing method of a semiconductor device, characterized in that formed using any one of platinum, ruthenium, iridium. 제 1 항에 있어서,The method of claim 1, 상기 유전체막은 400 내지 420℃의 온도 조건 및 1 내지 2Torr의 압력 조건에서 BST를 200 내지 300Å의 두께로 증착하여 형성하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.The dielectric film is a capacitor manufacturing method of a semiconductor device, characterized in that formed by depositing a BST to a thickness of 200 to 300 kPa under a temperature condition of 400 to 420 ℃ and a pressure condition of 1 to 2 Torr. 제 1 항에 있어서.The method of claim 1. 상기 N2O의 유량은 300 내지 1000sccm으로 하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.The flow rate of the N 2 O is a capacitor manufacturing method of the semiconductor device, characterized in that 300 to 1000sccm. 제 1 항에 있어서,The method of claim 1, 상기 BST 박막의 조성은 Ba : Sr : Ti = 0.5 : 0.5: 1이 되도록 하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.The composition of the BST thin film is Ba: Sr: Ti = 0.5: 0.5: 1 Capacitor manufacturing method for a semiconductor device, characterized in that the. 제 1 항에 있어서,The method of claim 1, 상기 저온 열처리 공정은 300 내지 450℃의 온도에서 120 내지 125mW/㎠의 전력을 공급하여 실시하는 UV/O3열처리 공정인 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.The low temperature heat treatment process is a capacitor manufacturing method of a semiconductor device, characterized in that the UV / O 3 heat treatment process performed by supplying power of 120 to 125mW / ㎠ at a temperature of 300 to 450 ℃. 제 6 항에 있어서,The method of claim 6, 상기 UV/O3열처리 공정시 O3의 농도는 20 내지 25mg/Nm인 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.The concentration of O 3 in the UV / O 3 heat treatment process is a capacitor manufacturing method of a semiconductor device, characterized in that 20 to 25mg / Nm. 제 6 항에 있어서,The method of claim 6, 상기 UV/O3열처리 공정은 10 내지 30분 동안 실시하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.The UV / O 3 heat treatment process is a capacitor manufacturing method of a semiconductor device, characterized in that performed for 10 to 30 minutes. 제 1 항에 있어서,The method of claim 1, 상기 고온 열처리 공정은 600 내지 700℃에서 급속 열처리(RTP) 공정으로 진행하는 것을 특징으로 하는 반도체 소자의 캐패시터 제조방법.The high temperature heat treatment process is a capacitor manufacturing method of a semiconductor device, characterized in that the rapid heat treatment (RTP) process at 600 to 700 ℃.
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