KR20010002825A - Circuit for protecting power switch - Google Patents
Circuit for protecting power switch Download PDFInfo
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- KR20010002825A KR20010002825A KR1019990022843A KR19990022843A KR20010002825A KR 20010002825 A KR20010002825 A KR 20010002825A KR 1019990022843 A KR1019990022843 A KR 1019990022843A KR 19990022843 A KR19990022843 A KR 19990022843A KR 20010002825 A KR20010002825 A KR 20010002825A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/20—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
- H02H7/205—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment for controlled semi-conductors which are not included in a specific circuit arrangement
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Conversion In General (AREA)
Abstract
Description
본 발명은 전력변환장치에 구비되는 전력스위칭소자에 관한 것으로, 보다 상세하게는 전력스위칭소자에 과전류가 흐를 때 일정시간 상기 전력스위칭소자를 차단시켜 과전류로부터 소자를 보호하는 전력스위칭소자 보호회로에 관한 것이다.The present invention relates to a power switching device provided in a power conversion device, and more particularly, to a power switching device protection circuit that protects a device from over current by blocking the power switching device for a predetermined time when an over current flows in the power switching device. will be.
점차적으로, 공장자동화, 사무자동화등과 같은 자동화에 있어서, 전력제어는 실제적인 움직임을 제어하데 쓰이는 것으로서, 구동기구의 전력을 제어하여 그 움직임을 제어한다.Increasingly, in automation such as factory automation, office automation, etc., power control is used to control actual movement, and controls the movement of the drive mechanism by controlling the power of the drive mechanism.
이때, 전력제어를 위한 소자로서, 전력스위칭소자, 예를 들어, 다이리스터, 트라이액등이 실용화되어 있고, 최근들어, 인버터회로에서는 IGBT소자가 많이 이용되고 있다.At this time, a power switching device, for example, a thyristor, a triac, or the like has been put into practical use as a device for power control, and in recent years, many IGBT devices have been used in inverter circuits.
이러한 전력제어장치에서 스위칭소자는 가장 중요한 구성요소이기 때문에, 상기 스위칭소자에 과전류가 흘러, 소자가 고장나거나 파괴되는 것을 막기 위하여 과전류보호회로를 더 구비하고 있다.Since the switching element is the most important component in such a power control device, an overcurrent protection circuit is further provided to prevent an overcurrent from flowing through the switching element and causing the element to fail or be destroyed.
도 1은 종래의 과전류 보호회로가 적용되어 있는 전력스위칭소자를 온/오프구동시키는 게이트구동회로의 일실시예를 도시한 것으로, 외부 제어기(도시생략)로부터 인가되는 제어신호(Sg)가 하이레벨일 때, NPN트랜지스터(Q2)가 턴온되어, 전력스위칭소자(Q1)의 게이트에 게이트저항(Rg)를 통해 보조전원(Vcc)이 인가된다. 이에, 전력스위칭소자(Q1)가 턴온되고, 반대로, 제어신호(Sg)가 로우레벨일 때는, PNP트랜지스터(Q3)가 턴온되어 상기 전력스위칭소자(Q1)의 게이트가 게이트저항(Rg)을 통해 접지되면서 전력스위칭소자(Q1)은 턴오프된다. 즉, 과전류가 흐르지 않는 정상상태에서 상기 제어신호(Sg)에 대한 전력스위칭소자(Q1)의 콜렉터-이미터전압(VCE)과 콜렉터전류(iC) 및 게이트전압(Vg)은 도 2에 도시된 T1구간에서와 같이 변화한다.FIG. 1 illustrates an embodiment of a gate driving circuit for driving a power switching device to which a conventional overcurrent protection circuit is applied, on / off, wherein a control signal Sg applied from an external controller (not shown) is high level. In this case, the NPN transistor Q2 is turned on, and the auxiliary power source Vcc is applied to the gate of the power switching element Q1 through the gate resistor Rg. Accordingly, when the power switching device Q1 is turned on, on the contrary, when the control signal Sg is at the low level, the PNP transistor Q3 is turned on so that the gate of the power switching device Q1 passes through the gate resistor Rg. The power switching device Q1 is turned off while being grounded. That is, the collector-emitter voltage V CE , the collector current i C , and the gate voltage Vg of the power switching element Q1 with respect to the control signal Sg in the normal state where no overcurrent flows are shown in FIG. 2. It changes as in the illustrated T1 section.
그리고, 이때, PNP트랜지스터(Q2)가 턴온될 때, 정상상태에서는 NPN트랜지스터(Q4)가 턴온되고, 이는 NPN트랜지스터(Q5)를 턴오프시켜, 과전류검출신호(f0)는 하이레벨이 된다.At this time, when the PNP transistor Q2 is turned on, in the normal state, the NPN transistor Q4 is turned on, which turns off the NPN transistor Q5 so that the overcurrent detection signal f 0 becomes a high level.
상기 도 1의 회로에서 콘덴서(C1)가 없다고 가정하고, 전력스위칭소자(Q1)에 과전류가 흘러, 콜렉터-이미터전압(VCE)이 T2구간에 도시된 바와 같이, 포화되어 기준값(A)이상이 되면, 제너다이오드(ZD1)가 온되고, 이에 NPN트랜지스터(Q6)가 턴온되어 턴온상태의 전력스위칭소자(Q1)를 턴오프시킨다. 그런데, 이와 동시에, NPN트랜지스터(Q4)가 오프되고, 그에 연결된 NPN트랜지스터(Q5)가 온되어 과전류검출신호(f0)단의 전위가 제로로 되므로, 그 순간 다시 NPN트랜지스터(Q6)가 오프되어, 도 2의 T2구간에 도시된 바와 같이, 과전류흐름이 순간적으로 반복된다. 이렇게 되면 전력스위칭소자(Q1)가 보호될 수 없으므로, 상기 콘덴서(C1)를 부가하여, 스위칭소자 차단용 NPN트랜지스터(Q6)의 온타임을 증가시켰다.Assuming that there is no condenser C1 in the circuit of FIG. 1, an overcurrent flows through the power switching element Q1 so that the collector-emitter voltage V CE is saturated, as shown in the T2 section, and the reference value A When abnormal, the zener diode ZD1 is turned on, and the NPN transistor Q6 is turned on to turn off the power switching element Q1 in the turned-on state. At the same time, the NPN transistor Q4 is turned off and the NPN transistor Q5 connected thereto is turned on so that the potential of the overcurrent detection signal f 0 becomes zero, and the NPN transistor Q6 is turned off again at that moment. 2, the overcurrent flow is instantaneously repeated. In this case, since the power switching element Q1 cannot be protected, the capacitor C1 is added to increase the on-time of the NPN transistor Q6 for switching off the switching element.
그러나, 이때는 상기 제너다이오드(ZD1)가 온된 후, 상기 콘덴서(C1)의 충전시간으로 인하여, NPN트랜지스터(Q6)가 턴온되는 시간이 지연되고, 결국 전력스위칭소자의 차단이 과전류발생 즉시 이루어지지 않고 소정 시간 지속된 후 이루어짐으로 스위칭소자가 파괴될 수 있다는 문제점이 있다.However, at this time, after the zener diode ZD1 is turned on, due to the charging time of the capacitor C1, the time for turning on the NPN transistor Q6 is delayed, so that the switching of the power switching device is not immediately performed when an overcurrent occurs. There is a problem that the switching element can be destroyed by being made after a predetermined time.
상기 도 2의 T3구간에서 빗금친 영역은, 종래 회로에 구비된 콘덴서(C1)에 의해서 딜레이되는 시간을 나타낸다.The region hatched in the section T3 of FIG. 2 represents the time delayed by the capacitor C1 provided in the conventional circuit.
본 발명은 상술한 종래의 문제점을 해결하기 위하여 안출된 것으로서, 그 목적은 전력변환장치의 구성요소인 스위칭소자에 과전류가 흐르면 이를 감지하여 해당 스위칭소자를 소정 시간 차단시켜 적절한 조치가 행해질 수 있도록 하는 전력스위칭소자 보호회로를 제공하는 것이다.SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an object thereof is to detect an overcurrent flowing in a switching element which is a component of a power converter, and to cut off the switching element for a predetermined time so that appropriate measures can be performed. It is to provide a power switching device protection circuit.
도 1은 종래의 과전류로부터 전력스위칭소자를 보호하는 방식이 적용된 게이트구동회로를 도시한 회로구성도이다.1 is a circuit diagram illustrating a gate driving circuit to which a method of protecting a power switching device from a conventional overcurrent is applied.
도 2는 도 1에 도시한 게이트구동회로의 동작파형도이다.FIG. 2 is an operational waveform diagram of the gate driving circuit shown in FIG. 1.
도 3은 본 발명에 따른 전력스위칭소자 보호회로가 적용된 게이트구동회로의 회로구성도이다.3 is a circuit diagram illustrating a gate driving circuit to which the power switching device protection circuit according to the present invention is applied.
도 4는 도 3에 도시한 게이트구동회로의 동작파형도이다.FIG. 4 is an operation waveform diagram of the gate driving circuit shown in FIG. 3.
*도면의 주요 부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *
Q1 : 전력스위칭소자(IGBT) Q2~Q7 : 스위칭트랜지스터Q1: Power Switching Device (IGBT) Q2 ~ Q7: Switching Transistor
P-N : 주전원 Vcc : 보조전원P-N: Main Power Vcc: Auxiliary Power
ZD1 : 제너다이오드 D1 : 스위칭다이오드ZD1: Zener Diode D1: Switching Diode
R1~R5, Rg : 저항 C1 : 콘덴서R1 ~ R5, Rg: Resistor C1: Capacitor
상술한 본 발명의 목적을 달성하기 위한 구성 수단으로서, 본 발명은 주전원을 온/오프스위칭하는 전력스위칭소자와 상기 전력스위칭소자의 게이트전압을 하이/로우레벨로 조정하여 스위칭제어하는 게이트구동회로에 구비되는 상기 전력스위칭소자 보호회로에 있어서,As a construction means for achieving the object of the present invention described above, the present invention provides a power switching device for switching on and off the main power source and a gate drive circuit for controlling switching by adjusting the gate voltage of the power switching device to a high / low level In the power switching device protection circuit provided,
상기 전력스위칭소자의 게이트전압이 하이레벨일때 턴온되는 이미터접지된 제1스위칭트랜지스터와,An emitter-grounded first switching transistor that is turned on when the gate voltage of the power switching element is high level;
상기 제1스위칭트랜지스터의 턴온시 턴온동작하며 그 콜렉터가 저항을 통해 보조전원(Vcc)에 연결됨과 동시에 과전류검출신호출력단(f0)에 연결되는 이미터접지된 제2스위칭트랜지스터와,An emitter-grounded second switching transistor which is turned on when the first switching transistor is turned on and whose collector is connected to the auxiliary power supply (Vcc) through a resistor and connected to an overcurrent detection signal output terminal (f 0 );
상기 제2스위칭트랜지스터의 콜렉터에 양극이 상기 전력스위칭소자의 콜렉터에 음극이 연결되는 스위칭다이오드와,A switching diode having a cathode connected to the collector of the second switching transistor and a cathode connected to the collector of the power switching device;
상기 스위칭다이오드의 양극에 그 음극이 연결되고 양극은 저항을 통해 접지되는 제너다이오드와,A zener diode whose cathode is connected to the anode of the switching diode and whose anode is grounded through a resistor;
상기 제너다이오드의 양극에 그 베이스가 연결되며 이미터는 저항을 통해 보조전원에 연결되고 콜렉터는 접지되는 제3스위칭소자와,A third switching element whose base is connected to the anode of the zener diode, the emitter is connected to the auxiliary power supply through a resistor, and the collector is grounded;
상기 제3스위칭소자의 이미터에 그 베이스가 연결되며 상기 전력스위치소자의 게이트와 접지사이에 직렬로 연결되는 제4스위칭소자와,A fourth switching device having a base connected to the emitter of the third switching device and connected in series between the gate and the ground of the power switch device;
상기 제4스위칭소자의 베이스와 접지사이에 구비되는 콘덴서로 이루어짐을 특징으로 한다.Characterized in that the capacitor is provided between the base and the ground of the fourth switching element.
이하, 첨부한 도면을 참조하여 본 발명의 구성 및 작용을 상세하게 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the configuration and operation of the present invention.
도 3은 본 발명에 의한 과전류 보호회로가 적용된 게이트구동회로를 도시한 회로도로서, 보조전원과 접지단사이에 직렬로 NPN트랜지스터(Q2)와 PNP트랜지스터(Q3)를 연결하고, 상기 NPN트랜지스터(Q2)와 PNP트랜지스터(Q3)의 베이스에 제어신호(Sg)가 인가되도록 연결하고, 상기 NPN트랜지스터(Q2)와 PNP트랜지스터(Q3)의 이미터접점을 주전원라인(P-N)에 직렬로 연결된 전력스위칭소자(Q1)의 게이트에 게이트저항(Rg)을 통해 연결함과 동시에, 저항(R3)을 통해 NPN트랜지스터(Q4)의 베이스에 연결하고, 상기 NPN트랜지스터(Q4)의 콜렉터에 NPN트랜지스터(Q5)의 베이스를 연결하고, 상기 NPN트랜지스터(Q4)(Q5)의 콜렉터는 각각 저항(R1)(R2)을 통해 보조전원(Vcc)단에 연결하고 이미터는 접지에 연결하며, 상기 NPN트랜지스터(Q5)의 콜렉터를 제너다이오드(ZD1)의 애노드에 연결함과 동시에 과전류검출신호(f0)단에 연결하면서, 다이오드(D1)를 통해 전력스위칭소자(Q1)의 콜렉터에 연결하고, 상기 제너다이오드(ZD1)의 캐소드는 저항(R4)을 통해 접지함과 동시에 NPN트랜지스터(Q6)의 베이스에 연결하고, 상기 NPN트랜지스터(Q6)의 콜렉터는 저항(R5)을 통해 보조전원(Vcc)단에 연결함과 동시에 PNP트랜지스터(Q7)의 베이스에 연결하며 그 이미터는 접지시키고, 상기 PNP트랜지스터(Q7)의 베이스와 접지사이에 콘덴서(C1)를 연결하고, 그 이미터는 접지시키고, 콜렉터는 상기 NPN트랜지스터(Q2) 및 PNP트랜지스터(Q3)의 이미터접점에 연결하여 구성한다.3 is a circuit diagram illustrating a gate driving circuit to which an overcurrent protection circuit according to the present invention is applied, in which an NPN transistor Q2 and a PNP transistor Q3 are connected in series between an auxiliary power supply and a ground terminal, and the NPN transistor Q2. ) And a power switching device connected to the base of the PNP transistor Q3 so that the control signal Sg is applied, and the emitter contact of the NPN transistor Q2 and the PNP transistor Q3 is connected in series with the main power line PN. The gate of (Q1) is connected to the gate of the NPN transistor (Q4) through the gate resistor (Rg), at the same time through the resistor (R3), and the collector of the NPN transistor (Q4) of the NPN transistor (Q5) A base is connected, and the collectors of the NPN transistors Q4 and Q5 are connected to the auxiliary power supply Vcc terminal through the resistors R1 and R2, respectively, and the emitter is connected to the ground, and the NPN transistors Q5 Same as connecting the collector to the anode of the Zener diode (ZD1). Via a diode (D1) and connected to the overcurrent detection signal (f 0) stage coupled to the collector of the power switching device (Q1) on, and the cathode of the zener diode (ZD1) is at the same time as the ground via a resistor (R4) The NPN transistor Q6 is connected to the base, and the collector of the NPN transistor Q6 is connected to the auxiliary power supply Vcc terminal through a resistor R5 and simultaneously to the base of the PNP transistor Q7. Ground, connect the capacitor (C1) between the base and ground of the PNP transistor (Q7), the emitter is grounded, the collector is connected to the emitter contact of the NPN transistor (Q2) and PNP transistor (Q3) Configure.
도 4는 상기 도 3에 도시된 회로의 동작파형도로서, Sg는 외부 제어기(도시생략)로부터 입력되는 제어신호로서, 예를 들어, PWM신호이고, VCE는 상기 전력스위칭소자(Q1)의 콜렉터-이미터간에 걸리는 전압이고, iC는 전력스위칭소자(Q1)의 콜렉터전류이고, f0는 상기 전력스위칭소자(Q1)에 과전류가 흐르는 지를 나타내는 과전류검출신호이고, Va는 상기 콘덴서(C1)에 걸리는 전압을 나타내고, Vg는 상기 전력스위칭소자(Q1)의 게이트전압을 나타낸다.FIG. 4 is an operation waveform diagram of the circuit shown in FIG. 3, where Sg is a control signal input from an external controller (not shown), for example, a PWM signal, and V CE is a value of the power switching element Q1. Is the voltage across the collector-emitter, i C is the collector current of the power switching element Q1, f 0 is the overcurrent detection signal indicating whether overcurrent flows to the power switching element Q1, and V a is the capacitor ( The voltage across C1) is shown, and V g represents the gate voltage of the power switching element Q1.
상술한 회로의 동작을 상기 도 4에 보인 파형도를 참조하여 상세하게 설명한다.The operation of the above-described circuit will be described in detail with reference to the waveform diagram shown in FIG.
먼저, 전력스위칭소자(Q1)에 기준치이하로 전류가 흐르는 정상상태인 T1구간에서는, 제어신호(Sg)가 하이레벨일 때, NPN트랜지스터(Q2)가 턴온동작하여 게이트저항(Rg)을 통해 전력스위칭소자(Q1)의 게이트에 소정 전압(Vg)을 인가하고, 이에 전력스위칭소자(Q1)가 턴온되어 그 콜렉터-이미터전압(VCE)은 제로에 가깝게 떨어진다. 이때, 상기 턴온된 NPN트랜지스터(Q2)는 NPN트랜지스터(Q4)를 턴온시켜, 온상태의 NPN트랜지스터(Q5)의 베이스를 접지시키고, 이에 해당 NPN트랜지스터(Q5)는 턴오프된다. 따라서, 상기 과전류검출신호(f0)는 하이레벨이 된다.First, in the T1 section in which the current flows below the reference value in the power switching element Q1 in the normal state, when the control signal Sg is at the high level, the NPN transistor Q2 is turned on to operate the power through the gate resistor Rg. A predetermined voltage Vg is applied to the gate of the switching element Q1, and the power switching element Q1 is turned on so that the collector-emitter voltage V CE drops to near zero. At this time, the turned-on NPN transistor Q2 turns on the NPN transistor Q4 to ground the base of the on-state NPN transistor Q5, and the corresponding NPN transistor Q5 is turned off. Therefore, the overcurrent detection signal f 0 is at a high level.
그리고, 상기 제어신호(Sg)가 로우레벨일 경우, PNP트랜지스터(Q3)가 턴온되면서 전력스위칭소자(Q1)의 게이트를 접지시켜 상기 스위칭소자(Q1)를 턴오프시키고, 이때, NPN트랜지스터(Q4)도 턴오프되면서 NPN트랜지스터(Q5)를 턴온시킨다. 따라서, 과전류검출신호(f0)는 로우레벨이 된다. 그리고, 이와 같은 정상상태에서는 제너다이오드(ZD1)가 턴오프상태로 되어, NPN트랜지스터(Q6)가 턴오프되고, 이에 보조전원(Vcc)이 저항(R5)을 통해 콘덴서(C1)로 인가된다. 따라서, 정상상태에서 상기 콘덴서(C1)은 충전상태를 유지한다.When the control signal Sg is at the low level, the PNP transistor Q3 is turned on and the gate of the power switching device Q1 is grounded to turn off the switching device Q1, and at this time, the NPN transistor Q4. ) Also turns off the NPN transistor Q5. Therefore, the overcurrent detection signal f 0 goes low. In this steady state, the zener diode ZD1 is turned off, the NPN transistor Q6 is turned off, and the auxiliary power supply Vcc is applied to the capacitor C1 through the resistor R5. Therefore, in the normal state, the capacitor C1 maintains the charged state.
그런데, T2구간에서와 같이, 하이레벨의 제어신호(Sg)에 의해 도통상태가 된 전력스위칭소자(Q1)에 과전류가 흘러, 콜렉터-이미터전압(VCE)이 기준레벨(A)이상으로 포화상태가 되면, 제너다이오드(ZD1)가 턴온되어 NPN트랜지스터(Q6)를 턴온시키고, 상기 턴온된 NPN트랜지스터(Q6)를 통해 베이스가 접지에 연결되어 PNP트랜지스터(Q7)를 턴온시킨다.However, as in the T2 section, overcurrent flows to the power switching element Q1 which is in the conduction state by the high-level control signal Sg, so that the collector-emitter voltage V CE exceeds the reference level A. When the saturation state is reached, the zener diode ZD1 is turned on to turn on the NPN transistor Q6, and the base is connected to ground through the turned-on NPN transistor Q6 to turn on the PNP transistor Q7.
그 결과, 상기 턴온된 PNP트랜지스터(Q7)를 통해 상기 전력스위칭소자(Q1)의 게이트로 흐르는 전류가 그라운드로 바이패스되면서, 상기 전력스위칭소자(Q1)는 턴오프상태가 된다. 즉, 이때, 전력스위칭소자(Q1)의 게이트전압(Vg)은 로우레벨("0")이 된다.As a result, the current flowing to the gate of the power switching device Q1 through the turned-on PNP transistor Q7 is bypassed to ground, and the power switching device Q1 is turned off. That is, at this time, the gate voltage Vg of the power switching element Q1 becomes the low level ("0").
그리고, 상기 시점에서 전압(Va)은 '0'으로 떨어지고, 상기 전력스위칭소자(Q1)의 게이트전압(Vg)이 영전위로 될때, NPN트랜지스터(Q4)가 턴오프되고, NPN트랜지스터(Q5)가 턴온되어, 제너다이오드(ZD1)와 NPN트랜지스터(Q6)를 턴오프시키고, 그 결과, PNP트랜지스터(Q7)가 턴온되어 다시 전력스위칭소자(Q1)을 턴온시키려 한다.At this point, when the voltage Va drops to '0' and the gate voltage Vg of the power switching element Q1 becomes zero, the NPN transistor Q4 is turned off and the NPN transistor Q5 is turned off. It is turned on to turn off the zener diode ZD1 and the NPN transistor Q6. As a result, the PNP transistor Q7 is turned on to turn on the power switching element Q1 again.
그런데, 이와같이, 상기 PNP트랜지스터(Q7)가 오프되어 전력스위칭소자의 게이트전압(Vg)을 상승시키려 할 때, 상기 게이트전압(Vg)이 PNP트랜지스터(Q7)를 통해 방전상태인 콘덴서(C1)를 충전하여야 하므로, 상기 콘덴서(C1)와 PNP트랜지스터(Q7)접점에서의 전압(Va)은 도 4에 도시한 바와 같이, 상기 제너다이오드(ZD1)가 턴온되는 시점에서 제로로 떨어졌다가 상기 게이트전압(Vg)이 인가됨에 따라 점차적으로 전압이 상승하게 된다.However, when the PNP transistor Q7 is turned off to raise the gate voltage Vg of the power switching device, the gate voltage Vg is discharged through the PNP transistor Q7. As it is necessary to charge, the voltage Va at the contact point of the capacitor C1 and the PNP transistor Q7 drops to zero when the zener diode ZD1 is turned on, as shown in FIG. As (Vg) is applied, the voltage gradually increases.
상기 콘덴서(C1)가 완전히 충전되기 전까지 상기 전력스위칭소자(Q1)는 턴오프상태를 유지한다. 그리고, 상기 전력스위칭소자(Q1)가 턴오프되어 있는 시간은 상기 콘덴서(C1)의 용량에 비례하게 된다.The power switching device Q1 remains turned off until the capacitor C1 is fully charged. The time at which the power switching device Q1 is turned off is proportional to the capacitance of the capacitor C1.
여기에서, 상기 콘덴서(C1)는 보조전원(Vcc)을 통해서도 충전될 수 있으나, 이는 상기 콘덴서(C1)와 보조전원(Vcc)단 사이에 연결된 저항(R5)의 저항치를 조정함으로서 제어할 수 있다.Here, the capacitor C1 may also be charged through the auxiliary power supply Vcc, but this may be controlled by adjusting the resistance value of the resistor R5 connected between the capacitor C1 and the auxiliary power supply Vcc terminal. .
그리고, 상기와 같이 콘덴서(C1)의 충전에 의한 전력스위칭소자(Q1)가 턴오프상태를 유지하는 시간은 외부제어기(도시생략)에서 상기 과전류검출신호(f0)를 인가받아, 과전류 인가 상태인지를 판단하여, 적절한 조치를 취할 수 있는 시간이 된다.As described above, the time when the power switching device Q1 maintains the turn-off state by charging the capacitor C1 is supplied with the overcurrent detection signal f 0 from an external controller (not shown), and the overcurrent application state is performed. It is time to determine the awareness and take appropriate action.
상술한 바와 같이, 본 발명에 의한 과전류보호회로를 적용하면, 전력변환용 스위칭소자에 과전류가 흐를 때, 해당 스위칭소자를 턴오프시키고 이 상태를 소정 시간 지속시켜, 제품의 안정성을 높이고, 소자를 보호한 상태에서 외부 장치가 과전류 상태를 검출하고, 그에 따라 적절한 조치를 취할 수 있도록 하는 우수한 효과가 있는 것이다.As described above, when the overcurrent protection circuit according to the present invention is applied, when an overcurrent flows in the switching element for power conversion, the switching element is turned off and the state is maintained for a predetermined time, thereby increasing the stability of the product and In the protected state, the external device can detect the overcurrent condition and take appropriate action accordingly.
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| Application Number | Priority Date | Filing Date | Title |
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| KR1019990022843A KR20010002825A (en) | 1999-06-18 | 1999-06-18 | Circuit for protecting power switch |
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| KR1019990022843A KR20010002825A (en) | 1999-06-18 | 1999-06-18 | Circuit for protecting power switch |
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| KR20210025831A (en) * | 2019-08-28 | 2021-03-10 | 한국전기연구원 | Short protection circuit for power switch |
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| KR20210025831A (en) * | 2019-08-28 | 2021-03-10 | 한국전기연구원 | Short protection circuit for power switch |
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