KR20000044608A - Method for forming platinum film for capacitor electrode of semiconductor element - Google Patents
Method for forming platinum film for capacitor electrode of semiconductor element Download PDFInfo
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- KR20000044608A KR20000044608A KR1019980061107A KR19980061107A KR20000044608A KR 20000044608 A KR20000044608 A KR 20000044608A KR 1019980061107 A KR1019980061107 A KR 1019980061107A KR 19980061107 A KR19980061107 A KR 19980061107A KR 20000044608 A KR20000044608 A KR 20000044608A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/65—Electrodes comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
Abstract
Description
본 발명은 반도체 기술에 관한 것으로, 특히 반도체 소자의 캐패시터 전극용 백금(Pt)막 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor technology, and more particularly, to a method of forming a platinum (Pt) film for a capacitor electrode of a semiconductor device.
DRAM(Dynamic Random Access Memory)을 비롯한 반도체 소자의 고집적화에 따라 캐패시터의 충분한 정전용량을 확보하는 것이 큰 문제로 부각되었으며, 이를 해결하는 하나의 방안으로서 캐패시터의 하부 전극인 전하저장 전극의 표면적을 증가시키는 기술에 대한 많은 연구·개발이 진행되어 왔다. 그러나, 역시 고집적화에 수반되는 공정 마진의 저하 때문에 전하저장 전극의 표면적을 증가시키는데는 한계가 있다.With high integration of semiconductor devices including DRAM (Dynamic Random Access Memory), securing a sufficient capacitance of a capacitor has emerged as a big problem. As a solution to this problem, the surface area of the charge storage electrode, which is the lower electrode of the capacitor, is increased. Many researches and developments on technology have been conducted. However, there is also a limit to increase the surface area of the charge storage electrode due to the decrease in the process margin associated with high integration.
이러한 한계를 극복하기 위하여 초고집적 DRAM에는 고유전체인 BST 등의 고유전 물질을 캐패시터 유전막으로 사용하는 고유전체 캐패시터를 적용하고 있다. 이는 캐패시터의 정전용량이 유전율에 비례하는 원리를 적용한 것이다.In order to overcome this limitation, high-density DRAMs have been applied to high-density DRAMs using high-k dielectric materials such as BST, which are high-k dielectrics, as capacitor dielectric layers. This applies the principle that the capacitance of the capacitor is proportional to the permittivity.
한편, 차세대 비휘발성 메모리 소자로서 각광 받고 있는 강유전체 메모리 소자(FeRAM)에서는 캐패시터를 구성하는 유전물질로서 SrBi2Ta2O9(SBT), Pb(ZrxTi1-x)O3(PZT) 등의 강유전 물질이 사용되고 있다.On the other hand, ferroelectric memory devices (FeRAM), which are in the spotlight as the next generation of nonvolatile memory devices, include SrBi 2 Ta 2 O 9 (SBT) and Pb (Zr x Ti 1-x ) O 3 (PZT) as dielectric materials constituting a capacitor. Ferroelectric materials are used.
이와 같이 고유전체 캐패시터 또는 강유전체 캐패시터를 제조함에 있어서, 우수한 유전체 박막 특성을 확보하기 위해서는 상·하부 전극 및 그 주변 물질의 선택과 적절한 공정의 제어가 필수적이다.As described above, in manufacturing a high dielectric capacitor or a ferroelectric capacitor, in order to secure excellent dielectric thin film characteristics, selection of upper and lower electrodes and surrounding materials and control of an appropriate process are essential.
현재, 고유전체 캐패시터 또는 강유전체 캐패시터의 상·하부 전극 재료로서 전극 특성이 우수한 백금(Pt)을 주로 사용하고 있다. 백금막은 산소와의 반응성이 거의 없어 옥사이드계 유전체와 접합에서 옥사이드 화합물을 형성하지 않고, 또한 유전체 특성을 향상시키기 위해 행해지는 산소 분위기에서의 고온 열공정 등에 대해서도 우수한 화학적 안정성을 가지고 있다.Currently, platinum (Pt) having excellent electrode characteristics is mainly used as the upper and lower electrode materials of high dielectric capacitors or ferroelectric capacitors. The platinum film has little reactivity with oxygen and thus does not form an oxide compound at the junction with the oxide-based dielectric, and also has excellent chemical stability against high temperature thermal processes in an oxygen atmosphere which is performed to improve dielectric properties.
그러나, 고유전체 캐패시터 또는 강유전체 캐패시터 형성 공정의 특성상 여러 차례의 고온 공정을 거치게 되는데, 이러한 여러 차례의 고온 공정을 거치면서 백금(Pt) 원자들의 고온에서의 높은 운동성에 의해 결정립계가 크게 성장하여 백금막의 표면이 거칠어지며, 열공정 후 냉각시 백금막의 열팽창 계수가 유전체보다 크기 때문에 백금막이 크게 수축하면서 백금막에 부분적으로 미세한 홀(hole)이 발생하게 된다.However, due to the characteristics of the high dielectric capacitor or the ferroelectric capacitor forming process, a plurality of high temperature processes are performed. During this high temperature process, the grain boundary grows greatly due to high motility at high temperature of platinum (Pt) atoms. As the surface becomes rough and the thermal expansion coefficient of the platinum film is greater than that of the dielectric material during cooling after the thermal process, the platinum film is greatly contracted, so that a minute hole is formed in the platinum film.
이와 같은 백금막의 물리적 특성 열화는 곧 전기적 특성의 열화로 이어져 궁극적으로 소자 특성을 저하시키고, 반도체 소자 제조 공정의 난이도를 증가시키는 문제점이 있었다.Such deterioration of the physical properties of the platinum film leads to deterioration of the electrical properties, which ultimately degrades the device properties and increases the difficulty of the semiconductor device manufacturing process.
첨부된 도면 도 1은 종래기술에 따라 형성된 강유전체 캐패시터의 단면을 도시한 것으로, 백금막(12a, 12b)의 거친 표면(A)과 미세 홀(B)이 유발된 상태를 나타내고 있다. 미설명 도면 부호 '10'은 층간절연 산화막, '11'은 접착층인 TiO2막, '13'은 강유전체 박막을 각각 나타낸다.1 is a cross-sectional view of a ferroelectric capacitor formed according to the prior art, and shows a state in which rough surfaces A and fine holes B of platinum films 12a and 12b are caused. Reference numeral '10' denotes an interlayer insulating oxide film, '11' denotes a TiO 2 film as an adhesive layer, and '13' denotes a ferroelectric thin film.
본 발명은 표면 거칠음의 증가, 미세 홀 형성 등과 같이 고온 공정에 의해 야기되는 백금막의 물리적 특성 열화를 방지할 수 있는 반도체 소자의 캐패시터 전극용 백금막 형성방법을 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a platinum film for a capacitor electrode of a semiconductor device, which can prevent deterioration of physical properties of the platinum film caused by a high temperature process such as an increase in surface roughness and formation of fine holes.
도 1은 종래기술에 따라 형성된 강유전체 캐패시터의 단면도.1 is a cross-sectional view of a ferroelectric capacitor formed in accordance with the prior art.
도 2a 내지 도 2c는 본 발명의 일 실시예에 따른 강유전체 캐패시터 제조 공정도.2A to 2C are ferroelectric capacitor manufacturing process diagrams according to an embodiment of the present invention.
* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
20 : 층간절연 산화막20: interlayer insulating oxide film
21 : Ti막21: Ti film
22 : 하부 전극용 백금막22: platinum film for the lower electrode
23 : 백금막 내에 침입형으로 고용된 산소23: oxygen invaded into the platinum film
본 발명은 백금막 증착을 위한 스퍼터링시 플라즈마 가스로서 Ar/O2가스를 사용하여, 증착되는 백금막에 약간의 산소가 침입형으로 고용되도록 하는 기술이다. 백금막은 산소와 거의 반응하지 않는 노블 메탈(noble metal)로서 침입한 산소 원자는 박막내에 고용된 상태로 존재하게 되며, 침입형으로 고용된 산소 원자(O)는 고온 열공정 중에 백금 원자(Pt)들의 운동성을 방해하여 백금 결정립들이 조대하게 성장하는 것을 억제하여 백금막 표면 및 유전체와의 계면 거칠기가 개선되고, 열공정 후 냉각시 유전체 박막과의 열팽창 계수 차이에 의해 백금막에 유발되는 미세 홀을 억제할 수 있다. 또한, 본 발명은 증착된 백금막을 Ar 플라즈마 처리하여 막질을 더욱 치밀하게 함으로써 고온 열공정에 의해 유발되는 백금막의 물질적 특성 열화를 더욱 억제할 수 있도록 한다.The present invention uses Ar / O 2 gas as a plasma gas during sputtering for platinum film deposition, so that some oxygen is dissolved into the platinum film to be deposited by intrusion. The platinum film is a noble metal that hardly reacts with oxygen, and the oxygen atoms infiltrated are present in the solid solution in the thin film, and the oxygen atoms (O) dissolved in the intrusion type are platinum atoms (Pt) during the high temperature thermal process. Interfering with their mobility, inhibiting the coarse growth of platinum grains improves the interfacial roughness of the platinum film surface and the dielectric material. It can be suppressed. In addition, the present invention can further suppress the deterioration of the physical properties of the platinum film caused by the high temperature thermal process by further densifying the film quality by the Ar plasma treatment of the deposited platinum film.
상기의 기술적 과제를 달성하기 위하여 본 발명으로부터 제공되는 특징적인 반도체 소자의 캐패시터 전극용 백금막 형성방법은, 소정의 하부층 상에 백금막을 증착하되, Ar/O2플라즈마 분위기에서 스퍼터링하여 증착하는 제1 단계를 포함하여 이루어진다.In order to achieve the above technical problem, a method of forming a platinum film for a capacitor electrode of a semiconductor device, which is provided from the present invention, comprises depositing a platinum film on a predetermined lower layer, and depositing the same by sputtering in an Ar / O 2 plasma atmosphere. A step is made.
이하, 본 발명이 속한 기술분야에서 통상의 지식을 가진 자가 본 발명을 보다 용이하게 실시할 수 있도록 하기 위하여 본 발명의 바람직한 실시예를 소개하기로 한다.Hereinafter, preferred embodiments of the present invention will be introduced in order to enable those skilled in the art to more easily carry out the present invention.
첨부된 도면 도 2a 내지 도 2c는 본 발명의 일 실시예에 따른 강유전체 캐패시터 제조 공정을 도시한 것으로, 이하 이를 참조하여 설명한다.2A to 2C illustrate a ferroelectric capacitor manufacturing process according to an embodiment of the present invention, which will be described below with reference to the drawings.
본 실시예에 따른 공정은, 우선 도 2a에 도시된 바와 같이 소정의 하부층 공정을 마치고, 평탄화된 층간절연 산화막(20)이 형성된 웨이퍼 상에 접착층인 Ti막(21)을 형성한 다음, 그 상부에 스퍼터링(sputtering)법을 사용하여 캐패시터 하부 전극용 백금막(22)을 증착한다. 이때, 스퍼터링은 300∼600℃의 온도에서 이루어지며, Ar/O2플라즈마 분위기에서 스퍼터링을 실시함으로써 백금막(22) 내에 약간의 산소가 침입형으로 고용되도록 한다. 도면 부호 '23'은 백금막(22) 내에 침입형으로 고용된 산소를 나타낸다.The process according to the present embodiment first finishes a predetermined lower layer process as shown in FIG. 2A, and then forms a Ti film 21 as an adhesive layer on the wafer on which the planarized interlayer insulating oxide film 20 is formed, and then the upper portion thereof. The platinum film 22 for the capacitor lower electrode is deposited by sputtering. At this time, sputtering is performed at a temperature of 300 to 600 ° C., and sputtering is performed in an Ar / O 2 plasma atmosphere so that some oxygen is solid-dissolved in the platinum film 22. Reference numeral '23' denotes oxygen invaded into the platinum film 22 in a solid solution.
다음으로, 도 2b에 도시된 바와 같이 백금막(22)을 플라즈마 처리하여 막질을 더욱 치밀하게 만들어 준다. 이때, 플라즈마 처리는 백금막(22)을 증착한 챔버에서 증착이 끝난 후 플라즈마 상태의 Ar 이온(Ar+)이 웨이퍼 쪽을 향하도록 고주파 전원(RF power)을 공급하여 웨이퍼에 인가되는 전위를 조절함으로써 백금막(22)이 재 스퍼터링되지 않을 정도의 에너지로 백금막(22)을 두들겨 주어 막질을 치밀하게 만든다. 물론 플라즈마 처리는 다른 챔버에서 수행할 수도 있다.Next, as shown in FIG. 2B, the platinum film 22 is plasma treated to make the film quality more compact. At this time, in the plasma treatment, after the deposition is completed in the chamber in which the platinum film 22 is deposited, a high frequency power is supplied so that Ar ions (Ar + ) in the plasma state are directed toward the wafer to adjust the potential applied to the wafer. As a result, the platinum film 22 is beaten with energy such that the platinum film 22 is not sputtered again, thereby making the film quality dense. Of course, the plasma treatment may be performed in another chamber.
이어서, 도 2c에 도시된 바와 같이 백금막(22) 상에 강유전체 박막(24)을 증착하고, 강유전체 박막(24)을 결정화시키기 위한 열처리 공정을 실시한 다음, 백금막(22) 형성시와 같은 공정 조건으로 캐패시터 상부 전극용 백금막(25)을 형성한다. 이후, 일련의 사진 및 식각 공정을 통해 캐패시터를 패터닝하고, 캐패시터 특성을 안정화하기 위한 열처리를 실시한다. 도면 부호 '21a'는 열공정에 위해 Ti막(21)이 산화되어 형성된 TiOx막을 나타낸다.Subsequently, as shown in FIG. 2C, the ferroelectric thin film 24 is deposited on the platinum film 22, a heat treatment process for crystallizing the ferroelectric thin film 24 is performed, and the same process as in the formation of the platinum film 22 is performed. Under the condition, the platinum film 25 for the capacitor upper electrode is formed. Thereafter, the capacitor is patterned through a series of photographic and etching processes, and heat treatment is performed to stabilize the capacitor characteristics. Reference numeral '21a' denotes a TiO x film formed by oxidizing the Ti film 21 for the thermal process.
이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.
예를 들어, 전술한 실시예에서는 강유전체 캐패시터의 전극으로 백금막을 사용하는 경우를 일례로 들어 설명하였으나, 본 발명은 고유전체 캐패시터 제조시에 백금막을 캐패시터 전극으로 사용하는 경우에도 적용될 수 있다.For example, in the above-described embodiment, the case where the platinum film is used as the electrode of the ferroelectric capacitor has been described as an example. However, the present invention may be applied to the case where the platinum film is used as the capacitor electrode in the manufacture of the high-k dielectric capacitor.
전술한 본 발명은 고온 열공정에도 백금막의 물리적 특성 열화를 방지할 수 있으며, 이에 따라 캐패시터 특성 및 소자의 신뢰도를 향상시키는 효과를 기대할 수 있다.The above-described present invention can prevent deterioration of the physical properties of the platinum film even at a high temperature thermal process, and thus an effect of improving the capacitor characteristics and the reliability of the device can be expected.
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KR1019980061107A KR100321694B1 (en) | 1998-12-30 | 1998-12-30 | A method for forming platinum layer for capacitor electrode in semiconductor device |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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US6683001B2 (en) | 2001-04-10 | 2004-01-27 | Samsung Electronic Co., Ltd. | Method for manufacturing a semiconductor device whereby degradation of surface morphology of a metal layer from thermal oxidation is suppressed |
US6762091B2 (en) | 2001-04-10 | 2004-07-13 | Samsung Electronics Co., Ltd. | Methods for manufacturing semiconductor devices having a metal layer |
KR100719805B1 (en) * | 2005-12-30 | 2007-05-18 | 주식회사 아이피에스 | Method of depositing capacitor electrode adding transition metal |
KR101597714B1 (en) | 2014-11-04 | 2016-02-25 | 주식회사 포스코 | Unit for Removing Material, Storage Apparatus for Material having the same and Material Processing Method |
KR20160047172A (en) * | 2014-10-22 | 2016-05-02 | 유병철 | Apparatus for controlling Traffic safety sign and method thereof |
KR20160134005A (en) | 2015-05-14 | 2016-11-23 | 경희대학교 산학협력단 | The method of ensuring visibility using drone and adjacent vehicle and the display system using them |
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JP4228560B2 (en) * | 2000-11-01 | 2009-02-25 | ソニー株式会社 | Capacitor element and manufacturing method thereof |
KR100425450B1 (en) | 2001-06-26 | 2004-03-30 | 삼성전자주식회사 | Method for manufacturing Metal-Insulator-Metal Capacitor |
KR100792152B1 (en) * | 2006-07-11 | 2008-01-04 | 한국원자력연구원 | Apparatus of manufacturing platinum-family catalyst coated substrate for electrodes of electrochemical cell by plasma and manufacturing method using the same |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5164808A (en) * | 1991-08-09 | 1992-11-17 | Radiant Technologies | Platinum electrode structure for use in conjunction with ferroelectric materials |
JPH07263570A (en) * | 1994-03-17 | 1995-10-13 | Fujitsu Ltd | Manufacture of dielectric device |
JP3534815B2 (en) * | 1994-03-18 | 2004-06-07 | 富士通株式会社 | Semiconductor integrated circuit device |
JPH09162372A (en) * | 1995-12-13 | 1997-06-20 | Ricoh Co Ltd | Electrode material and capacitor element using it |
KR19980066717A (en) * | 1997-01-28 | 1998-10-15 | 김광호 | Manufacturing method of FRAM cell |
KR100244251B1 (en) * | 1997-06-19 | 2000-02-01 | 김영환 | Method for fabricating capacitor in semiconductor device |
-
1998
- 1998-12-30 KR KR1019980061107A patent/KR100321694B1/en not_active IP Right Cessation
-
1999
- 1999-12-27 JP JP11369608A patent/JP2000208440A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6683001B2 (en) | 2001-04-10 | 2004-01-27 | Samsung Electronic Co., Ltd. | Method for manufacturing a semiconductor device whereby degradation of surface morphology of a metal layer from thermal oxidation is suppressed |
US6762091B2 (en) | 2001-04-10 | 2004-07-13 | Samsung Electronics Co., Ltd. | Methods for manufacturing semiconductor devices having a metal layer |
US6927166B2 (en) | 2001-04-10 | 2005-08-09 | Samsung Electronics Co., Ltd. | Method for manufacturing semiconductor devices and integrated circuit capacitors whereby degradation of surface morphology of a metal layer from thermal oxidation is suppressed |
KR100719805B1 (en) * | 2005-12-30 | 2007-05-18 | 주식회사 아이피에스 | Method of depositing capacitor electrode adding transition metal |
KR20160047172A (en) * | 2014-10-22 | 2016-05-02 | 유병철 | Apparatus for controlling Traffic safety sign and method thereof |
KR101597714B1 (en) | 2014-11-04 | 2016-02-25 | 주식회사 포스코 | Unit for Removing Material, Storage Apparatus for Material having the same and Material Processing Method |
KR20160134005A (en) | 2015-05-14 | 2016-11-23 | 경희대학교 산학협력단 | The method of ensuring visibility using drone and adjacent vehicle and the display system using them |
Also Published As
Publication number | Publication date |
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JP2000208440A (en) | 2000-07-28 |
KR100321694B1 (en) | 2002-03-08 |
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