KR102661931B1 - 오류 정정 코드를 지원하는 장치 및 그것의 테스트 방법 - Google Patents

오류 정정 코드를 지원하는 장치 및 그것의 테스트 방법 Download PDF

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Publication number
KR102661931B1
KR102661931B1 KR1020180020017A KR20180020017A KR102661931B1 KR 102661931 B1 KR102661931 B1 KR 102661931B1 KR 1020180020017 A KR1020180020017 A KR 1020180020017A KR 20180020017 A KR20180020017 A KR 20180020017A KR 102661931 B1 KR102661931 B1 KR 102661931B1
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South Korea
Prior art keywords
data
memory
error
bit
ecc
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KR1020180020017A
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English (en)
Korean (ko)
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KR20190033410A (ko
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표석수
정현택
송태중
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삼성전자주식회사
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Priority to DE102018122826.0A priority Critical patent/DE102018122826A1/de
Priority to US16/135,325 priority patent/US10803971B2/en
Priority to TW107133098A priority patent/TWI808098B/zh
Priority to CN201811106617.6A priority patent/CN109542666B/zh
Publication of KR20190033410A publication Critical patent/KR20190033410A/ko
Application granted granted Critical
Publication of KR102661931B1 publication Critical patent/KR102661931B1/ko

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
KR1020180020017A 2017-09-21 2018-02-20 오류 정정 코드를 지원하는 장치 및 그것의 테스트 방법 KR102661931B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE102018122826.0A DE102018122826A1 (de) 2017-09-21 2018-09-18 Vorrichtung zum Unterstützen eines Fehlerkorrekturcodes und Testverfahren dafür
US16/135,325 US10803971B2 (en) 2017-09-21 2018-09-19 Device for supporting error correction code and test method thereof
TW107133098A TWI808098B (zh) 2017-09-21 2018-09-20 用於支持錯誤更正碼的裝置及其測試方法
CN201811106617.6A CN109542666B (zh) 2017-09-21 2018-09-21 用于支持纠错码的装置及其测试方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20170121878 2017-09-21
KR1020170121878 2017-09-21

Publications (2)

Publication Number Publication Date
KR20190033410A KR20190033410A (ko) 2019-03-29
KR102661931B1 true KR102661931B1 (ko) 2024-05-02

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KR1020180020017A KR102661931B1 (ko) 2017-09-21 2018-02-20 오류 정정 코드를 지원하는 장치 및 그것의 테스트 방법

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KR (1) KR102661931B1 (zh)
TW (1) TWI808098B (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210112845A (ko) 2020-03-06 2021-09-15 에스케이하이닉스 주식회사 메모리 장치 및 그의 테스트 동작 방법
US11468962B2 (en) 2021-03-03 2022-10-11 Micron Technology, Inc. Performing memory testing using error correction code values
KR20220144129A (ko) 2021-04-19 2022-10-26 에스케이하이닉스 주식회사 메모리 장치 및 그것을 포함하는 반도체 시스템
CN117112287A (zh) * 2023-09-07 2023-11-24 上海合芯数字科技有限公司 备用校验纠错方法、装置、服务器及存储介质

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160364280A1 (en) * 2015-06-10 2016-12-15 Infineon Technologies Ag Circuitry and method for testing an error-correction capability

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007132457A2 (en) * 2006-05-12 2007-11-22 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
JP2012073678A (ja) * 2010-09-27 2012-04-12 Fujitsu Ltd 擬似エラー発生装置
US8832524B2 (en) * 2011-09-22 2014-09-09 Violin Memory, Inc. System and method for correcting errors in data using a compound code
EP2677429A1 (en) * 2012-06-18 2013-12-25 Renesas Electronics Europe Limited Error correction
JP6005566B2 (ja) * 2013-03-18 2016-10-12 株式会社東芝 情報処理システム、制御プログラムおよび情報処理装置
US10127101B2 (en) * 2015-08-28 2018-11-13 Intel Corporation Memory device error check and scrub mode and error transparency
US9923579B2 (en) * 2016-03-08 2018-03-20 International Business Machines Corporation Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry
US9910090B2 (en) * 2016-03-08 2018-03-06 International Business Machines Corporation Bypassing an encoded latch on a chip during a test-pattern scan

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160364280A1 (en) * 2015-06-10 2016-12-15 Infineon Technologies Ag Circuitry and method for testing an error-correction capability

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Publication number Publication date
KR20190033410A (ko) 2019-03-29
TWI808098B (zh) 2023-07-11
TW201921245A (zh) 2019-06-01

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