KR102019256B1 - Thin film transistor and Method of manufacturing the same - Google Patents

Thin film transistor and Method of manufacturing the same Download PDF

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KR102019256B1
KR102019256B1 KR1020130122477A KR20130122477A KR102019256B1 KR 102019256 B1 KR102019256 B1 KR 102019256B1 KR 1020130122477 A KR1020130122477 A KR 1020130122477A KR 20130122477 A KR20130122477 A KR 20130122477A KR 102019256 B1 KR102019256 B1 KR 102019256B1
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electrode
passivation layer
light blocking
contact hole
layer
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KR1020130122477A
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Korean (ko)
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KR20150044059A (en
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신형범
채기성
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엘지디스플레이 주식회사
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

The thin film transistor according to the present invention includes a gate electrode formed on a substrate, an active layer formed on the gate electrode, a source and drain electrode connected to a predetermined region of the active layer, and the drain electrode formed on the source and drain electrode. The drain electrode overlapping the first contact hole on the first passivation layer including a first contact hole to partially expose the first passivation layer, a first electrode patterned on the first passivation layer, and a first passivation layer including the first electrode A second passivation layer including a portion of the second contact hole that is partially exposed, a light blocking layer formed on the second passivation layer and connected to the drain electrode through the second contact hole, and a second passivation layer including the light blocking layer A third passivation layer formed over the second contact hole, the third passivation layer including a third contact hole to partially expose the light blocking layer; And a second electrode formed on the third passivation layer and connected to the drain electrode through the light blocking layer, wherein light leakage is generated by external light through the black matrix slit and internal light of the backlight unit. Can be improved.

Description

Thin film transistor substrate and method of manufacturing the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor substrate, and more particularly, to a thin film transistor substrate including a light blocking agent for preventing light leakage and a method of manufacturing the same.

In general, a liquid crystal display device (LCD) expresses an image by using optical anisotropy and birefringence characteristics of liquid crystal molecules. When an electric field is applied, the arrangement of the liquid crystals is changed and light is transmitted according to the changed alignment direction of the liquid crystals. Characteristics also vary.

In general, a liquid crystal display device is formed by arranging two substrates on which electric field generating electrodes are formed so that the surfaces on which two electrodes are formed face each other, injecting a liquid crystal material between the two substrates, and then applying a voltage to the two electrodes. By moving the liquid crystal molecules by an electric field, the device expresses an image by the transmittance of light that varies accordingly.

1 is a schematic cross-sectional view of a liquid crystal display according to the related art.

As shown in FIG. 1, a conventional liquid crystal display device includes a liquid crystal display panel for displaying an image, a driving circuit (not shown) for driving the liquid crystal display panel, and light to the liquid crystal display panel. It provides a backlight unit (not shown). The liquid crystal display panel includes a color filter substrate 20 and a thin film transistor substrate 10 bonded together with the liquid crystal layer 30 therebetween.

The thin film transistor substrate 10 may include a thin film transistor (not shown) formed on the first substrate 11, a gate line 12 connected to the thin film transistor (not shown), the thin film transistor (not shown), and a gate. A protective film 13 for protecting the line 12, and an alignment film 14 formed to cover the protective film 13.

The color filter substrate 20 is formed on the black matrix 22 formed on the second substrate 21 to prevent light leakage, and is formed in a region partitioned by the black matrix 22 and implements red, green, and blue colors. It includes a color filter 23, the black matrix 22 and the overcoat 24 formed to cover the color filter 23.

The first and second substrates 11 and 21 use plastic materials for light weight and thinness. In this case, the first substrate 11 and the second substrate 21 are pulled out of the liquid crystal layer 30 when the surface is pressed by the liquid crystal display device due to the ductility of the plastic material, and the first substrate 11 is caused by external force and heat during the process. There is a problem that distortion occurs between the substrate 11 and the second substrate 21.

In order to solve this problem, conventionally, a part of the color filter substrate 20 including the black matrix 22 is removed to form a black matrix slit H, and then, an ultraviolet (UV) light is formed using the mask 40. Irradiation forms a support 32 between the thin film transistor substrate 10 and the color filter substrate 20 in the liquid crystal layer 30.

The conventional liquid crystal display device has the following problems.

First, there is a problem in that light leakage occurs due to external light through the black matrix slit H and internal light of a backlight unit (not shown).

Second, in the related art, light leakage is prevented by changing the wiring structure of the gate line 12 included in the thin film transistor substrate 10. However, an increase in width and a shape change of the gate line 12 cause a decrease in aperture ratio. There is this.

SUMMARY OF THE INVENTION The present invention has been devised to solve the above-mentioned conventional problems, and an object thereof is to provide a thin film transistor substrate for preventing light leakage and a decrease in aperture ratio of a liquid crystal display device to which the support 32 is applied, and a method of manufacturing the same.

The present invention provides a gate electrode formed on a substrate, an active layer formed on the gate electrode, a source and drain electrode connected to a predetermined region of the active layer, and formed on the source and drain electrodes. A first passivation layer including a first contact hole to partially expose the drain electrode, a first electrode patterned on the first passivation layer, and a first passivation layer on the first passivation layer including the first electrode; A second passivation layer including a second contact hole through which the drain electrode is partially exposed, a light blocking layer formed on the second passivation layer and connected to the drain electrode through the second contact hole, and a light blocking layer; A third passivation layer formed on the passivation layer to include a third contact hole overlapping the second contact hole and partially exposing the light blocking layer. And a second electrode formed on the third passivation layer and connected to the drain electrode through the light blocking layer.

The present invention also provides a gate electrode formed on a substrate, an active layer formed on the gate electrode, a source and drain electrode connected to a predetermined region of the active layer, and the drain electrode partially exposed while being formed on the source and drain electrode. A first passivation layer formed by including a first contact hole, a first electrode patterned on the first passivation layer, a second passivation layer formed by including a first electrode on the first passivation layer, and a pattern formed on the second passivation layer It provides a thin film transistor substrate comprising a second electrode and a light blocking film patterned on the second electrode.

The present invention also provides a process for forming a gate electrode on a substrate, a process of forming an active layer on the gate electrode, a process of forming a source and a drain electrode connected to a predetermined region of the active layer, and on the source and drain electrodes. Forming a first passivation layer including a first contact hole so that the drain electrode is partially exposed to the first electrode; forming a first electrode on the first passivation layer; and forming the first passivation layer on the first passivation layer including the first electrode. Forming a second passivation layer including a second contact hole overlapping the first contact hole and partially exposing the drain electrode; forming a light blocking layer connected to the drain electrode through the second contact hole on the second passivation layer; Forming a third contact hole on the second passivation layer including the light blocking layer to overlap the second contact hole and partially expose the light blocking layer; As the former on the third protective film, and the third protective film formed provides a method for producing the thin film transistor substrate comprising a second electrode connected with the drain electrode through the light shielding film.

The present invention also provides a process of forming a gate electrode on a substrate, a process of forming an active layer on the gate electrode, a process of forming a source and a drain electrode connected to a predetermined region of the active layer, and the source and drain electrodes. Forming a first passivation layer including a first contact hole on the drain electrode to partially expose the drain electrode, pattern forming a first electrode on the first passivation layer, and including a first electrode on the first passivation layer Forming a second passivation film; forming a second electrode on the second passivation film; and forming a light shielding film on the second electrode. To provide.

According to the present invention as described above has the following effects.

The present invention can improve the problem of light leakage caused by external light through the black matrix slit and internal light of the backlight unit by forming the light blocking film on the transistor substrate.

In addition, the present invention prevents light leakage due to the light blocking film formed on the transistor substrate so that the width of the gate line 12 is not increased and the shape of the gate line 12 is not changed. It is possible to improve the problem that causes.

1 is a schematic cross-sectional view of a liquid crystal display according to the related art.
2 is a schematic plan view of a thin film transistor substrate according to an exemplary embodiment of the present invention.
3 is a schematic cross-sectional view of a thin film transistor substrate according to an exemplary embodiment of the present invention.
4 is a schematic cross-sectional view of a thin film transistor substrate according to another exemplary embodiment of the present invention.
5A to 5H are manufacturing process diagrams for manufacturing a thin film transistor substrate according to an embodiment of the present invention.
6A to 6G are manufacturing process diagrams for manufacturing a thin film transistor substrate according to another embodiment of the present invention.

The term " on " as used herein means to include not only when a configuration is formed directly on top of another configuration, but also when a third configuration is interposed between these configurations.

The term " connected " as used herein means including not only when one configuration is directly connected to another configuration, but also when a configuration is indirectly connected to another configuration through a third configuration.

Modifiers such as "first" and "second" described herein are not intended to mean the order of the corresponding components, but to distinguish the corresponding components from each other.

The terms "comprise" and the like described herein are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described, and one or more other features or numbers, step, It is to be understood that it does not exclude in advance the possibility of the presence or the addition of an operation, a component, a part, or a combination thereof.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise.

Hereinafter, with reference to the accompanying drawings will be described in detail preferred embodiments of the present invention designed to solve the above problems.

2 is a schematic plan view of a thin film transistor according to an exemplary embodiment of the present invention.

As can be seen in Figure 2, the thin film transistor substrate according to an embodiment of the present invention, the substrate 100, the data line DL, the gate line GL, the gate electrode 120, the source electrode 153, the drain The electrode 155, the first electrode 170, the light blocking layer 180, and the second electrode 190 are formed, and a black matrix 2000 is formed on the thin film transistor substrate.

The black matrix 2000 is formed on a color filter substrate (not shown) facing the thin film transistor substrate. Specifically, the black matrix 2000 is to prevent light leakage into a region in which the liquid crystal molecules do not operate. As shown in the drawing, the black matrix 2000 is between the thin film transistor region and the pixel and the pixel (that is, the gate line GL). And a data line DL region).

In this case, a black matrix slit 2100 is formed in the gate line GL to form a support (not shown) between the thin film transistor substrate and the color filter substrate (not shown) through ultraviolet (UV) irradiation.

The data line DL and the gate line GL cross each other to define a pixel area. The pixel region includes a TFT region including the gate electrode 120, a source electrode 153, and a drain electrode 155, and an opening region other than the TFT region. The data line DL may be formed in a curved straight line instead of a straight straight line as shown.

The gate electrode 120 may be formed by branching from the gate line GL, but the gate line GL may also function as a gate electrode.

The source electrode 153 is connected to the data line DL. The source electrode 153 may be formed in a linear structure as shown, but may be formed in various shapes known in the art, for example, U-shape. The drain electrode 155 is spaced apart from the source electrode 153 by a predetermined interval.

The first electrode 170 together with the second electrode 190 forms an electric field for driving the liquid crystal. In this case, the first electrode 170 may be a common electrode, and the second electrode 190 may be a pixel electrode.

The first electrode 170 may be formed in a plate structure as shown, in which case a fringe field is formed between the first electrode 170 and the second electrode 190. Can be. In addition, although not shown, a horizontal electric field may be formed between the first electrode 170 and the second electrode 190.

The light blocking layer 180 may overlap the black matrix slit 2100 on the source electrode 153 and the drain electrode 155 to prevent light leakage through the black matrix slit 2100.

The light blocking layer 180 is overlapped with the black matrix slit 2100 to prevent light leakage due to external light through the black matrix slit 2100 and internal light of a backlight unit (not shown).

In addition, in the related art, light leakage due to external light through the black matrix slit 2100 and internal light of a backlight unit (not shown) is prevented by increasing or changing the shape of the gate line GL, but a problem of lowering the aperture ratio is caused. This occurred.

Accordingly, the thin film transistor substrate according to the exemplary embodiment of the present invention forms a light blocking layer 180 overlapping the black matrix slit 2100 on the source electrode 153 and the drain electrode 155 to form a matrix slit 2100. It is possible to prevent the light leakage by the external light and the internal light of the backlight unit (not shown) through it can improve the problem of lowering the aperture ratio.

The second electrode 190 is formed in the opening region, and in particular, is connected to the drain electrode 155 through a light blocking film. The second electrode 190 may be a pixel electrode and may be formed in a finger structure, but may be changed in various forms.

3 is a schematic cross-sectional view of a thin film transistor substrate according to an exemplary embodiment of the present invention, which corresponds to a cross section of the A-B line of FIG. 2.

As can be seen in Figure 3, the thin film transistor substrate according to an embodiment of the present invention is the substrate 100, the gate insulating film 110, the gate electrode 120, the insulating film 131, the active layer 140, the source electrode and The drain electrodes 153 and 155, the first passivation layer 160, the first electrode 170, the second passivation layer 135, the light blocking layer 180, the third passivation layer 137, and the second electrode 190 may be disposed. It is made to include.

The substrate 100 may be a transparent plastic that can be bent or bent, such as polyimide.

The gate insulating layer 110 is formed on the entire surface of the substrate 100. In order to insulate the gate insulating layer 110 and the gate electrode 120, the gate insulating layer 110 may be made of an inorganic insulating material such as silicon oxide or silicon nitride, but is not necessarily limited thereto. Photo acryl or benzocyclobutene ( Or an organic insulating material such as BCB).

The gate electrode 120 is patterned on the gate insulating layer 110.

The gate electrode 120 may be molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodium (Nd), copper (Cu), or their It may be made of an alloy, and may be made of a single layer or two or more layers of the metal or alloy.

The insulating layer 131 is formed on the entire surface of the gate insulating layer 110 including the gate electrode 120.

The insulating layer 131 may be made of an inorganic insulating material such as silicon oxide or silicon nitride to insulate the active layer 140, but is not limited thereto. Photo acryl or benzocyclobutene ( Or an organic insulating material such as BCB).

The active layer 140 is patterned on the insulating layer 131 while overlapping the gate electrode 120.

The active layer 140 may be formed of an oxide semiconductor such as In—Ga—Zn—O (IGZO).

The source electrode 153 and the drain electrode 155 are patterned to face each other on the insulating layer 131 while being connected to a predetermined region of the active layer 140.

The source and drain electrodes 153 and 155 may include molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodium (Nd), and copper (Cu). ), Or alloys thereof, and may consist of a single layer or multiple layers of two or more layers of the metal or alloy.

The first passivation layer 160 is formed on the source and drain electrodes 153 and 155 so as to have a first contact hole H1 exposing the drain electrode 155.

The first passivation layer 160 may be made of an organic insulating material such as photo acryl or benzocyclobutene (BCB), but is not limited thereto, and may be made of an inorganic insulating material such as silicon oxide or silicon nitride. It may be.

The first electrode 170 is patterned on the first passivation layer 160.

The first electrode 170 may be patterned in an area except for the first contact hole H1, and the first electrode 170 may be a common electrode.

The first electrode 170 may be made of a metal such as silver (Ag), but is not necessarily limited thereto.

The second contact layer 135 overlaps the first contact hole H1 on the first passivation layer 160 including the first electrode 170 so that the drain electrode 155 is partially exposed. It is provided with the hole H2.

The second passivation layer 135 may be made of an organic insulating material such as photo acryl or benzocyclobutene (BCB), but is not necessarily limited thereto, and may be made of an inorganic insulating material such as silicon oxide or silicon nitride. It may be.

The light blocking layer 180 is formed on the second passivation layer 135 and is patterned to be connected to the drain electrode 155 through the second contact hole H2.

The light blocking layer 180 includes an opening region in which the active layer 140 and the first contact hole H1 are positioned to block light from entering the active layer 140. The pattern is formed on. In addition, the light blocking layer 180 is connected to the drain electrode 155 through the second contact hole H2.

To this end, the light blocking layer 180 is made of an opaque metal material that blocks light and is conductive at the same time.

As such, the light blocking layer 180 blocks light flowing through the black matrix slit (not shown), thereby increasing the reliability of the active layer 140. Therefore, in order to block the light flowing through the black matrix slit, it is not necessary to widen or change the shape of the gate line GL, thereby securing an aperture ratio.

The third passivation layer 137 includes the light blocking layer 180 and is patterned to include the third contact hole on the second passivation layer 135.

The third contact hole H3 is formed to partially expose the light blocking layer 180.

The third passivation layer 137 may be made of an organic insulating material such as photo acryl or benzocyclobutene (BCB), but is not limited thereto, and may be made of an inorganic insulating material such as silicon oxide or silicon nitride. It may be.

The second electrode 190 is patterned on the third passivation layer 137.

The second electrode 190 forms an electric field for driving the liquid crystal together with the first electrode 170. In this case, the second electrode 190 may be a pixel electrode, and the first electrode 170 may be a common electrode.

In this case, the second electrode 190 is connected to the light blocking layer 180 through the third contact hole H3 and is connected to the drain electrode 155 through the light blocking layer 180.

In the following, overlapping descriptions of repeated portions in materials, structures, and the like of each structure will be omitted.

4 is a schematic cross-sectional view of a thin film transistor substrate according to another exemplary embodiment of the present disclosure, except that the structures of the first electrode 190, the light blocking layer 180, and the second electrode 170 are changed. Same as the thin film transistor substrate according to FIG. 2. Therefore, the same reference numerals are assigned to the same components, and repeated descriptions of the same components will be omitted.

As can be seen in Figure 4, a thin film transistor substrate according to another embodiment of the present invention is a substrate 100, a gate insulating film 110, a gate electrode 120, an insulating film 131, an active layer 140, a source electrode and The drain electrodes 153 and 155, the first passivation layer 160, the first electrode 190, the second passivation layer 135, the second electrode 170, and the light blocking layer 180 may be formed.

The first electrode 190 is formed on the first passivation layer 160.

The first electrode 190 may be patterned on the first passivation layer 160 including the first contact hole H1. In this case, the first electrode 190 may be a pixel electrode.

The first electrode 190 is connected to the drain electrode 155 through the first contact hole H1.

The second passivation layer 135 is formed on the first passivation layer 160 while including the first electrode 190.

The second passivation layer 135 may be made of an organic insulating material such as photo acryl or benzocyclobutene (BCB) to insulate the first electrode 190 and the second electrode 170 from each other. However, the present invention is not limited thereto, and may be made of an inorganic insulating material such as silicon oxide or silicon nitride.

The second electrode 170 is patterned on the second passivation layer 135. In this case, the second electrode 170 may be a common electrode.

The light blocking layer 180 is patterned on the second electrode 170.

The light blocking layer 180 is patterned on the second electrode 170 to block light from entering the active layer 140.

To this end, the light blocking layer 180 may be made of an opaque material that blocks light and may be made of an insulating material to protect and insulate the second electrode 170.

As such, the light blocking layer 180 blocks light flowing through the black matrix slit (not shown), thereby increasing the reliability of the active layer 140. In addition, in order to block the light flowing through the black matrix slit, it is not necessary to widen or change the shape of the gate line GL to secure an aperture ratio.

5A to 5H are manufacturing process diagrams of manufacturing a thin film transistor substrate according to an embodiment of the present invention, which relates to the manufacturing process of the thin film transistor substrate according to FIG. 3 described above.

First, as shown in FIG. 5A, the gate insulating layer 110 is deposited on the entire surface of the substrate 100 using PECVD (Plasma Enhanced Chemical Vapor Deposition), and the gate electrode 120 is deposited on the insulating layer 110. Pattern forms.

The gate electrode 120 may be molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodium (Nd), copper (Cu), or their The alloy may be deposited using PECVD (Plasma Enhanced Chemical Vapor Deposition), a photoresist pattern may be formed on the deposited a-Si, and the pattern may be formed using a mask process that sequentially performs exposure, development, and etching processes. . Pattern formation for each of the components described below can also be performed using a mask process including the above exposure, development, and etching processes.

Next, as shown in FIG. 5B, an insulating film 131 is deposited on the entire surface of the gate insulating film 110 including the gate electrode 120, and overlaps with the gate electrode 120 to form an upper surface of the insulating film 131. The active layer 140 is formed in a pattern.

The active layer 140 may be formed by depositing amorphous silicon using PECVD (Plasma Enhanced Chemical Vapor Deposition) and patterning by a mask process, or by sputtering or MOCVD (Metal Organic) an amorphous oxide semiconductor such as a-IGZO. Deposition using Chemical Vapor Deposition, and about 650 ° C through furnace or Rapid Thermal Process (RTP). The amorphous oxide semiconductor may be crystallized by performing the above high temperature heat treatment process, and the crystallized oxide semiconductor may be formed by patterning by a mask process, but is not necessarily limited thereto.

Next, as shown in FIG. 5C, the source electrode 153 and the drain electrode 155 are patterned to face each other on the insulating layer 131 while being connected to a predetermined region of the active layer 140 through a mask process. .

Next, as shown in FIG. 5D, the first passivation layer 160 is patterned on the source electrode 153 and the drain electrode 155 to include the first contact hole H1.

A part of the drain electrode 155 is exposed through the first contact hole H1.

 Next, as shown in FIG. 5E, a first electrode 170 is patterned on the first passivation layer 160.

The first electrode 170 is patterned in an area excluding the first contact hole H1.

Next, as shown in FIG. 5F, the second passivation layer 135 is patterned to include the second contact hole H2 on the first passivation layer 160 including the first electrode 170.

The second contact hole H2 overlaps the first contact hole H1 and is formed to partially expose the drain electrode 155.

Next, as shown in FIG. 5G, the light blocking layer 180 is patterned on the second passivation layer 135.

In detail, the light blocking layer 180 includes an opening region in which the active layer 140 and the first contact hole H1 are positioned to block light from entering the active layer 140. A pattern is formed on the 135. In addition, the light blocking layer 180 is connected to the drain electrode 155 through the second contact hole H2.

To this end, the light blocking film 180 is formed of an opaque metal material that blocks light and is conductive.

Next, as shown in FIG. 5H, the third passivation layer 137 is patterned to include the light blocking layer 180 to include the third contact hole H3 on the entire surface of the second passivation layer 135. The third contact hole H3 is formed to partially expose the light blocking layer 180.

Next, the second electrode 190 is patterned on the third passivation layer 137.

In this case, the second electrode 190 is connected to the light blocking film 180 through the third contact hole H3 and to the drain electrode 155 through the light blocking film 180.

6A to 6G are manufacturing process diagrams of manufacturing a thin film transistor substrate according to another embodiment of the present invention, which relates to the manufacturing process of the thin film transistor substrate according to FIG. 4 described above. 6A to 6G, the thin film transistor according to FIGS. 5A to 5H described above except for changing the structures of the first electrode 190, the light blocking layer 180, and the second electrode 170. It is the same as the manufacturing process of a board | substrate. Hereinafter, repeated description of the same configuration will be omitted.

Since the process of FIGS. 6A to 6D is the same as the process of FIGS. 5A to 5D, a detailed description thereof will be omitted.

As shown in FIG. 6E, the first electrode 190 is patterned on the first passivation layer 160.

In this case, the first electrode 190 may be a common electrode and is connected to the drain electrode 155.

Next, as shown in FIG. 6F, the second passivation layer 160 is formed on the first passivation layer 160 including the first electrode 190.

Thereafter, a second electrode 170 is patterned on the second passivation layer. In this case, the second electrode 170 may be a pixel electrode.

Next, as shown in FIG. 6G, the light blocking layer 180 is patterned on the second electrode 170.

The light blocking layer 180 is made of an opaque material from a region overlapping with the active layer 140 to an opening region to block light from entering the active layer 140, and also protects the second electrode 170. And is formed of an insulating material to insulate.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and it is possible to substitute, modify, and change variously within the scope without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

100 substrate 110 gate insulating film
120: gate electrode 131: insulating film
140: active layer 153: source electrode
155: drain electrode 160: first protective film
170: first electrode 135: second protective film
180: light blocking film 137: third protective film
190: second electrode H1: first contact hole
H2: second contact hole H3: third contact hole

Claims (14)

A gate electrode formed on the substrate;
An active layer formed on the gate electrode;
Source and drain electrodes connected to a predetermined region of the active layer;
A first passivation layer formed on the source and drain electrodes and including a first contact hole to partially expose the drain electrode;
A first electrode patterned on the first passivation layer;
A second passivation layer formed on the first passivation layer including the first electrode and including a second contact hole overlapping the first contact hole to partially expose the drain electrode;
An light blocking layer formed on the second passivation layer and connected to the drain electrode through the second contact hole;
A third passivation layer formed on the second passivation layer including the light blocking layer and having a third contact hole overlapping the second contact hole to partially expose the light blocking layer; And
And a second electrode formed on the third passivation layer and connected to the drain electrode through the light blocking layer. The method of claim 1,
The light blocking film is a thin film transistor substrate, characterized in that made of an opaque material for blocking light. The method of claim 1,
The light blocking film is a thin film transistor substrate, characterized in that made of a conductive material. The method of claim 1,
The first electrode is a common electrode,
And the second electrode is a pixel electrode. A gate electrode formed on the substrate;
An active layer formed on the gate electrode;
Source and drain electrodes connected to a predetermined region of the active layer;
A first passivation layer formed on the source and drain electrodes and including a first contact hole to partially expose the drain electrode;
A first electrode patterned on the first passivation layer;
A second passivation layer formed on the first passivation layer including a first electrode;
A second electrode patterned on the second passivation layer; And
And a light blocking film patterned on the second electrode. The method of claim 5,
The light blocking film is a thin film transistor substrate, characterized in that made of an opaque material for blocking light. The method of claim 5,
The light blocking film is a thin film transistor substrate, characterized in that made of an insulating material. The method of claim 5,
The first electrode is a pixel electrode,
The second electrode is a thin film transistor substrate, characterized in that the common electrode. Forming a gate electrode on the substrate;
Forming an active layer on the gate electrode;
Forming source and drain electrodes connected to predetermined regions of the active layer;
Forming a first passivation layer including a first contact hole on the source and drain electrodes to partially expose the drain electrode;
Forming a first electrode on the first passivation film;
Forming a second passivation layer on the first passivation layer including the first electrode, the second passivation layer including a second contact hole overlapping the first contact hole and partially exposing the drain electrode;
Forming a light blocking layer on the second passivation layer, the light blocking layer being connected to the drain electrode through the second contact hole;
A third passivation layer formed on the second passivation layer including the light blocking layer and having a third contact hole overlapping the second contact hole to partially expose the light blocking layer; And
And a second electrode formed on the third passivation layer and connected to the drain electrode through the light blocking layer. The method of claim 9,
The light blocking film is a method of manufacturing a thin film transistor substrate, characterized in that made of an opaque material for blocking light. The method of claim 9,
The light blocking film is a method of manufacturing a thin film transistor substrate, characterized in that made of a conductive material. Forming a gate electrode on the substrate;
Forming an active layer on the gate electrode;
Forming source and drain electrodes connected to predetermined regions of the active layer;
Forming a first passivation layer including a first contact hole on the source and drain electrodes to partially expose the drain electrode;
Patterning a first electrode on the first passivation film;
Forming a second protective film including a first electrode on the first protective film;
Patterning a second electrode on the second passivation film; And
And forming a light blocking film on the second electrode. The method of claim 12,
The light blocking film is a method of manufacturing a thin film transistor substrate, characterized in that made of an opaque material for blocking light. The method of claim 12,
The light blocking film is a method of manufacturing a thin film transistor substrate, characterized in that made of an insulating material.
KR1020130122477A 2013-10-15 2013-10-15 Thin film transistor and Method of manufacturing the same KR102019256B1 (en)

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JP2008058573A (en) 2006-08-31 2008-03-13 Epson Imaging Devices Corp Liquid crystal device and electronic apparatus
JP5951198B2 (en) 2010-07-14 2016-07-13 三星ディスプレイ株式會社Ｓａｍｓｕｎｇ Ｄｉｓｐｌａｙ Ｃｏ．，Ｌｔｄ． Liquid crystal display

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JP2008058573A (en) 2006-08-31 2008-03-13 Epson Imaging Devices Corp Liquid crystal device and electronic apparatus
JP5951198B2 (en) 2010-07-14 2016-07-13 三星ディスプレイ株式會社Ｓａｍｓｕｎｇ Ｄｉｓｐｌａｙ Ｃｏ．，Ｌｔｄ． Liquid crystal display

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