KR102009529B1 - Manufacturing method of an array substrate for liquid crystal display - Google Patents

Manufacturing method of an array substrate for liquid crystal display Download PDF

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KR102009529B1
KR102009529B1 KR1020130033488A KR20130033488A KR102009529B1 KR 102009529 B1 KR102009529 B1 KR 102009529B1 KR 1020130033488 A KR1020130033488 A KR 1020130033488A KR 20130033488 A KR20130033488 A KR 20130033488A KR 102009529 B1 KR102009529 B1 KR 102009529B1
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thin film
amorphous silicon
etching
weight
containing impurities
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KR1020130033488A
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KR20140118125A (en
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정경섭
이지연
최용석
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동우 화인켐 주식회사
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions

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  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)

Abstract

The present invention comprises the steps of laminating a pure amorphous silicon (a-Si: H) thin film on a substrate, and sequentially laminating an amorphous silicon (n + a-Si: H) thin film containing impurities thereon; Forming a mask pattern having an etched region open on the amorphous silicon (n + a-Si: H) thin film including the impurity; And collectively etching the pure amorphous silicon (a-Si: H) thin film and the amorphous silicon (n + a-Si: H) thin film containing impurities thereon with an etchant composition. In the preparation method, the etchant composition, (A) 5.0 to 15.0% by weight persulfate, (B) 1.0 to 20.0% by weight Fe 3 + compound, (C) 0.01 to 10.0% by weight relative to the total weight of the composition And (D) 5.0 to 20.0% by weight of inorganic acid and (E) water residual amount.

Description

Manufacturing method of array substrate for liquid crystal display device {MANUFACTURING METHOD OF AN ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY}

The present invention relates to a method for producing an array substrate for a liquid crystal display device.

In the liquid crystal display, the process of forming the metal wiring on the substrate is generally composed of a metal film forming process by sputtering or the like, a photoresist forming process in a selective region by photoresist coating, exposure and development, and an etching process. And washing steps before and after the individual unit steps. The etching process refers to a process of leaving a metal film in a selective region using a photoresist as a mask, and a dry etching using a plasma or the like or a wet etching using an etching liquid composition is generally used.

Thin-Film Transistor (TFT) manufacturing, which is essential for the manufacture of thin-film transistor liquid crystal display (TFT-LCD) devices, is important.

1A to 1B show the structure of a TFT manufactured by a conventional method. Referring to FIGS. 1A and 1B, the structure of the TFT is a pure amorphous silicon (a-Si: H) having a metal gate 12 on an insulating substrate 11, a gate insulating film 13 formed thereon, and an active layer thereon. (14) A thin film of amorphous silicon (n + a-Si: H) (15) is present, on top of which an impurity to reduce the contact resistance of the source / drain, and a source / drain metal (16) Inverted-staggerd method in which) is formed is mainly used.

In order to form a TFT with this structure, an amorphous silicon (n + a-Si: H) 15 thin film containing impurities deposited on a pure amorphous silicon (a-Si: H) 14 thin film is removed, Pure amorphous silicon (a-Si: H) (14) thin film is indispensable to minimize the effect.

FIG. 1A illustrates an amorphous silicon (n + a-Si: H) (15) thin film containing an impurity by using a dry etching method, and includes amorphous silicon (n + a-Si: H) (15) containing an impurity During etching of the thin film, damage to the pure amorphous silicon (a-Si: H) 14 thin film was inevitably present. In particular, the low selectivity (<5: 1) led to unnecessary etching of pure amorphous silicon (a-Si: H) thin films. That is, the thickness of the active layer (non-doped silicon thin film) under the amorphous silicon (n + a-Si: H) 15 thin film containing impurities becomes thin because the amount is in a range that cannot be easily controlled in the process. After the process proceeds, it becomes impossible to form the active layer uniformly and eventually act as an important cause of non-uniformity of device characteristics.

In the conventional dry etching, in order to prevent the underlying pure amorphous silicon (a-Si: H) thin film from being etched during the etching of the amorphous silicon (n + a-Si: H) 15 thin film containing impurities due to such a problem, FIG. 1B As in the case, the etch stop layer 19 was used. In this case, since the etch stop layer 19 at the bottom of the amorphous silicon (n + a-Si: H) (15) thin film containing impurities protects the pure amorphous silicon (a-Si: H) 14 thin film, Damage can be avoided, but one layer, which is not essential to the structure of the TFT, is inserted and can cause a decrease in productivity with an increase in the number of processes.

In the case of manufacturing a semiconductor device as described above, there is a case in which a process of selectively etching an amorphous silicon (n + a-Si: H) thin film containing impurities and a pure amorphous silicon (a-Si: H) thin film may be necessary. In case of using the conventional etching method, the lower layer of the amorphous silicon (a-Si: H) thin film is etched, or the addition of the process due to the use of the etching prevention layer (thin film deposition and photolithography process and etching process) There is this.

KR 10-0392362 B

The present invention relates to a method of etching a silicon thin film, and in particular, to provide a wet etching method of simultaneously etching an amorphous silicon (n + a-Si: H) thin film and a pure amorphous silicon (a-Si: H) thin film containing impurities simultaneously. Its purpose is to.

In addition, the present invention is a pure amorphous silicon (a-) etched using an etchant composition that simultaneously etch the amorphous silicon (n + a-Si: H) thin film containing impurities and the pure amorphous silicon (a-Si: H) thin film at the same time An object of the present invention is to provide an array substrate for a liquid crystal display device including a Si: H) thin film layer, an amorphous silicon (n + a-Si: H) thin film layer containing impurities, and at least one of a source / drain electrode and a data line. .

In addition, the present invention proposes a conventional dry etching as a wet etching liquid, the liquid crystal having the advantage of solving the disadvantages of damage and contamination of the metal film due to the impact of ions in the plasma or radicals during the dry etching process and radicals, and increase the productivity It is an object of the present invention to provide a method for manufacturing an array substrate for a display device.

In order to achieve the above object, the present invention stacks a pure amorphous silicon (a-Si: H) thin film on a substrate and sequentially deposits an amorphous silicon (n + a-Si: H) thin film containing impurities thereon. step;

Forming a mask pattern having an etched region open on the amorphous silicon (n + a-Si: H) thin film including the impurity; And

Fabrication of an array substrate for a liquid crystal display device comprising the step of collectively etching a pure amorphous silicon (a-Si: H) thin film and an amorphous silicon (n + a-Si: H) thin film containing impurities thereon with an etchant composition In the method,

The etching liquid composition, (A) and sulfate from 5.0 to 15% by weight relative to the total composition weight, (B) Fe 3 + compound 1.0 to 20.0% by weight, (C) also 0.01 to 10.0% by weight of a fluorine compound, (D) mineral acid It provides a method for producing an array substrate for a liquid crystal display device comprising 5.0 to 20.0% by weight and (E) water residual amount.

In addition, the present invention is the total weight in respect (A) and sulfate from 5.0 to 15.0% by weight of the composition, (B) Fe 3 + compound 1.0 to 20.0% by weight, (C) also 0.01 to 10.0% by weight of a fluorine compound, (D) mineral acid Simultaneously batch etching both the amorphous silicon (n + a-Si: H) thin film containing impurities and the pure amorphous silicon (a-Si: H) thin film, characterized in that it comprises 5.0 to 20.0% by weight and the remaining amount of (E) water. It provides an etching solution composition.

In addition, the present invention is a pure amorphous silicon (a-Si: H) thin film layer and the amorphous silicon (n + a-Si: H) thin film layer containing impurities and source / drain electrodes and data wirings etched using the etchant composition An array substrate for a liquid crystal display device including at least one of the above is provided.

The etchant composition of the present invention may use a wet etching to collectively etch an amorphous silicon (n + a-Si: H) thin film containing impurities on top of a pure amorphous silicon (a-Si: H) thin film. In the case of wet etching using the etchant composition, damages caused by plasma generated by dry etching can be eliminated, and thus, there is a dry etching process having the same batch etching characteristics. In the case of using conventional dry etching, expensive equipment is used, but according to the present invention, it is economical by batch etching by batch wet etching, thereby improving productivity. Therefore, when the present invention is applied to a semiconductor device manufacturing process such as a TFT, it has an excellent effect of simplifying the semiconductor device manufacturing process and improving device characteristics.

In addition, the etchant composition of the present invention includes an amorphous silicon (n + a-Si: H) thin film containing impurities on top of a pure amorphous silicon (a-Si: H) thin film when manufacturing an array substrate for a liquid crystal display device. In addition, the source / drain electrodes and data lines can be etched in a batch, simplifying the etching process and maximizing process yield.

1A and 1B are cross-sectional views illustrating a manufacturing process of a thin film transistor manufactured by a conventional method.

Hereinafter, the present invention will be described in detail.

The present invention relates to an etching method of a silicon thin film, and in particular, a wet etching liquid composition capable of collectively etching an amorphous silicon (n + a-Si: H) thin film containing impurities and a pure amorphous silicon (a-Si: H) thin film, The present invention relates to an etching method, an array substrate for a liquid crystal display device, and a method for manufacturing an array substrate for a liquid crystal display device. Here, the etchant composition is characterized by including (A) persulfate, (B) Fe 3 + compound, (C) fluorine-containing compound, (D) inorganic acid and (E) water.

When the etchant composition of the present invention has a high wet etching rate, it is possible to easily control the process when a technician wants to form various types of device structures desired by a technician in the process of manufacturing a semiconductor device.

The etching liquid composition of the present invention is an etching liquid composition for batch etching an amorphous silicon (n + a-Si: H) thin film containing impurities and a pure amorphous silicon (a-Si: H) thin film, (A) persulfate, (B ) and Fe 3 + compound, (C) comprising a fluorine compound, (D) an inorganic acid and (E) water. More preferably, the etchant composition is, based on the total weight of the composition, (A) and sulfate from 5.0 to 15.0% by weight, (B) Fe 3 + compound 1.0 to 20.0% by weight, (C) also 0.01 to 10.0% by weight of a fluorine compound , (D) 5.0 to 20.0% by weight of inorganic acid and (E) an amorphous silicon (n + a-Si: H) thin film containing impurities including the remaining amount of water and pure amorphous silicon (a-Si: H) thin film etchant for batch etching It relates to a composition.

(A) Persulfate contained in the etchant composition of the present invention serves to increase the activity of the (C) fluorine-containing compound. The persulfate (A) is included in an amount of 5.0 to 15.0% by weight, preferably 7.0 to 13.0% by weight, based on the total weight of the composition. When the persulfate (A) is included in less than 5.0% by weight relative to the total weight of the composition, insufficient etching may not be sufficient, and when included in excess of 15.0% by weight, the etching rate is faster. Process control is difficult

The (A) persulfate is one or two or more selected from the group consisting of ammonium persulfate, sodium persulfate and potassium persulfate as materials used in this field. Do.

(B) Fe 3 + compound included in the etchant composition of the present invention serves to increase the activity of the (C) fluorine-containing compound. The (B) Fe 3 + compound is included in an amount of 1.0 to 20.0 wt%, preferably 2.0 to 10.0 wt%, based on the total weight of the composition. When the (B) Fe 3 + compound is included in less than 1.0% by weight relative to the total weight of the composition, insufficient etching may not be sufficient, and when included in excess of 20.0% by weight, the etching rate as a whole Faster process control is difficult.

The (B) Fe 3 + compound is provided in the form of a salt containing Fe 3 + as a material used in this field, FeCl 3 , Fe (NO 3 ) 3 , Fe 2 (SO 4 ) 3 , NH 4 Fe (SO 4 ) It is preferably one or two or more selected from the group consisting of 2 , Fe (ClO 4 ) 3 and FePO 4 .

The (C) fluorine-containing compound included in the etchant composition of the present invention refers to a compound capable of dissociating in water to give fluorine ions. The (C) fluorine-containing compound is a main component for etching the amorphous silicon (n + a-Si: H) thin film containing impurities and the pure amorphous silicon (a-Si: H) thin film, and residues inevitably generated in the etching solution. It serves to remove the. The (C) fluorine-containing compound is included in 0.01 to 10.0% by weight, preferably 0.1 to 5.0% by weight based on the total weight of the composition. When the (C) fluorine-containing compound is included in less than 0.01% by weight based on the total weight of the composition, the etching of the amorphous silicon (n + a-Si: H) thin film containing impurities and the pure amorphous silicon (a-Si: H) thin film When the speed is lowered, a partial unetch phenomenon or residue may occur, and when included in excess of 10.0% by weight, an amorphous silicon (n + a-Si: H) thin film containing impurities and pure amorphous silicon (a- The etching performance of the Si: H) thin film is improved, but the process speed is difficult because the etching rate is faster overall.

The (C) fluorine-containing compound is not particularly limited as long as it can be dissociated into fluorine ions or polyatomic fluoride ions in a solution as a substance used in the art. However, the (C) fluorine-containing compound is hydrofluoric acid (HF), ammonium fluoride (NH 4 F), sodium fluoride (NaF), potassium fluoride (KF), ammonium bifluoride (ammonium bifluoride: NH 4 FHF), sodium bifluoride (NaFHF), potassium bifluoride (KFHF), fluoroboric acid (HBF 4 ), aluminum fluoride It is preferably one or two or more selected from the group consisting of fluoride, AlF 3 ), calcium fluoride (CaF 2 ) and hydrofluoric acid (H 2 SiF 6 ).

The (D) inorganic acid included in the etchant composition of the present invention has no residue after etching the amorphous silicon (n + a-Si: H) thin film and the pure amorphous silicon (a-Si: H) thin film containing impurities. It is effective to avoid.

The inorganic acid (D) is preferably included in an amount of 5.0 to 20.0% by weight, and 3.0 to 15.0% by weight, based on the total weight of the composition. When the above range is satisfied, the amorphous silicon (n + a-Si: H) thin film and the pure amorphous silicon (a-Si: H) thin film containing impurities are etched in an appropriate amount, and the etching profile is also excellent. When (D) the inorganic acid is included in less than 5.0% by weight relative to the total weight of the composition, the etching rate is lowered may cause a defect in the etching profile, residues may occur. If it exceeds 20.0% by weight, overetching may occur, cracks may occur in the photoresist, and the etching solution may penetrate into the cracks and the wiring may be shorted.

The inorganic acid (D) is preferably one or two or more selected from the group consisting of nitric acid, sulfuric acid, phosphoric acid and perchloric acid.

(E) water contained in the etchant composition of the present invention is contained in the remaining amount so that the total weight of the composition is 100% by weight. Although the said water is not specifically limited, It is preferable to use deionized water. As the water, it is more preferable to use deionized water having a specific resistance value of 18 Pa · cm or more, which shows the degree of removal of ions from the water.

In addition to the above components, a conventional additive may be further added, and examples of the additive include metal ion blocking agents and corrosion inhibitors.

The (A) persulfate, (B) Fe 3 + compound, (C) fluorine-containing compound, (D) inorganic acid and the like used in the present invention can be prepared by a conventionally known method, the etching liquid composition of the present invention It is desirable to have purity for semiconductor processing.

The present invention comprises the steps of laminating a pure amorphous silicon (a-Si: H) thin film on a substrate, and sequentially laminating an amorphous silicon (n + a-Si: H) thin film containing impurities thereon;

Forming a mask pattern having an etched region open on the amorphous silicon (n + a-Si: H) thin film including the impurity; And

Fabrication of an array substrate for a liquid crystal display device comprising the step of collectively etching a pure amorphous silicon (a-Si: H) thin film and an amorphous silicon (n + a-Si: H) thin film containing impurities thereon with an etchant composition It is about a method.

The array substrate for the liquid crystal display may be a thin film transistor (TFT) array substrate. The liquid crystal display array substrate may include a pure amorphous silicon (a-Si: H) thin film layer etched using the etchant composition of the present invention, an amorphous silicon (n + a-Si: H) thin film layer containing impurities, and At least one of a source / drain electrode and a data line.

An embodiment of the method of forming a thin film transistor array substrate of the present invention will be described in detail.

First, a gate electrode is formed on a substrate. The gate electrode functions to control the current between the source and the drain according to the electrical signal transmitted through the gate line. The gate electrode is formed as follows. Usually, a molybdenum (Mo) alloy film is uniformly formed on the substrate by a sputtering method or the like. Thereafter, the molybdenum alloy film is etched and patterned into a predetermined shape. Patterning in the predetermined form is performed by a photolithography method or the like. The gate electrode is not necessarily formed of molybdenum, and may be formed of a metal having a high melting point so as not to be changed by heat generated when the active layer formed of pure amorphous silicon (a-Si: H) thin film is crystallized in a subsequent process. Can be.

Next, a gate insulating film is formed on the gate electrode. The gate insulating layer separates the upper pure amorphous silicon (a-Si: H) thin film and the gate electrode to prevent current flowing into the pure amorphous silicon (a-Si: H) thin film from flowing into the gate electrode.

The gate insulating film is formed as follows. That is, it is uniformly formed on the substrate including the gate electrode by a plasma chemical vapor deposition (CVD) method or the like. The gate insulating layer may be formed using at least one of silicon oxide (SiO 2 ), silicon nitride (SiNx), and silicon oxynitride (SiONx) as an insulating material.

Next, a pure amorphous silicon (a-Si: H) thin film, which is a semiconductor layer, is formed on the gate insulating layer. Pure amorphous silicon (a-Si: H) thin film becomes a path for electric current according to the electrical signal of the gate electrode. Typically, a pure amorphous silicon (a-Si: H) thin film may be uniformly formed on the gate insulating film by a plasma CVD method or the like.

Next, an amorphous silicon (n + a-Si: H) thin film containing impurities is formed on the pure amorphous silicon (a-Si: H) thin film. An amorphous silicon (n + a-Si: H) thin film containing impurities allows current to flow between the pure amorphous silicon (a-Si: H) thin film and the source / drain electrodes. Typically, it may be formed of an amorphous silicon (n + a-Si: H) thin film containing impurities.

Next, a source / drain electrode layer is formed on the amorphous silicon (n + a-Si: H) thin film including the impurity. The source / drain electrode layer is separated into a source electrode and a drain electrode by forming a channel later. The source electrode and the drain electrode serve to transmit electrical signals to the pixels.

As the source / drain electrode layer, for example, a copper metal film may be used. In the present invention, the copper-based metal film refers to a metal film containing copper as a constituent of the film, and is a concept including a multilayer film such as a single film or a double film. More specifically, for example, the copper-based metal film may include a copper molybdenum film or a molybdenum alloy layer including a single layer of copper or a copper alloy, a molybdenum layer, and a copper layer formed on the molybdenum layer and the molybdenum alloy layer. It may be a copper molybdenum alloy film comprising a. The copper alloy or molybdenum alloy may be independently an alloy with at least one metal selected from the group consisting of copper or molybdenum and Ti, Ta, Cr, Ni, Nd and In.

Next, a photoresist is formed according to the array pattern of the thin film transistor. The photoresist is formed in a pattern exposing a portion to be etched from a source / drain electrode layer, an amorphous silicon (n + a-Si: H) thin film containing impurities, and a pure amorphous silicon (a-Si: H) thin film.

After the photoresist is formed, both the amorphous silicon (n + a-Si: H) thin film and the pure amorphous silicon (a-Si: H) thin film containing impurities are etched together in the etching liquid composition of the present invention to form a thin film transistor array substrate. Form.

Hereinafter, the present invention will be described in more detail with reference to Examples and Experimental Examples. These Examples and Experimental Examples are only for illustrating the present invention, and the scope of the present invention is not to be construed as being limited by these Examples and Experimental Examples.

Example  1 to 5 and Comparative example  1 to 4: Etchant  Preparation of the composition

According to the composition described in the following [Table 1], each component was mixed to prepare the etching solution compositions of Examples 1 to 5 and Comparative Examples 1 to 4, respectively.

Ammonium Persulfate Ferric nitrate Ammonium Bifluoride nitric acid Deionized water Example 1 10 5 5 10 Remaining amount Example 2 5 5 5 10 Remaining amount Example 3 10 10 5 10 Remaining amount Example 4 10 5 10 10 Remaining amount Example 5 15 5 5 20 Remaining amount Comparative Example 1 10 5 5 - Remaining amount Comparative Example 2 3 5 5 10 Remaining amount Comparative Example 3 10 - 5 10 Remaining amount Comparative Example 4 10 10 - 10 Remaining amount

(Unit: weight%)

Experimental Example  One: Etching  Property evaluation

A pure amorphous silicon (a-Si: H) thin film was formed on a glass substrate, and a substrate on which an amorphous silicon (n + a-Si: H) thin film containing impurities was stacked on the pure amorphous silicon thin film was prepared. The prepared substrate was etched with the etchant composition of Examples 1 to 5 and Comparative Examples 1 to 4 prepared with the above composition. The etching characteristic evaluation method evaluated the possibility of batch etching of the pure amorphous silicon (a-Si: H) thin film layer and the amorphous silicon (n + a-Si: H) thin film layer containing impurities. Each of the etchant was put into an experimental equipment of a spray etching method (model name: ETCHER (TFT), SEMES), and the temperature was set to 32 ° C. and heated, and then the etching process was performed when the temperature reached 32 ± 0.1 ° C. . The total etching time of the amorphous silicon (n + a-Si: H) thin film containing impurities and the pure amorphous silicon (a-Si: H) thin film is over-etched based on End Point Detection (EPD). Etch) was performed at 15%. The substrate was sprayed, and when the etching was completed, the substrate was ejected, removed, washed with deionized water, dried using a hot air dryer, and removed using a photoresist stripper. After washing and drying, the etching characteristics were evaluated using an electron scanning microscope (SEM; model name: S-4700, manufactured by HITACHI Co., Ltd.), and are shown in the following [Table 2].

The etch characteristics of the critical dimension (CD) skew change, the taper angle, and the damage of the metal oxide film were evaluated, and the results are shown in the following [Table 2].

<Evaluation Criteria>

◎: very good (CD Skew ≤ 0.2㎛, taper angle: 40-60 °)

○: excellent (1 μm <CD Skew ≤ 0.4 μm, taper angle: 30-60 °)

(Triangle | delta): Good (1.5 micrometer <CD Skew <0.6 micrometer, taper angle: 30-60 degrees)

×: bad (residue)

Etching characteristics Amorphous silicon
Si residue
Example 1 ◎ none Example 2 ◎ none Example 3 ◎ none Example 4 ○ none Example 5 ○ none Comparative Example 1 Lower a-Si: H film UNETCH none Comparative Example 2 × has exist Comparative Example 3 × has exist Comparative Example 4 × has exist

Claims (8)

Stacking a pure amorphous silicon (a-Si: H) thin film on the substrate, and sequentially laminating an amorphous silicon (n + a-Si: H) thin film containing impurities thereon;
Forming a mask pattern having an etched region open on the amorphous silicon (n + a-Si: H) thin film including the impurity; And
Fabrication of an array substrate for a liquid crystal display device comprising the step of collectively etching a pure amorphous silicon (a-Si: H) thin film and an amorphous silicon (n + a-Si: H) thin film containing impurities thereon with an etchant composition In the method,
The etchant composition, (A) 7.0 to 13.0% by weight of the persulfate, (B) 1.0 to 20.0% by weight of the Fe 3+ compound, (C) 0.01 to 10.0% by weight of the fluorine-containing compound, (D) inorganic acid 5.0 to 20.0% by weight and (E) water balance,
The persulfate is ammonium persulfate, characterized in that the manufacturing method of the array substrate for a liquid crystal display device. The method according to claim 1,
The array substrate for liquid crystal display device is a thin film transistor (TFT) array substrate, characterized in that the manufacturing method of the array substrate for liquid crystal display device. Regarding the total weight of the composition,
(A) 7.0-13.0 wt% persulfate;
(B) 1.0-20.0 wt.% Fe 3+ compound;
(C) 0.01 to 10.0 wt% of the fluorine-containing compound;
(D) 5.0 to 20.0 weight percent of inorganic acid; And
(E) water remaining,
The persulfate is characterized in that the ammonium persulfate (Ammonium Persulfate), the amorphous silicon (n + a-Si: H) thin film containing impurities and pure amorphous silicon (a-Si: H) thin film etching liquid composition for batch etching. delete The method according to claim 3, wherein the (B) Fe 3 + compound is FeCl 3 , Fe (NO 3 ) 3 , Fe 2 (SO 4 ) 3 , NH 4 Fe (SO 4 ) 2 , Fe (ClO 4 ) 3 , and FePO Etch liquid composition for batch etching of amorphous silicon (n + a-Si: H) thin film and pure amorphous silicon (a-Si: H) thin film containing impurities, characterized in that one or two or more selected from the group consisting of 4 . The method of claim 3, wherein the (C) fluorine-containing compound is hydrofluoric acid (HF), ammonium fluoride (ammonium fluoride (NH 4 F), sodium fluoride (NaF), potassium fluoride (KF), Ammonium bifluoride (NH 4 FHF), sodium bifluoride (NaFHF), potassium bifluoride (KFHF), fluoroboric acid (HBF 4 ), fluoride The impurity may be one or two or more selected from the group consisting of aluminum fluoride (AlF 3 ), calcium fluoride (CaF 2 ) and hydrofluoric acid (H 2 SiF 6 ). Etch liquid composition for batch etching of the included amorphous silicon (n + a-Si: H) thin film and pure amorphous silicon (a-Si: H) thin film. The amorphous silicon (n + a-Si: H) thin film containing impurities according to claim 3, wherein (D) the inorganic acid is one or two or more selected from the group consisting of nitric acid, sulfuric acid, phosphoric acid, and perchloric acid. Etch liquid composition for pure amorphous silicon (a-Si: H) thin film batch etching. A pure amorphous silicon (a-Si: H) thin film layer etched using the etchant composition according to any one of claims 3 and 5 to 7, and an amorphous silicon (n + a-Si: H) thin film containing impurities An array substrate for a liquid crystal display device comprising at least one of a layer and a source / drain electrode and a data line.
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