KR101892624B1 - Texture etching solution composition and texture etching method of crystalline silicon wafers - Google Patents
Texture etching solution composition and texture etching method of crystalline silicon wafers Download PDFInfo
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- KR101892624B1 KR101892624B1 KR1020140031098A KR20140031098A KR101892624B1 KR 101892624 B1 KR101892624 B1 KR 101892624B1 KR 1020140031098 A KR1020140031098 A KR 1020140031098A KR 20140031098 A KR20140031098 A KR 20140031098A KR 101892624 B1 KR101892624 B1 KR 101892624B1
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K13/00—Etching, surface-brightening or pickling compositions
- C09K13/02—Etching, surface-brightening or pickling compositions containing an alkali metal hydroxide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
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Abstract
본 발명은 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물 및 텍스쳐 에칭방법에 관한 것으로, 보다 상세하게는 알칼리 화합물, 화학식 1의 화합물 및 다당류를 포함함으로써, 결정성 실리콘 웨이퍼의 표면에 미세 피라미드 구조를 형성함에 있어서 실리콘 결정 방향에 대한 에칭 속도의 차이를 제어하여 알칼리 화합물에 의한 과에칭을 방지함으로써 위치별 텍스쳐의 품질 편차를 최소화하여 광 효율을 증가시키는 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물 및 텍스쳐 에칭방법에 관한 것이다.TECHNICAL FIELD The present invention relates to a texture etchant composition for a crystalline silicon wafer and a method for etching the same, and more particularly, to a method for etching a crystalline silicon wafer, which comprises forming a fine pyramid structure on the surface of a crystalline silicon wafer by including an alkali compound, To a texture etchant composition and a texture etching method of a crystalline silicon wafer for improving the light efficiency by minimizing the quality deviation of the texture by position by controlling the difference in the etching rate with respect to the silicon crystal direction to prevent over etching by the alkali compound .
Description
본 발명은 결정성 실리콘 웨이퍼 표면의 위치별 텍스쳐 품질 편차를 최소화하고 에칭 중 온도 구배가 발생하지 않는 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물 및 텍스쳐 에칭방법에 관한 것이다.
The present invention relates to a texture etchant composition and a texture etching method for a crystalline silicon wafer that minimizes texture quality deviations of the surface of a crystalline silicon wafer and does not cause a temperature gradient during etching.
최근 들어 급속하게 보급되고 있는 태양 전지는 차세대 에너지원으로 클린 에너지인 태양 에너지를 직접 전기로 변환하는 전자 소자이다. 태양 전지는 실리콘에 붕소를 첨가한 P형 실리콘 반도체를 기본으로 하여 그 표면에 인을 확산시켜 N형 실리콘 반도체층을 형성시킨 PN 접합 반도체 기판으로 구성되어 있다.Solar cells, which are rapidly spreading in recent years, are electronic devices that convert solar energy, which is a clean energy source, directly into electricity. The solar cell is composed of a p-type silicon semiconductor in which boron is added to silicon, and a pn junction semiconductor substrate in which phosphorus is diffused on its surface to form an n-type silicon semiconductor layer.
PN 접합에 의해 전계가 형성된 기판에 태양광과 같은 빛을 조사할 경우 반도체 내의 전자(-)와 정공(+)이 여기되어 반도체 내부를 자유로이 이동하는 상태가 되며, 이러한 PN 접합에 의해 생긴 전계에 들어오게 되면 전자(-)는 N형 반도체에, 정공(+)은 P형 반도체에 이르게 된다. P형 반도체와 N형 반도체 표면에 전극을 형성하여 전자를 외부회로로 흐르게 하면 전류가 발생하게 되는데, 이와 같은 원리로 태양 에너지가 전기 에너지로 변환된다. 따라서 태양 에너지의 변환 효율을 높이기 위해서 PN 접합 반도체 기판의 단위 면적당 전기적 출력을 극대화시켜야 하며, 이를 위해서 반사율은 낮게 하고 광 흡수량은 최대화시켜야 한다. 이러한 점을 고려하여 PN 접합 반도체 기판을 구성하는 태양전지용 실리콘 웨이퍼의 표면을 미세 피라미드 구조로 형성시키고 반사 방지막을 처리하고 있다. 미세 피라미드 구조로 텍스쳐링된 실리콘 웨이퍼의 표면은 넓은 파장대를 갖는 입사광의 반사율을 낮춰 기 흡수된 광의 강도를 증가시킴으로써 태양전지의 성능, 즉 효율을 높일 수 있게 된다.When a light such as sunlight is irradiated to a substrate formed with an electric field by PN junction, electrons (-) and holes (+) in the semiconductor are excited to move freely in the semiconductor, and the electric field generated by the PN junction When it comes in, the electrons (-) lead to the N-type semiconductor and the positive (+) lead to the P-type semiconductor. When an electrode is formed on the surface of a p-type semiconductor and an n-type semiconductor and an electron flows to an external circuit, a current is generated. This principle converts solar energy into electrical energy. Therefore, in order to increase the conversion efficiency of solar energy, the electrical output per unit area of the PN junction semiconductor substrate must be maximized. For this, the reflectance should be lowered and the light absorption amount should be maximized. In consideration of this point, the surface of the silicon wafer for a solar cell constituting the PN junction semiconductor substrate is formed into a fine pyramid structure and the antireflection film is processed. The surface of a silicon wafer textured with a fine pyramid structure lowers the reflectance of incident light having a wide wavelength band to increase the intensity of the absorbed light, thereby enhancing the performance, i.e., efficiency, of the solar cell.
실리콘 웨이퍼 표면을 미세 피라미드 구조로 텍스쳐하는 방법으로, 미국특허 제4,137,123호에는 0-75부피%의 에틸렌글리콜, 0.05-50중량%의 수산화칼륨 및 잔량의 물을 포함하는 이방성 에칭액에 0.5-10중량%의 실리콘이 용해된 실리콘 텍스쳐 에칭액이 개시되어 있다. 그러나, 이 에칭액은 피라미드 형성 불량을 일으켜 광 반사율을 증가시키고 효율의 저하를 초래할 수 있다.US Pat. No. 4,137,123 discloses a method of texturing a surface of a silicon wafer with a fine pyramid structure by adding 0.5 to 10 wt. % Of silicon is dissolved in a solvent. However, this etchant may cause pyramid formation failure to increase the light reflectance and lower the efficiency.
또한, 한국등록특허 제0180621호에는 수산화칼륨 용액 0.5-5%, 이소프로필알코올 3-20부피%, 탈이온수 75-96.5부피%의 비율로 혼합된 텍스쳐 에칭 용액이 개시되어 있고, 미국특허 제6,451,218호에는 알칼리 화합물, 이소프로필알코올, 수용성 알카리성 에틸렌글리콜 및 물을 포함하는 텍스쳐 에칭 용액이 개시되어 있다. 그러나, 이들 에칭 용액은 비점이 낮은 이소프로필알코올을 포함하고 있어 텍스쳐 공정 중 이를 추가 투입해야 하므로 생산성 및 비용 면에서 경제적이지 못하며, 추가 투입된 이소프로필알코올로 인해 에칭액의 온도 구배가 발생하여 실리콘 웨이퍼 표면의 위치별 텍스쳐 품질 편차가 커져 균일성이 떨어질 수 있다.
Korean Patent No. 0180621 discloses a texture etching solution mixed at a ratio of 0.5-5% of a potassium hydroxide solution, 3-20% by volume of isopropyl alcohol and 75-96.5% by volume of deionized water, and US Patent No. 6,451,218 Discloses a texturing etch solution comprising an alkaline compound, isopropyl alcohol, water soluble alkaline ethylene glycol and water. However, since these etching solutions contain isopropyl alcohol having a low boiling point, they are not economical from the viewpoint of productivity and cost because they must be added to the etching solution in the texturing process, and the temperature gradient of the etching solution is generated due to the added isopropyl alcohol, And the uniformity of the texture may be deteriorated.
본 발명은 결정성 실리콘 웨이퍼의 표면에 미세 피라미드 구조를 형성함에 있어서, 실리콘 결정 방향에 대한 에칭 속도의 차이를 제어하여 알칼리 화합물에 의한 과에칭을 방지함으로써 위치별 텍스쳐의 품질 편차를 최소화하여 광 효율을 증가시키는 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물을 제공하는 것을 목적으로 한다.In forming a fine pyramid structure on the surface of a crystalline silicon wafer, the present invention controls the difference in the etching rate with respect to the direction of the silicon crystal to prevent over etching by the alkali compound, thereby minimizing the quality deviation of the texture per position, Which is an object of the present invention, to provide a texture etching liquid composition for a crystalline silicon wafer.
또한, 본 발명은 에칭 공정 중 별도의 에칭액 성분의 투입과 에어레이팅 공정의 적용이 필요 없는 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물을 제공하는 것을 목적으로 한다.Another object of the present invention is to provide a texture etchant composition for a crystalline silicon wafer which does not require the application of a separate etchant component during the etching process and the application of the air-raining process.
또한, 본 발명은 상기 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물을 이용한 텍스쳐 에칭방법을 제공하는 것을 다른 목적으로 한다.
Another object of the present invention is to provide a texture etching method using the texture etching liquid composition of the crystalline silicon wafer.
1. 알칼리 화합물, 하기 화학식 1의 화합물 및 다당류를 포함하는, 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물:1. A textured etchant composition for a crystalline silicon wafer, comprising an alkaline compound, a compound of formula 1, and a polysaccharide:
[화학식 1] [Chemical Formula 1]
(식 중, R은 탄소수 1 내지 6의 알킬기 또는 페닐기이고, X는 서로 독립적으로 수소 또는 메틸기이고, y는 1 내지 3인 정수이고, M은 알칼리 금속임).(Wherein R is an alkyl group having 1 to 6 carbon atoms or a phenyl group, X is independently of each other hydrogen or a methyl group, y is an integer of 1 to 3, and M is an alkali metal).
2. 위 1에 있어서, 상기 M은 나트륨 또는 칼륨인, 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물.2. The texture etchant composition of claim 1, wherein M is sodium or potassium.
3. 위 1에 있어서, 상기 알칼리 화합물은 수산화칼륨, 수산화나트륨, 수산화암모늄, 테트라히드록시메틸암모늄 및 테트라히드록시에틸암모늄으로 이루어진 군에서 선택되는 적어도 하나인 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물.3. The composition of claim 1, wherein the alkali compound is at least one selected from the group consisting of potassium hydroxide, sodium hydroxide, ammonium hydroxide, tetrahydroxymethylammonium, and tetrahydroxyethylammonium.
4. 위 1에 있어서, 상기 다당류는 글루칸계 화합물, 프룩탄계 화합물, 만난계 화합물, 갈락탄계 화합물 및 이들의 금속염으로 이루어진 군에서 선택되는 적어도 하나인 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물.4. The composition of claim 1, wherein the polysaccharide is at least one selected from the group consisting of a glucan compound, a fructan compound, a mannan compound, a galactan compound, and a metal salt thereof.
5. 위 1에 있어서, 상기 다당류는 셀룰로오스, 디메틸아미노에틸셀룰로오스, 디에틸아미노에틸셀룰로오스, 에틸히드록시에틸셀룰로오스, 메틸히드록시에틸셀룰로오스, 4-아미노벤질셀룰로오스, 트리에틸아미노에틸셀룰로오스, 시아노에틸셀룰로오스, 에틸셀룰로오스, 메틸셀룰로오스, 카르복시메틸셀룰로오스, 카르복시에틸셀룰로오스, 히드록시에틸셀룰로오스, 히드록시프로필셀룰로오스, 알긴산, 아밀로오스, 아밀로펙틴, 펙틴, 스타치, 덱스트린, α-시클로덱스트린, β-시클로덱스트린, γ-시클로덱스트린, 히드록시프로필-β-시클로덱스트린, 메틸-β-시클로덱스트린, 덱스트란, 덱스트란설페이트나트륨, 사포닌, 글리코겐, 자이모산, 렌티난, 시조피난 및 이들의 금속염으로 이루어진 군에서 선택된 1종 이상의 글루칸계 화합물인 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물.5. The composition of claim 1 wherein the polysaccharide is selected from the group consisting of cellulose, dimethylaminoethylcellulose, diethylaminoethylcellulose, ethylhydroxyethylcellulose, methylhydroxyethylcellulose, 4-aminobenzylcellulose, triethylaminoethylcellulose, Cellulose derivatives such as cellulose, ethylcellulose, methylcellulose, carboxymethylcellulose, carboxyethylcellulose, hydroxyethylcellulose, hydroxypropylcellulose, alginic acid, amylose, amylopectin, pectin, starch, dextrin,? -Cyclodextrin,? -Cyclodextrin,? 1 selected from the group consisting of cyclodextrin, hydroxypropyl-beta-cyclodextrin, methyl- beta -cyclodextrin, dextran, sodium dextran sulfate, saponin, glycogen, ximosan, lentinan, Crystalline silicon wax, which is a kind of glucan- Texture etching liquid composition of the buffer.
6. 위 1에 있어서, 알칼리 화합물 0.5 내지 5 중량%, 화학식 1의 화합물 0.001 내지 5 중량%, 다당류 0.0001 내지 2 중량% 및 잔량의 물을 포함하는, 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물.6. The composition of claim 1, wherein the composition comprises 0.5 to 5% by weight of an alkaline compound, 0.001 to 5% by weight of a compound of formula (1), 0.0001 to 2% by weight of polysaccharide and a balance of water.
7. 위 1 내지 6 중 어느 한 항의 에칭액 조성물에 의한 결정성 실리콘 웨이퍼의 텍스쳐의 에칭 방법.7. A method of etching a texture of a crystalline silicon wafer with an etchant composition according to any one of claims 1 to 6.
8. 위 7 에 있어서, 상기 에칭액 조성물을 50 내지 100℃의 온도에서 30초 내지 60분 동안 분무시키는 것을 포함하는 에칭 방법.8. The etching method according to 7 above, wherein the etching solution composition is sprayed at a temperature of 50 to 100 DEG C for 30 seconds to 60 minutes.
9. 위 7 에 있어서, 상기 에칭액 조성물에 상기 웨이퍼를 50 내지 100℃의 온도에서 30초 내지 60분 동안 침적시키는 에칭 방법.
9. The etching method according to 7 above, wherein said wafer is immersed in said etching solution composition at a temperature of 50 to 100 DEG C for 30 seconds to 60 minutes.
본 발명의 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물 및 텍스쳐 에칭 방법에 따르면 실리콘 결정 방향에 대한 에칭 속도의 차이를 제어하여 알칼리 화합물에 의한 과에칭을 방지함으로써 결정성 실리콘 웨이퍼 표면의 위치별 텍스쳐의 품질 편차를 최소화, 즉 텍스쳐의 균일성을 향상시켜 태양광의 흡수량을 극대화시킨다.
According to the texture etchant composition and the texture etching method of the crystalline silicon wafer of the present invention, the difference in the etching rate with respect to the direction of the silicon crystal is controlled to prevent the overetching by the alkali compound, To maximize the absorption of sunlight by improving the uniformity of the texture.
도 1은 본 발명의 실시예에 따른 실리콘 웨이퍼의 연속 에칭방법을 나타낸 흐름도이다.
도 2는 실시예 1의 에칭액을 사용하여 연속 에칭을 행한 후의 초기 에칭 공정을 거친 기판과 마지막 에칭 공정을 거친 기판 표면의 전자현미경 사진이다.
도 3는 실시예 6의 에칭액을 사용하여 연속 에칭을 행한 후의 마지막 에칭 공정을 거친 기판 표면을 찍은 사진이다.
도 4는 비교예 1의 에칭액을 사용하여 연속 에칭을 행한 후의 초기 에칭 공정을 거친 기판과 마지막 에칭 공정을 거친 기판 표면의 전자현미경 사진이다.
도 5는 비교예 3의 에칭액을 사용하여 연속 에칭을 행한 후의 마지막 에칭 초기 에칭 공정을 거친 기판과 마지막 에칭 공정을 거친 표면을 찍은 사진이다.1 is a flowchart showing a continuous etching method of a silicon wafer according to an embodiment of the present invention.
Fig. 2 is an electron micrograph of the surface of a substrate subjected to an initial etching process and a final etching process after successive etching using the etching solution of Example 1. Fig.
3 is a photograph of the surface of the substrate after the last etching process after the continuous etching using the etching liquid of Example 6 is performed.
FIG. 4 is an electron micrograph of the surface of a substrate subjected to an initial etching process and a final etching process after continuous etching using the etching solution of Comparative Example 1. FIG.
5 is a photograph of a surface of a substrate subjected to the last etching initial etching process after the continuous etching process using the etching liquid of Comparative Example 3 and a surface subjected to the last etching process.
본 발명은 알칼리 화합물, 화학식 1의 화합물 및 다당류를 포함함으로써, 결정성 실리콘 웨이퍼의 표면에 미세 피라미드 구조를 형성함에 있어서 실리콘 결정 방향에 대한 에칭 속도의 차이를 제어하여 알칼리 화합물에 의한 과에칭을 방지하고, 다당류에 의해 연속 공정시 에칭 공정 수의 증가에 따라 텍스쳐 품질을 안정적으로 유지시켜 위치별 텍스쳐의 품질 편차를 최소화하여 광 효율을 증가시키는 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물 및 텍스쳐 에칭방법에 관한 것이다.
The present invention includes an alkaline compound, a compound of formula (1) and a polysaccharide to control the difference in etching rate with respect to the direction of silicon crystal in forming a fine pyramid structure on the surface of a crystalline silicon wafer, And a texture etching liquid composition and a texture etching method of a crystalline silicon wafer for increasing the light efficiency by minimizing the quality deviation of the texture per position by stably maintaining the texture quality in accordance with an increase in the number of etching processes in the continuous process by the polysaccharide will be.
이하, 본 발명을 상세히 설명하기로 한다.Hereinafter, the present invention will be described in detail.
본 발명의 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물은 알칼리 화합물, 하기 화학식 1의 화합물 및 다당류를 포함한다.The texture etchant composition of the crystalline silicon wafer of the present invention comprises an alkali compound, a compound of the following formula (I) and a polysaccharide.
[화학식 1] [Chemical Formula 1]
상기 화학식 1에서, R은 탄소수 1 내지 6의 알킬기 또는 페닐기이고, X는 서로 독립적으로 수소 또는 메틸기이고, y는 1 내지 3인 정수이고, M은 알칼리 금속이며 바람직하게는 M은 나트륨 또는 칼륨이다.R is an alkyl group or a phenyl group having 1 to 6 carbon atoms, X is independently hydrogen or a methyl group, y is an integer of 1 to 3, M is an alkali metal, and preferably M is sodium or potassium .
본 발명에 따른 상기 화학식 1의 화합물은 실리콘 결정방향인 (100), (111)면에 대한 보다 우수한 에칭 속도의 제어 능력을 나타내고, 특히 알칼리 화합물에 의한 단결정 Si 에칭 시 단결정 Si 표면에 흡착되어 수산화기에 의한 (100) 방향의 에칭 속도를 억제하여, 알칼리 화합물에 의한 과에칭을 방지함으로써 텍스쳐의 품질 편차를 최소화하고, 또한, 결정성 실리콘 웨이퍼 표면의 젖음성을 개선시켜 에칭에 의해 생성된 수소 버블을 실리콘 표면으로부터 빨리 떨어뜨림으로써 버블 스틱 현상이 발생하는 것을 방지하여 텍스쳐의 품질을 향상시킬 수 있다. The compound of Chemical Formula 1 according to the present invention exhibits a better controllability of the etching rate on the (100) plane and the (111) plane, which are the directions of the silicon crystal. Particularly, when the single crystal Si is etched by the alkali compound, The etching rate in the (100) direction by the alkaline compound is prevented to prevent the over etching by the alkali compound, thereby minimizing the quality deviation of the texture and improving the wettability of the surface of the crystalline silicon wafer, It is possible to prevent the occurrence of the bubble stick phenomenon by rapidly dropping from the silicon surface, thereby improving the quality of the texture.
본 발명에 따른 상기 화학식 1의 화합물의 제조방법의 일 구현 예로는 하기 반응식 1를 들 수 있다.One embodiment of the process for preparing the compound of formula (1) according to the present invention includes the following reaction formula (1).
[반응식1][Reaction Scheme 1]
즉, 폴리에틸렌글리콜과 R의 에테르 화합물에 알칼리금속이나 이들의 염 또는 수산화물을 반응시켜 얻을 수 있다. 본 발명의 일 구현 예로는, 알칼리 금속염(예: 알칼리금속의 하이드라이드(hydride) 화합물)이나 알칼리금속을 사용하는 것이 알칼리금속의 수산화물을 사용하는 것보다 미 반응물 생성이 적어 더욱 바람직할 수 있다.That is, it can be obtained by reacting an ether compound of polyethylene glycol and R with an alkali metal or a salt or hydroxide thereof. In an embodiment of the present invention, the use of an alkali metal salt (for example, a hydride compound of an alkali metal) or an alkali metal may be more preferable because less unreacted products are produced than using a hydroxide of an alkali metal.
본 발명에 따른 화학식 1의 화합물은 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물 총 중량 대비 0.001 내지 5 중량%로 포함될 수 있으며, 바람직하게는 0.01 내지 2 중량%일 수 있다. 함량이 상기 범위에 해당되는 경우 과에칭과 에칭 가속화를 효과적으로 방지할 수 있다. 함량이 0.001 중량% 미만인 경우 알칼리 화합물에 의한 에칭 속도의 제어가 어려워져 균일한 텍스쳐 형상을 얻기 어려울 수 있고 5 중량% 초과인 경우 알칼리 화합물에 의한 에칭 속도를 급격하게 저하시켜 원하는 미세 피라미드를 형성하기 어려울 수도 있다.The compound of formula (I) according to the present invention may be contained in an amount of 0.001 to 5% by weight, preferably 0.01 to 2% by weight, based on the total weight of the texture etching liquid composition of the crystalline silicon wafer. When the content falls within the above range, etching and etching acceleration can be effectively prevented. When the content is less than 0.001% by weight, it is difficult to control the etching rate by the alkaline compound, and it is difficult to obtain a uniform texture shape. When the content exceeds 5% by weight, the etching rate by the alkali compound is rapidly lowered to form the desired fine pyramid It may be difficult.
본 발명에 따른 알칼리 화합물은 결정성 실리콘 웨이퍼의 표면을 에칭하는 성분으로서 당분야에서 통상적으로 사용하는 알칼리 화합물이라면 제한 없이 사용될 수 있다. 사용 가능한 알칼리 화합물로는 수산화칼륨, 수산화나트륨, 수산화암모늄, 테트라히드록시메틸암모늄, 테트라히드록시에틸암모늄 등을 들 수 있으며, 이 중에서 수산화칼륨, 수산화나트륨이 바람직하다. 이들은 단독 또는 2종 이상 혼합하여 사용할 수 있다.The alkaline compound according to the present invention can be used without limitation as long as it is an alkaline compound commonly used in the art as a component for etching the surface of a crystalline silicon wafer. Examples of the alkali compound that can be used include potassium hydroxide, sodium hydroxide, ammonium hydroxide, tetrahydroxymethylammonium, and tetrahydroxyethylammonium. Of these, potassium hydroxide and sodium hydroxide are preferable. These may be used alone or in combination of two or more.
알칼리 화합물은 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물 총 중량 대비 0.5 내지 5 중량%로 포함될 수 있고, 바람직하게는 1 내지 3 중량%일 수 있다. 함량이 상기 범위에 해당되는 경우 실리콘 웨이퍼 표면을 에칭할 수 있게 된다.The alkali compound may be contained in an amount of 0.5 to 5% by weight, and preferably 1 to 3% by weight based on the total weight of the texture etching liquid composition of the crystalline silicon wafer. When the content falls within the above range, the surface of the silicon wafer can be etched.
본 발명에 따른 다당류(polysaccharide)는 단당류 2개 이상이 글리코시드 결합하여 큰 분자를 만들고 있는 당류로서, 알칼리 화합물에 의한 과에칭과 에칭 가속화를 방지함으로써 균일한 미세 피라미드를 형성하는 동시에 에칭에 의해 생성된 수소 버블을 실리콘 웨이퍼 표면으로부터 빨리 떨어뜨려 버블 스틱 현상을 방지하는 성분이다.The polysaccharide according to the present invention is a saccharide in which two or more monosaccharides are linked by glycosidic bonds to form a large molecule. It prevents over-etching and etching from being caused by an alkali compound, thereby forming a uniform fine pyramid, Hydrogen bubbles are quickly dropped from the surface of the silicon wafer to prevent the bubble stick phenomenon.
다당류로는 글루칸계(glucan) 화합물, 프룩탄계(fructan) 화합물, 만난계(mannan) 화합물, 갈락탄계(galactan) 화합물 또는 이들의 금속염 등을 들 수 있으며, 이 중에서 글루칸계 화합물과 이의 금속염(예컨대, 알칼리 금속염)이 바람직하다. 이들은 단독 또는 2종 이상 혼합하여 사용할 수 있다.Examples of the polysaccharide include a glucan compound, a fructan compound, a mannan compound, a galactan compound, or a metal salt thereof. Among them, a glucan compound and its metal salt (for example, , Alkali metal salts) are preferable. These may be used alone or in combination of two or more.
글루칸계 화합물로는 셀룰로오스, 디메틸아미노에틸셀룰로오스, 디에틸아미노에틸셀룰로오스, 에틸히드록시에틸셀룰로오스, 메틸히드록시에틸셀룰로오스, 4-아미노벤질셀룰로오스, 트리에틸아미노에틸셀룰로오스, 시아노에틸셀룰로오스, 에틸셀룰로오스, 메틸셀룰로오스, 카르복시메틸셀룰로오스, 카르복시에틸셀룰로오스, 히드록시에틸셀룰로오스, 히드록시프로필셀룰로오스, 알긴산, 아밀로오스, 아밀로펙틴, 펙틴, 스타치, 덱스트린, α-시클로덱스트린, β-시클로덱스트린, γ-시클로덱스트린, 히드록시프로필-β-시클로덱스트린, 메틸-β-시클로덱스트린, 덱스트란, 덱스트란설페이트나트륨, 사포닌, 글리코겐, 자이모산, 렌티난, 시조피난 또는 이들의 금속염 등을 들 수 있다.Examples of the glucan compound include cellulose, dimethylaminoethylcellulose, diethylaminoethylcellulose, ethylhydroxyethylcellulose, methylhydroxyethylcellulose, 4-aminobenzylcellulose, triethylaminoethylcellulose, cyanoethylcellulose, ethylcellulose, But are not limited to, cellulose, carboxymethylcellulose, carboxyethylcellulose, hydroxyethylcellulose, hydroxypropylcellulose, alginic acid, amylose, amylopectin, pectin, starch, dextrin,? -Cyclodextrin,? -Cyclodextrin, Cyclodextrin, methyl- beta -cyclodextrin, dextran, sodium dextran sulfate, saponin, glycogen, zymo acid, lentinan, sijofinan or metal salts thereof.
다당류는 평균 분자량이 5,000 내지 1,000,000인 것일 수 있으며, 바람직하게 50,000 내지 200,000인 것이 좋다.The polysaccharide may have an average molecular weight of 5,000 to 1,000,000, preferably 50,000 to 200,000.
다당류는 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물 총 중량 대비 0.0001 내지 2 중량%로 포함될 수 있으며, 바람직하게는 0.001 내지 0.1 중량%인 것이 좋다. 함량이 상기 범위에 해당되는 경우 과에칭과 에칭 가속화를 효과적으로 방지할 수 있다. 함량이 2 중량% 초과인 경우 알칼리 화합물에 의한 에칭 속도를 급격하게 저하시켜 원하는 미세 피라미드를 형성하기 어렵다.The polysaccharide may be contained in an amount of 0.0001 to 2% by weight, preferably 0.001 to 0.1% by weight, based on the total weight of the texture etching liquid composition of the crystalline silicon wafer. When the content falls within the above range, etching and etching acceleration can be effectively prevented. When the content is more than 2% by weight, the etching rate by the alkali compound is rapidly lowered, and it is difficult to form the desired fine pyramid.
본 발명에 따른 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물은 상기 성분들을 구체적인 필요에 따라 적절하게 채택한 후, 물을 첨가하여 전체 조성을 조절하게 되어 전체 조성물의 잔량은 물이 차지한다. 바람직하게는 상기 성분들이 전술한 함량 범위를 갖도록 조절한다.The texture etchant composition of the crystalline silicon wafer according to the present invention may appropriately employ the above-mentioned components according to specific needs, and then add water to adjust the overall composition, so that the remaining amount of the entire composition is occupied by water. Preferably, the components are adjusted to have the aforementioned content ranges.
물의 종류는 특별히 한정되지 않으나, 탈이온 증류수인 것이 바람직하고, 보다 바람직하게는 반도체 공정용 탈이온 증류수로서 비저항값이 18ΜΩ·㎝이상인 것이 좋다.The kind of water is not particularly limited, but it is preferably deionized distilled water, more preferably deionized distilled water for semiconductor processing, and has a resistivity value of 18 MΩ · cm or more.
선택적으로, 본 발명의 목적, 효과를 손상시키지 않는 범위에서 당분야에 공지된 추가적인 첨가제를 더 포함할 수도 있다. 이러한 성분으로는 점도 조정제, pH 조정제 등을 들 수 있다. Optionally, it may further include additional additives known in the art to the extent that the objects and effects of the present invention are not impaired. Examples of such components include a viscosity adjusting agent and a pH adjusting agent.
상기와 같은 성분을 포함하여 구성되는 본 발명의 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물은, 특히 화학식 1의 화합물 및 다당류를 포함함으로써 실리콘 결정 방향에 대한 에칭 속도의 차이를 제어하여 알칼리 화합물에 의한 과에칭을 방지함으로써 결정성 실리콘 웨이퍼 표면의 위치별 텍스쳐의 품질 편차를 최소화, 즉 텍스쳐의 균일성을 향상시켜 태양광의 흡수량을 극대화시킬 수 있다.
The texture etchant composition of the crystalline silicon wafer of the present invention, which comprises the above-mentioned components, particularly includes the compound of formula (1) and the polysaccharide, thereby controlling the difference in the etching rate with respect to the direction of the silicon crystal, It is possible to minimize the quality variation of the texture of the surface of the crystalline silicon wafer, that is, to improve the uniformity of the texture, thereby maximizing the absorption of sunlight.
본 발명의 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물은 통상의 에칭 공정, 예컨대 딥방식, 분무방식 및 매엽방식의 에칭 공정에 모두 적용 가능하다.The texture etchant composition of the crystalline silicon wafer of the present invention can be applied to a general etching process, for example, a dip process, a spray process, and a sheet-process etching process.
본 발명은 상기 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물을 이용한 결정성 실리콘 웨이퍼의 텍스쳐 에칭방법을 제공한다.The present invention provides a method of etching a crystalline silicon wafer using the texture etchant composition of the crystalline silicon wafer.
결정성 실리콘 웨이퍼의 텍스쳐 에칭방법은 본 발명의 결정성 실리콘웨이퍼의 텍스쳐 에칭액 조성물에 결정성 실리콘 웨이퍼를 침적시키는 단계, 또는 본 발명의 결정성 실리콘웨이퍼의 텍스쳐 에칭액 조성물을 결정성 실리콘 웨이퍼에 분무하는 단계, 또는 상기 두 단계를 모두 포함한다.The method of texturing a crystalline silicon wafer includes the steps of depositing a crystalline silicon wafer on the texture etchant composition of the crystalline silicon wafer of the present invention or by spraying a textured etchant composition of the crystalline silicon wafer of the present invention onto a crystalline silicon wafer Step, or both of the above steps.
침적과 분무의 횟수는 특별히 한정되지 않으며, 침적과 분무를 모두 수행하는 경우 그 순서도 한정되지 않는다.The number of times of deposition and spraying is not particularly limited, and the order of deposition and spraying is not limited.
침적, 분무 또는 침적 및 분무하는 단계는 50 내지 100℃의 온도에서 30초 내지 60분 동안 수행될 수 있다.The step of depositing, spraying or depositing and spraying can be carried out at a temperature of 50 to 100 캜 for 30 seconds to 60 minutes.
상기한 바와 같은 본 발명의 결정성 실리콘 웨이퍼의 텍스쳐 에칭방법은 산소를 공급시키는 별도의 에어레이팅 장비를 도입할 필요가 없어 초기 생산 및 공정 비용 면에서 경제적일 뿐만 아니라 간단한 공정으로도 균일한 미세 피라미드 구조의 형성을 가능하게 한다.
The texture etching method of the crystalline silicon wafer of the present invention as described above is not only economical in terms of initial production and processing cost but also requires no separate airrating equipment for supplying oxygen, Structure.
이하, 본 발명의 이해를 돕기 위하여 바람직한 실시예를 제시하나, 이들 실시예는 본 발명을 예시하는 것일 뿐 첨부된 특허청구범위를 제한하는 것이 아니며, 본 발명의 범주 및 기술사상 범위 내에서 실시예에 대한 다양한 변경 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속하는 것도 당연한 것이다.
It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to be illustrative of the invention and are not intended to limit the scope of the claims. It will be apparent to those skilled in the art that such variations and modifications are within the scope of the appended claims.
실시예Example 및 And 비교예Comparative Example
하기 표 1에 기재된 성분 및 함량에 잔량의 물(H2O)을 첨가하여 결정성 실리콘 웨이퍼의 텍스쳐 에칭액 조성물을 제조하였다.Water and a residual amount of water (H 2 O) were added to the ingredients and the contents shown in Table 1 below to prepare a texture etching solution composition for a crystalline silicon wafer.
화합물(B)
농도(중량%)alkali
The compound (B)
Concentration (% by weight)
농도(중량%)Polysaccharide
Concentration (% by weight)
화합물(B)
농도(중량%)alkali
The compound (B)
Concentration (% by weight)
농도(중량%)Polysaccharide
Concentration (% by weight)
실험예Experimental Example
단결정 실리콘 웨이퍼 (156mmΧ156mm) 를 실시예 1 내지 11 및 비교예 1내지 3의 결정성 실리콘 웨이퍼의 알칼리 에칭액 조성물에 침지시켰다. 이 때 텍스쳐 조건은 온도 80℃, 시간 20분이었다. 18L 용량의 bath에서 각 에칭 공정 마다 20매의 wafer를 사용하였으며, 외관, 에칭량, 반사율의 특성 변화가 발생하는 시점까지 연속 에칭을 실시하였다.
A single crystal silicon wafer (156 mm X 156 mm) was immersed in the alkali etching liquid compositions of the crystalline silicon wafers of Examples 1 to 11 and Comparative Examples 1 to 3. At this time, the texture condition was a temperature of 80 ° C and a time of 20 minutes. 20 sheets of wafers were used for each etching process in a bath having a capacity of 18 L, and continuous etching was performed until the appearance, the etching amount, and the reflectance characteristics were changed.
상기 실시예 및 비교예에서 제조된 결정성 실리콘 웨이퍼의 에칭액 조성물의 텍스쳐 효과를 하기의 방법으로 평가하고, 그 결과를 하기 표 3에 나타내었다.
The texture effects of the etchant compositions of the crystalline silicon wafers prepared in the above Examples and Comparative Examples were evaluated by the following methods, and the results are shown in Table 3 below.
1. 에칭량1. Etching amount
에칭 전후의 웨이퍼의 무게변화를 측정하였다.
The change in weight of the wafer before and after etching was measured.
2. 2. 텍스쳐의Texture 반사율 평가 Reflectance evaluation
에칭된 단결정 실리콘 웨이퍼의 표면에 UV 분광광도계를 이용하여 600nm의 파장대를 갖는 광을 조사했을 때의 반사율을 측정하였으며, 그 결과를 표 2에 나타내었다.
The reflectance of the surface of the etched monocrystalline silicon wafer when irradiated with light having a wavelength band of 600 nm was measured using a UV spectrophotometer, and the results are shown in Table 2.
3. 외관(3. Appearance ( 텍스쳐의Texture 균일성) 평가 Uniformity) evaluation
에칭된 단결정 실리콘 웨이퍼의 표면을 육안으로 확인하여 얼룩, 흰색 반점, 반짝임 등을 불량 유무를 평가하였다.The surface of the etched monocrystalline silicon wafer was visually inspected to evaluate the presence of defects such as stains, white spots, and sparkles.
<평가기준><Evaluation Criteria>
◎: 웨이퍼 전면 피라미드 형성◎: Formation of wafer front pyramid
○: 웨이퍼 일부 피라미드 미형성 (피라미드 구조 미형성 정도 5％ 미만)?: Some of the wafers were not pyramid-formed (less than 5% of the pyramid structure was not formed)
△: 웨이퍼 일부 피라미드 미형성 (피라미드 구조 미형성 정도 5 내지 50％)DELTA: Some of the wafers were not pyramid-formed (degree of pyramidal structure unformed to 5 to 50%)
×: 웨이퍼 피라미드 미형성 (피라미드 미형성 정도 90％ 이상)
X: No wafer pyramid formed (no pyramid formation degree 90% or more)
4. 연속 에칭 공정 수4. Continuous etching process number
초기 에칭 공정의 에칭량, 반사율, 외관을 기준에서 연속 에칭 공정 진행시 에칭량의 변화폭은 ±0.2g 이내, 반사율의 변화폭은 ±1% 이내, 외관에 흰색반점, 얼룩 발생, 반짝임 등이 없는 범위까지의 에칭 공정 수로 평가하였다.The change width of the etching amount is within ± 0.2 g and the variation width of the reflectance is within ± 1% when the continuous etching process is performed on the basis of the etching amount, reflectance, and appearance of the initial etching process. In the range without appearance of white spots, By the number of etching processes.
기판 외관After the final etching process
Board Appearance
표 3 및 도 2 내지 5를 참고하면, 실시예들의 실리콘 웨이퍼 에칭액 조성물은 비교예들의 조성물에 비해 연속 에칭 진행시 에칭 공정수를 늘릴 수 있고, 에칭량 및 반사율의 변화폭이 작다. 또한 단결정 실리콘 웨이퍼의 전면에 매우 작고 균일한 피라미드의 형성 정도가 매우 우수함을 알 수 있다. Referring to Table 3 and FIGS. 2 to 5, the silicon wafer etchant composition of the embodiments can increase the number of etching processes during the continuous etching process compared to the composition of the comparative examples, and the variation in the etching amount and the reflectance is small. It can also be seen that the formation of very small and uniform pyramids on the entire surface of a single crystal silicon wafer is very excellent.
그리고 광학 현미경 또는 SEM 분석을 통해 고배율로 확대하여 시작 에칭 공정과 마지막 에칭 공정의 피라미드 형성 정도를 확인한 결과 연속 에칭 공정이 진행되는 조건에서도 균일하고 텍스쳐 구조의 편차가 적은 피라미드가 형성됨을 확인할 수 있다. It was confirmed by the optical microscope or SEM analysis that the pyramidal formation of the initial etch process and the final etching process was enlarged at a high magnification, and that the pyramid having uniform texture texture deviations was formed even under the continuous etching process.
비교예 1 내지 2는 각각 실시예와 동일 평가조건에서의 결과이며, 균일한 텍스쳐 구조를 형성하지만 연속 에칭의 진행에 따라 피라미드의 크기가 증가하고 연속 에칭 공정의 수가 실시예의 경우보다 낮음을 알 수 있다.Comparative Examples 1 and 2 are the results under the same evaluation conditions as those of Examples and show that although a uniform texture structure is formed, the size of the pyramid increases with the progress of continuous etching and the number of continuous etching processes is lower than that of the embodiment have.
비교예 3은 화학식 1의 화합물을 포함하지 않은 예로서, 연속 에칭 공정 수, 에칭량, 반사율 및 외관 항목이 모두 실시예보다 현저하게 저하되는 것을 알 수 있다.
In Comparative Example 3, the number of continuous etching processes, the amount of etching, the reflectance, and the appearance items were all significantly lowered than in the Examples, without including the compound of Chemical Formula (1).
Claims (9)
[화학식 1]
(식 중, R은 탄소수 1 내지 6의 알킬기 또는 페닐기이고, X는 서로 독립적으로 수소 또는 메틸기이고, y는 1 내지 3인 정수이고, M은 알칼리 금속임).
1. A textured etch solution composition for a crystalline silicon wafer comprising an alkali compound, a compound of formula 1, and a polysaccharide:
[Chemical Formula 1]
(Wherein R is an alkyl group having 1 to 6 carbon atoms or a phenyl group, X is independently of each other hydrogen or a methyl group, y is an integer of 1 to 3, and M is an alkali metal).
The composition of claim 1, wherein M is sodium or potassium.
The composition according to claim 1, wherein the alkali compound is at least one selected from the group consisting of potassium hydroxide, sodium hydroxide, ammonium hydroxide, tetrahydroxymethylammonium, and tetrahydroxyethylammonium.
The composition according to claim 1, wherein the polysaccharide is at least one selected from the group consisting of a glucan compound, a fructan compound, a mannan compound, a galactan compound, and a metal salt thereof.
[4] The composition of claim 1, wherein the polysaccharide is selected from the group consisting of cellulose, dimethylaminoethylcellulose, diethylaminoethylcellulose, ethylhydroxyethylcellulose, methylhydroxyethylcellulose, 4-aminobenzylcellulose, triethylaminoethylcellulose, There may be mentioned cellulose derivatives such as ethylcellulose, methylcellulose, carboxymethylcellulose, carboxyethylcellulose, hydroxyethylcellulose, hydroxypropylcellulose, alginic acid, amylose, amylopectin, pectin, starch, dextrin,? -Cyclodextrin,? -Cyclodextrin, At least one selected from the group consisting of dextrin, hydroxypropyl-beta-cyclodextrin, methyl- beta -cyclodextrin, dextran, sodium dextran sulfate, saponin, glycogen, ximosan, lentinan, Crystalline crystals which are glucan-based compounds Texture etching liquid composition of the silicon wafer.
3. The composition of claim 1, comprising 0.5 to 5% by weight of an alkaline compound, 0.001 to 5% by weight of a compound of formula (1), 0.0001 to 2% by weight of polysaccharide and water in a residual amount.
A method of etching a crystalline silicon wafer by an etching solution composition according to any one of claims 1 to 6.
The etching method according to claim 7, comprising spraying the etchant composition at a temperature of 50 to 100 DEG C for 30 seconds to 60 minutes.
8. The etching method according to claim 7, wherein the wafer is immersed in the etching solution composition at a temperature of 50 to 100 DEG C for 30 seconds to 60 minutes.
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| CN201580010188.0A CN106062132B (en) | 2014-03-07 | 2015-01-28 | The texture etchant and texture etching method of crystallinity silicon chip |
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| US20060011584A1 (en) | 2002-09-13 | 2006-01-19 | Mitsushi Itano | Etchant and etching method |
| JP2010141139A (en) | 2008-12-11 | 2010-06-24 | Shinryo Corp | Etchant for silicon substrate, and surface processing method for silicon substrate |
| US20110081742A1 (en) | 2009-09-24 | 2011-04-07 | Rohm And Haas Electronic Materials Llc | Texturing semiconductor substrates |
| EP2372779A2 (en) | 2010-04-01 | 2011-10-05 | SolarWorld Industries America, Inc. | Alkaline etching liquid for texturing a silicon wafer surface |
| JP2013143404A (en) | 2012-01-06 | 2013-07-22 | Mitsubishi Electric Corp | Silicon substrate etching method |
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| US20060011584A1 (en) | 2002-09-13 | 2006-01-19 | Mitsushi Itano | Etchant and etching method |
| JP2010141139A (en) | 2008-12-11 | 2010-06-24 | Shinryo Corp | Etchant for silicon substrate, and surface processing method for silicon substrate |
| US20110081742A1 (en) | 2009-09-24 | 2011-04-07 | Rohm And Haas Electronic Materials Llc | Texturing semiconductor substrates |
| EP2372779A2 (en) | 2010-04-01 | 2011-10-05 | SolarWorld Industries America, Inc. | Alkaline etching liquid for texturing a silicon wafer surface |
| JP2013143404A (en) | 2012-01-06 | 2013-07-22 | Mitsubishi Electric Corp | Silicon substrate etching method |
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