KR101868510B1 - Deserializing and data processing unit of uhd signal - Google Patents
Deserializing and data processing unit of uhd signal Download PDFInfo
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- KR101868510B1 KR101868510B1 KR1020170021346A KR20170021346A KR101868510B1 KR 101868510 B1 KR101868510 B1 KR 101868510B1 KR 1020170021346 A KR1020170021346 A KR 1020170021346A KR 20170021346 A KR20170021346 A KR 20170021346A KR 101868510 B1 KR101868510 B1 KR 101868510B1
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- South Korea
- Prior art keywords
- signal
- data
- audio
- decoder
- tmds
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/236—Assembling of a multiplex stream, e.g. transport stream, by combining a video stream with other content or additional data, e.g. inserting a URL [Uniform Resource Locator] into a video stream, multiplexing software data into a video stream; Remultiplexing of multiplex streams; Insertion of stuffing bits into the multiplex stream, e.g. to obtain a constant bit-rate; Assembling of a packetised elementary stream
- H04N21/23602—Multiplexing isochronously with the video sync, e.g. according to bit-parallel or bit-serial interface formats, as SDI
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0125—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level one of the standards being a high definition standard
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/015—High-definition television systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/16—Analogue secrecy systems; Analogue subscription systems
- H04N7/167—Systems rendering the television signal unintelligible and subsequently intelligible
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
Abstract
Description
The present invention relates to a deserialization and data processing apparatus for a UHD signal, and more particularly to a 4K UHD broadcasting interface of 12G-SDI or HDMI v2.0 with one FPGA (Field Programmable Gate Array) The present invention relates to a desalination and data processing method of a UHD signal which is converted into 80-bit video data, which is a standard format for converting into various transmission formats such as an encoder and a decoder, through processing and I2S-type audio data.
In accordance with the development of broadcasting technology, conventional analog broadcasting is stopped, and instead, the conversion and dissemination of digital broadcasting in which the broadcasting quality is excellent and various information can be transmitted together are rapidly being performed. Recently, ultra high definition digital broadcasting This trial broadcast started.
On the other hand, the interface required for UHD (Ultra High Definition) digital broadcasting has a wide variety of specifications, and a video processing technology capable of easily converting the interface into a single technology is required.
The SMPTE ST-2082-10, SMPTE ST-2081-11, SMPTE ST-2081-11, and SMPTE ST-2081-11, which are implemented by the SMPTE 1-port and the SMPTE ST- SDI 4-port (SMPTE ST-425-5), HDMI v2.0 port, and other 4K broadcasting standards. In such a video processing device, uncompressed broadcast content There is a growing demand for a video processing method for ultra high definition (UHD) digital broadcasting capable of converting video data to an interface desired.
As a related art, there is "a demultiplexer and a demultiplexing method of a digital broadcast receiver for demultiplexing a multiplexed broadcast channel signal (Korea Publication No. 10-2005-0079094; published on Aug. 09, 2005) ".
SUMMARY OF THE INVENTION The present invention is conceived to solve the above-described problems, and it is an object of the present invention to provide a 4K UHD broadcasting interface of 12G-SDI or HDMI v2.0 by using a field programmable gate array (FPGA) Which is a standard format for converting UHD signals into I 2 S type audio data and I 2 S type audio data.
The apparatus for deserializing and processing data of a UHD signal according to the present invention for solving the above-mentioned problems includes a word alignment and channel deskew unit for synchronizing a parallel data channel of an input HDMI signal; A TMDS TERC4 decoder that encodes the video data of the HDMI signal synchronized with the parallel data channel using the TMDS algorithm and encodes the auxiliary data of the HDMI signal using the TERC4 algorithm; An audio decoder for extracting audio data from the encoded auxiliary data; A transceiver for inserting a line number into the
According to another embodiment of the present invention, the word align and the channel desqueue unit include: a bit slip unit for performing a bit slip process on the input HDMI signal; A word aligner for aligning the bit-slip processed HDMI signal to a word boundary; And a desk unit for deskewing the sorted HDMI signal.
According to another embodiment of the present invention, the TMDS TERC4 decoder can generate two decoded TMDS per clock by the encoding.
According to another embodiment of the present invention, the transceiver may indicate that the
According to another embodiment of the present invention, the descrambler may perform NRZI (Non Return to Zero, Inverted) using a linear feedback shift register (LFSR).
According to an embodiment of the present invention, a 4K UHD broadcasting interface of 12G-SDI or HDMI v2.0 is a standard format for converting various transmission formats such as an encoder and a decoder through one FPGA (Field Programmable Gate Array) based video processing It is possible to provide a deserializing and data processing apparatus for a UHD signal which converts 80-bit video data into I 2 S-type audio data.
1 is a configuration diagram of a deserialization and data processing apparatus for a UHD signal according to an embodiment of the present invention.
FIG. 2 and FIG. 3 are flowcharts for explaining a method of deserializing and processing data of a UHD signal according to an embodiment of the present invention.
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, well-known functions or constructions are not described in detail to avoid unnecessarily obscuring the subject matter of the present invention. In addition, the size of each component in the drawings may be exaggerated for the sake of explanation and does not mean a size actually applied.
1 is a configuration diagram of a desialialization and data processing apparatus for a UHD signal according to an embodiment of the present invention.
Hereinafter, with reference to FIG. 1, FIG. 1 illustrates a configuration of a deserializing and data processing apparatus for a UHD signal according to an embodiment of the present invention.
As shown in FIG. 1, an
The Word Alignment and
1, the word alignment and
The
The TMDS
At this time, the TMDS
The
Meanwhile, the
At this time, the
The
At this time, the
The TRS
Receive 170 extracts and outputs video data, synchronization signal, and status information of the aligned 12G-SDI signal.
The
The
The
Therefore, according to the embodiment of the present invention, a standard for converting a 4K UHD broadcasting interface of 12G-SDI or HDMI v2.0 into various transmission formats such as an encoder and a decoder through video processing based on one FPGA (Field Programmable Gate Array) It is possible to provide a deserializing and data processing device of a UHD signal which is converted into 80-bit video data and I2S-type audio data.
FIG. 2 and FIG. 3 are flowcharts for explaining a method of deserializing and processing data of a UHD signal according to an embodiment of the present invention.
First, referring to FIG. 2, a method of deserializing and processing data of a UHD signal according to an embodiment of the present invention will be described.
The word alignment and channel deskew synchronize the parallel data channel of the input HDMI signal (S210).
More specifically, the bit slip unit performs bit slip processing on the input HDMI signal, and the word aligner aligns the bit-slip processed HDMI signal so as to fit the word boundary, and the desk- Desk desk processing can be performed.
Thereafter, the TMDS TERC4 decoder encodes the video data and the auxiliary data of the HDMI signal (S220)
In more detail, the TMDS TERC4 decoder encodes the video data of the HDMI signal synchronized with the parallel data channel using the TMDS algorithm, and encodes the Auxiliary Data of the HDMI signal using the TERC4 algorithm.
At this time, the TMDS TERC4 decoder may generate two decoded TMDSs per clock by the encoding, and the decoded symbols for each clock output may be a high pixel in a low-end FPGA, Clock resolution, and can output 80-bit video data and auxiliary data.
Thereafter, the audio decoder extracts audio data from the encoded auxiliary data (S230).
Accordingly, the multiplexing unit can output the video data of the HDMI signal encoded by the TMDS
3, a method of deserializing and processing a UHD signal according to an exemplary embodiment of the present invention includes inserting a line number into a 12G-SDI signal input by a transceiver, performing CRC check and insertion , And a payload ID insertion process (S310).
At this time, the transceiver can indicate that the
Thereafter, the descrambler performs a data descrambling process on the 12G-SDI signal processed by the transceiver (S320).
At this time, the descrambler can perform NRZI (Non Return to Zero, Inverted) using a linear feedback shift register (LFSR).
Thereafter, the TRS aligner aligns the output data of the descrambled 12G-SDI signal until the bit order of the original video data becomes equal (S330).
Then, the receiver extracts and outputs the video data, the synchronization signal, and the status information of the aligned 12G-SDI signal (S340).
Thereafter, the audio extracting unit extracts audio data from the aligned 12G-SDI signal (S350).
Accordingly, the multiplexing unit can output the video data of the HDMI signal encoded by the TMDS
As described above, according to the embodiment of the present invention, the 4K UHD broadcasting interface of 12G-SDI or HDMI v2.0 is converted into various transmission formats such as an encoder and a decoder through video processing based on one field programmable gate array (FPGA) It is possible to deserialize and process data of UHD signal which is converted into 80 bit video data of standard format and audio data of I2S type.
In the foregoing detailed description of the present invention, specific examples have been described. However, various modifications are possible within the scope of the present invention. The technical spirit of the present invention should not be limited to the above-described embodiments of the present invention, but should be determined by the claims and equivalents thereof.
100: Deserializing and data processing device of UHD signal
110: Word Alignment and Channel Deskew
111: Bit slip section
112: Ward Alliance
113: Desk Queue
120: TMDS TERC4 decoder
130: Audio decoder
140: Transceiver
150: Descrambler
160: TRS Aligner
170: Receive
180: Audio extraction unit
190: Multiplexer (Mux)
Claims (5)
A TMDS TERC4 decoder that encodes the video data of the HDMI signal synchronized with the parallel data channel using the TMDS algorithm and encodes the Auxiliary Data of the HDMI signal using the TERC4 algorithm;
An audio decoder for extracting audio data from the encoded auxiliary data;
A transceiver for inserting a line number into the input 12G-SDI signal, checking and inserting a CRC, and inserting a payload ID;
A descrambler for performing a data descrambling process on the 12G-SDI signal processed by the transceiver;
A TRS aligner for aligning the output data of the descrambled 12G-SDI signal until the bit order of the original video data becomes equal;
A Receive for extracting and outputting the video data, the sync signal, and the status information of the aligned 12G-SDI signal;
An audio extracting unit for extracting audio data from the aligned 12G-SDI signal; And
A multiplexer for outputting video data of the HDMI signal encoded by the TMDS TERC4 decoder and audio of the HDMI signal extracted by the audio decoder or multiplexing the video data extracted in the receiver and the audio data extracted by the audio extractor (Mux)
The word align and channel desqueue units may be configured to < RTI ID =
A bit slip unit for performing a bit slip process on the input HDMI signal;
A word aligner for aligning the bit-slip processed HDMI signal to a word boundary; And
And a desk unit for deskewing the aligned HDMI signal,
The TMDS TERC4 decoder,
Generates two decoded TMDS per clock by the encoding,
The transceiver comprising:
Wherein the input 12G-SDI signal is a specific TRS word.
The descrambler includes:
A deserialization and data processing unit of UHD signal that performs NRZI (Non Return to Zero, Inverted) by using LFSR (Linear Feedback Shift Register).
Priority Applications (2)
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KR1020170021346A KR101868510B1 (en) | 2017-02-17 | 2017-02-17 | Deserializing and data processing unit of uhd signal |
PCT/KR2017/001838 WO2018151353A1 (en) | 2017-02-17 | 2017-02-20 | Uhd signal deserializing and data processing device |
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KR1020170021346A KR101868510B1 (en) | 2017-02-17 | 2017-02-17 | Deserializing and data processing unit of uhd signal |
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JP2011244179A (en) * | 2010-05-18 | 2011-12-01 | Sony Corp | Signal transmission system, connector device, electronic apparatus, and signal transmission method |
KR101571271B1 (en) * | 2015-07-23 | 2015-11-24 | (주)캐스트윈 | Multi Format Ultra High Definition HEVC Encoder/Transcoder |
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KR101600029B1 (en) * | 2014-11-21 | 2016-03-07 | 동천하이테크 주식회사 | Dual type real-time high-quality image restoration and encoding system |
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- 2017-02-20 WO PCT/KR2017/001838 patent/WO2018151353A1/en active Application Filing
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JP2011244179A (en) * | 2010-05-18 | 2011-12-01 | Sony Corp | Signal transmission system, connector device, electronic apparatus, and signal transmission method |
KR101571271B1 (en) * | 2015-07-23 | 2015-11-24 | (주)캐스트윈 | Multi Format Ultra High Definition HEVC Encoder/Transcoder |
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