KR101820675B1 - Multi-layered resistive type multi-point temperature measuring wafer sensor and method for fabricating the same - Google Patents

Multi-layered resistive type multi-point temperature measuring wafer sensor and method for fabricating the same Download PDF

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KR101820675B1
KR101820675B1 KR1020170044617A KR20170044617A KR101820675B1 KR 101820675 B1 KR101820675 B1 KR 101820675B1 KR 1020170044617 A KR1020170044617 A KR 1020170044617A KR 20170044617 A KR20170044617 A KR 20170044617A KR 101820675 B1 KR101820675 B1 KR 101820675B1
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wafer
electrode
unit
resistance
resistive
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KR20170129602A (en
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김태완
강상우
김용규
권수용
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한국표준과학연구원
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/9501—Semiconductor wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements

Abstract

본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서(1)는, 웨이퍼(10) 상에 복수개의 전극배선(21)이 형성되어 이루어지는 전극부(20); 웨이퍼(10) 상에서 전극부(20)와 다른 층에 위치하도록 설치되며, 복수개의 단위저항(31)이 연결배선(32)에 의해 직렬 연결되어 이루어지는 저항부(30); 전극부(20)와 저항부(30) 사이에 설치되는 층간절연층(50); 및 전극배선(21) 각각의 일단이 단위저항(31)들의 양단에 전기적으로 연결되도록 층간절연층(50)의 비아홀에 설치되는 도전플러그(55); 를 포함하여 이루어짐으로써, 전극부(20)를 통하여 저항부(30)에서의 전위차를 측정하여 웨이퍼(10)의 온도 균일도를 간파하는 것을 특징으로 한다. 본 발명에 의하면, 전극부(20)와 저항부(30)가 서로 다른 층에 형성되기 때문에 저항부(30)의 단위저항(31)과 연결배선(32)을 전극부(20)의 방해를 받지 않고 웨이퍼(10)의 전면적에 설치할 수 있다. 따라서 웨이퍼(10)의 전면적에 대해서 온도 균일도를 세밀하게 파악할 수 있게 된다. The multi-layered resistive multi-point temperature measuring wafer sensor 1 according to the present invention comprises: an electrode portion 20 having a plurality of electrode wirings 21 formed on a wafer 10; A resistance portion 30 provided on the wafer 10 so as to be positioned on a layer different from the electrode portion 20 and having a plurality of unit resistors 31 connected in series by a connection wiring 32; An interlayer insulating layer 50 provided between the electrode portion 20 and the resistance portion 30; A conductive plug 55 provided on a via hole of the interlayer insulating layer 50 such that one end of each of the electrode wirings 21 and 21 is electrically connected to both ends of the unit resistors 31; So that the temperature uniformity of the wafer 10 can be detected by measuring the potential difference in the resistance portion 30 through the electrode portion 20. The electrode unit 20 and the resistance unit 30 are formed on different layers so that the unit resistance 31 of the resistance unit 30 and the connection wiring 32 are prevented from interfering with the electrode unit 20 It can be installed on the entire surface of the wafer 10 without receiving it. Therefore, temperature uniformity can be grasped with respect to the entire surface of the wafer 10. [

Description

다층 저항식 다점 온도측정 웨이퍼 센서 및 그 제조방법{Multi-layered resistive type multi-point temperature measuring wafer sensor and method for fabricating the same}BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-layer resistive multi-point temperature measuring wafer sensor,

본 발명은 온도측정 웨이퍼 센서 및 그 제조방법에 관한 것으로서, 특히 웨이퍼의 전면적에 대해 온도 균일도를 세밀하게 파악할 수 있는 다층 저항식 다점 온도측정 웨이퍼 센서 및 그 제조방법에 관한 것이다. The present invention relates to a temperature measuring wafer sensor and a manufacturing method thereof, and more particularly, to a multi-layered resistance type multi-point temperature measuring wafer sensor capable of precisely grasping temperature uniformity with respect to the entire surface of a wafer and a method for manufacturing the same.

반도체 제조공정에서 웨이퍼는 서셉터 상에 올려 놓인 상태에서 서셉터로 부터 열을 전달받아 가열된다. 이 때 서셉터에서 웨이퍼로 열이 전도되는 과정에서 열 손실이 발생되므로 서셉터와 웨이퍼 사이에 온도 차이가 나게 된다. 예컨대, 서셉터의 온도를 1000℃로 세팅하더라도 웨이퍼의 실제 온도는 이 보다 못하게 된다는 것이다. In the semiconductor manufacturing process, the wafer is heated by receiving heat from the susceptor while being placed on the susceptor. In this case, since heat is generated in the process of conducting heat from the susceptor to the wafer, a temperature difference occurs between the susceptor and the wafer. For example, even if the temperature of the susceptor is set to 1000 ° C, the actual temperature of the wafer becomes lower than this.

따라서 웨이퍼의 실제 온도를 정확히 파악할 필요가 있다. 이 때, 웨이퍼 내에서의 온도 균일성이 떨어지면 부분별로 공정조건이 달라지는 결과가 되어 공정 신뢰도가 떨어지게 되기 때문에 웨이퍼 전면적에 대한 온도 균일도를 파악하는 것이 매우 중요하다. Therefore, it is necessary to accurately grasp the actual temperature of the wafer. In this case, if the temperature uniformity in the wafer is lowered, the process conditions are different for each part, and the reliability of the process is lowered. Therefore, it is very important to grasp the temperature uniformity over the entire wafer surface.

이러한 일환으로 여러 가지 테스트 웨이퍼(더미 웨이퍼)가 제안되었다. 일본 특개 제2000-31231호(2000.1.28.공개)에 개시된 웨이퍼 온도측정 장치나, 미국 특허 제7,540,188호(2009.6.2.등록)에 개시된 공정조건 측정장치가 바로 이러한 예들이다. As such, various test wafers (dummy wafers) have been proposed. These are examples of a wafer temperature measuring apparatus disclosed in Japanese Patent Laid-Open No. 2000-31231 (published on Jan. 18, 2000) and a process condition measuring apparatus disclosed in U.S. Patent No. 7,540,188 (registered on June 2, 2009).

상기 일본 특개 제2000-31231호(2000.1.28.공개)에 개시된 웨이퍼 온도측정 장치는 열전대를 이용하는 것으로서 웨이퍼의 오목부에 설치된 측온저항체로부터 소선과 리드선들이 외부 인출되어 이루어지기 때문에 웨이퍼 내에 측온저항체를 많이 설치할 경우 소선과 리드선들이 너무 복잡하게 얽히게 되므로, 측온저항체를 여러 군데에 많이 설치할 수 없다는 단점이 있다. 따라서 웨이퍼의 전면적에 대해 온도 균일도를 세밀하게 파악하는 데에 취약하다. The wafer temperature measuring apparatus disclosed in Japanese Patent Laid-Open Publication No. 2000-31231 (published on Jan. 18, 2000) uses a thermocouple, in which wires and lead wires are drawn out from the RTD provided in the concave portion of the wafer, In case of installing a large number of wires, lead wires and lead wires are entangled too complicatedly, so that there is a disadvantage that a plurality of RTDs can not be installed in many places. Therefore, it is vulnerable to finely grasping the temperature uniformity with respect to the whole area of the wafer.

일본 특개 제2000-31231호(2000.1.28.공개)Japanese Patent Laid-Open No. 2000-31231 (published on Jan. 28, 2000)

따라서 본 발명이 해결하고자 하는 과제는, 웨이퍼의 전면적에 대해 온도 균일도를 세밀하게 파악할 수 있는 다층 저항식 다점 온도측정 웨이퍼 센서 및 그 제조방법을 제공하는 데 있다. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a multi-layered resistive multi-point temperature measuring wafer sensor capable of precisely grasping temperature uniformity with respect to the entire surface of a wafer, and a method of manufacturing the same.

상기 과제를 달성하기 위한 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서는, According to an aspect of the present invention, there is provided a multi-

웨이퍼 상에 복수개의 전극배선이 형성되어 이루어지는 전극부; An electrode portion having a plurality of electrode wirings formed on a wafer;

상기 웨이퍼 상에서 상기 전극부와 다른 층에 위치하도록 설치되며, 복수개의 단위저항이 연결배선에 의해 직렬 연결되어 이루어지는 저항부; A resistive part provided on the wafer so as to be positioned in a layer different from the electrode part and having a plurality of unit resistors connected in series by connection wiring;

상기 전극부와 저항부 사이에 설치되는 층간절연층; 및An interlayer insulating layer provided between the electrode portion and the resistive portion; And

상기 전극배선 각각의 일단이 상기 단위저항 각각의 양단에 전기적으로 연결되도록 상기 층간절연층의 비아홀에 설치되는 도전플러그; 를 포함하여 이루어짐으로써, A conductive plug provided in a via hole of the interlayer insulating layer so that one end of each of the electrode wiring is electrically connected to both ends of each of the unit resistors; And,

상기 전극부를 통하여 상기 저항부에서의 전위차를 측정하여 상기 웨이퍼의 온도 균일도를 간파하는 것을 특징으로 한다. And a potential difference in the resistive portion is measured through the electrode portion to detect the temperature uniformity of the wafer.

상기 저항부는 상기 전극부보다 위에 위치하도록 설치되는 것이 바람직하다. The resistor may be disposed above the electrode.

상기 저항부는 표면에 노출되도록 설치될 수 있다. The resistive portion may be provided so as to be exposed to the surface.

상기 저항부는 선폭이 좁은 부분과 넓은 부분으로 구분되는 금속배선으로 이루어짐으로써 선폭이 좁은 부분이 상기 단위저항의 역할을 하고 선폭이 넓은 부분이 상기 연결배선의 역할을 하도록 하는 것이 바람직하다. The resistive portion may include a narrow line portion and a wide portion of metal wiring, so that a narrow line portion serves as the unit resistance and a wide line portion serves as the connecting wiring.

한편, 상기 전극배선들 각각의 타단을 취합하는 전압측정단자가 상기 웨이퍼에 설치되는 것이 바람직하다. On the other hand, a voltage measuring terminal for collecting the other ends of each of the electrode wirings is preferably provided on the wafer.

상기 과제를 달성하기 위한 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서 제조방법은, According to another aspect of the present invention, there is provided a method of manufacturing a multi-

웨이퍼 상에 복수개의 전극배선으로 이루어지는 전극부를 형성하는 단계;Forming an electrode portion comprising a plurality of electrode wirings on a wafer;

상기 전극부 상에 층간절연층을 형성하는 단계;Forming an interlayer insulating layer on the electrode portion;

상기 전극배선들 각각의 일단이 노출되도록 상기 층간절연층에 복수개의 비아홀을 형성하는 단계;Forming a plurality of via holes in the interlayer insulating layer such that one end of each of the electrode wirings is exposed;

상기 전극배선들과의 전기적 접속을 위하여 상기 비아홀에 도전플러그를 형성하는 단계; 및Forming a conductive plug in the via hole for electrical connection with the electrode wirings; And

선폭이 좁은 부분이 단위저항 역할을 하고 선폭이 넓은 부분이 연결배선 역할을 하도록 선폭이 좁은 부분과 넓은 부분으로 구분되면서 상기 단위저항의 양단이 상기 금속플러그에 전기적으로 접속되는 금속배선을 상기 층간절연층 상에 형성하여 저항부를 얻는 단계; 를 포함하는 것을 특징으로 한다. A metal wiring whose both ends of the unit resistance are electrically connected to the metal plug is divided into a narrow portion and a wide portion so that a portion with a narrow line width serves as a unit resistance and a portion with a wide line width serves as a connecting wiring, Forming a resistive portion on the layer; And a control unit.

본 발명에 의하면, 상기 전극부와 저항부가 서로 다른 층에 형성되기 때문에 상기 저항부의 단위저항과 연결배선을 상기 전극부의 방해를 받지 않고 웨이퍼의 전면적에 설치할 수 있다. 따라서 웨이퍼 전면적에 대해서 온도 균일도를 세밀하게 파악할 수 있게 된다. According to the present invention, since the electrode portion and the resistance portion are formed in different layers, the unit resistance of the resistance portion and the connection wiring can be provided on the entire surface of the wafer without being disturbed by the electrode portion. Therefore, temperature uniformity can be grasped with respect to the entire surface of the wafer.

도 1은 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서(1)를 설명하기 위한 회로도;
도 2는 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서(1)의 구조를 설명하기 위한 도면;
도 3은 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서(1)의 제조방법을 설명하기 위한 도면이다.
1 is a circuit diagram for explaining a multi-layer resistive multi-point temperature measuring wafer sensor 1 according to the present invention;
2 is a diagram for explaining the structure of the multi-layered resistive multi-point temperature measuring wafer sensor 1 according to the present invention;
3 is a view for explaining a method of manufacturing the multi-layered resistive multi-point temperature measuring wafer sensor 1 according to the present invention.

이하에서, 본 발명의 바람직한 실시예를 첨부한 도면들을 참조하여 상세히 설명한다. 아래의 실시예는 본 발명의 내용을 이해하기 위해 제시된 것일 뿐이며 당 분야에서 통상의 지식을 가진 자라면 본 발명의 기술적 사상 내에서 많은 변형이 가능할 것이다. 따라서 본 발명의 권리범위가 이러한 실시예에 한정되는 것으로 해석돼서는 안 된다. Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are merely provided to understand the contents of the present invention, and those skilled in the art will be able to make many modifications within the technical scope of the present invention. Therefore, the scope of the present invention should not be construed as being limited to these embodiments.

도 1은 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서(1)를 설명하기 회로도이다. 도 1에 도시된 바와 같이 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서(1)는 웨이퍼(10) 상에 전극부(20)와 저항부(30)가 설치되어 이루어진다. 1 is a circuit diagram for explaining a multi-layer resistive multi-point temperature measuring wafer sensor 1 according to the present invention. As shown in FIG. 1, the multi-layered resistive multi-point temperature measuring wafer sensor 1 according to the present invention includes an electrode unit 20 and a resistance unit 30 mounted on a wafer 10.

전극부(20)는 복수개의 전극배선(21)을 포함하여 이루어지고, 저항부(30)는 복수개의 단위저항(31)이 연결배선(32)에 의해 직렬 연결되어 이루어진다. 각 전극배선(21)의 일단은 각 단위저항(31)의 양단에 전기적으로 연결되며 타단은 전압측정단자(40)에 취합된다. The electrode unit 20 includes a plurality of electrode wirings 21 and the resistor unit 30 includes a plurality of unit resistors 31 connected in series by connection wirings 32. One end of each electrode wiring 21 is electrically connected to both ends of each unit resistance 31, and the other end is connected to a voltage measuring terminal 40.

웨이퍼(10)에 온도 불균일이 발생하면 제백효과(Zeebeck effect)에 의해 저항부(30)에 전위차가 발생하게 된다. 따라서 전극배선(21)들이 취합되는 전압측정단자(40)를 통하여 각 포인트(P1, P2, Pn)에서의 전위차를 측정하면 어느 부분에서 온도 불균일 발생하였는지 파악할 수 있다.When a temperature variation occurs in the wafer 10, a potential difference occurs in the resistance portion 30 due to the Zeebeck effect. Therefore, when the potential difference at each point P1, P2, Pn is measured through the voltage measurement terminal 40 at which the electrode wirings 21 are collected, it is possible to determine at which portion the temperature unevenness occurred.

이 때, 웨이퍼(10)의 전면적에 대해서 온도 불균일을 세밀하게 파악하기 위해서는 포인트(P1, P2, Pn)의 숫자가 많아야 하는데, 전극부(20)와 저항부(30)가 동일한 평면상에 존재하게 되면 전극배선(21)의 설치를 위해서 직렬저항(31)과 연결배선(32)의 설치공간이 제약을 받을 수밖에 없어 바람직하지 않다. 따라서 전극부(20)와 저항부(30)는 서로 다른 평면상에 배치시키는 것이 바람직하다. At this time, the number of points P1, P2, and Pn must be large in order to precisely grasp the temperature unevenness with respect to the entire surface of the wafer 10. The electrode portion 20 and the resistance portion 30 are present on the same plane It is not preferable because the installation space of the series resistor 31 and the connection wiring 32 is limited for installing the electrode wiring 21. Therefore, it is preferable that the electrode portion 20 and the resistance portion 30 are disposed on different planes.

도 2는 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서(1)의 구조를 설명하기 위한 도면으로서, 도 2a는 측면도이고, 도 2b는 저항부(30)의 평면도이다. Fig. 2 is a view for explaining the structure of the multi-layered resistive multi-point temperature measuring wafer sensor 1 according to the present invention, wherein Fig. 2A is a side view and Fig. 2B is a plan view of the resistance portion 30. Fig.

도 2에 도시된 바와 같이, 전극부(20)는 웨이퍼(10) 상에 복수개의 전극배선선(21)이 병렬적으로 형성됨으로써 이루어진다. 저항부(30)는 층간절연층(50)에 의해 전극부(20)와 다른 층에 위치하도록 설치되며, 복수개의 단위저항(31)이 연결배선(32)에 의해 직렬 연결되어 이루어진다.As shown in FIG. 2, the electrode unit 20 is formed by forming a plurality of electrode wiring lines 21 in parallel on the wafer 10. The resistance unit 30 is disposed in a layer different from that of the electrode unit 20 by the interlayer insulating layer 50 and a plurality of unit resistors 31 are connected in series by the connection wiring 32.

저항부(30)는 선폭이 좁은 부분과 넓은 부분으로 구분되는 금속배선으로 이루어진다. 선폭이 좁은 부분이 단위저항(31)의 역할을 하고 선폭이 넓은 부분이 연결배선(32)의 역할을 한다. 단위저항(31)의 저항이 더 한층 높도록 단위저항(31)은 연결배선(32)보다 긴 것이 바람직하다. 여기서, 금속배선이라 함은 순수한 금속만을 의미하는 것이 아니라 실리사이드와 같이 반도체 분야에서 배선재료로 사용되는 것을 모두 지칭하는 의미이다. The resistor portion 30 is composed of a metal wire which is divided into a narrow portion and a wide portion. The narrow line width serves as the unit resistance 31 and the wide line width serves as the connection wiring 32. [ It is preferable that the unit resistance 31 is longer than the connection wiring 32 so that the resistance of the unit resistance 31 is further higher. Here, the metal wiring does not only mean pure metal but also refers to all that is used as a wiring material in a semiconductor field such as a silicide.

전극배선(21)들의 일단은 층간절연층(50)의 비아홀에 설치되는 도전플러그(55)에 의해서 단위저항(31)들의 양단에 전기적으로 연결된다. One end of each of the electrode wirings 21 is electrically connected to both ends of the unit resistors 31 by a conductive plug 55 provided in a via hole of the interlayer insulating layer 50.

저항부(30)는 전극부(20)의 밑에 위치하는 것보다는 위에 위치하는 것이 더 바람직하다. 왜냐하면, 반도체 소자 제조공정에서 실제 공정이 이루어지는 것은 웨이퍼(10)의 표면이므로 웨이퍼(10) 표면에서의 온도 및 균일도를 파악하는 것이 중요하기 때문이다. It is more preferable that the resistance portion 30 is located above the electrode portion 20 rather than below. This is because it is important to grasp the temperature and the uniformity on the surface of the wafer 10 because it is the surface of the wafer 10 that the actual process is performed in the semiconductor device manufacturing process.

웨이퍼(10)의 온도는 서셉터의 가열을 통해서 뿐만 아니라 공정챔버 내부 분위기 온도에 의해서도 영향을 받기 때문에 공정챔버 내부의 온도가 반영되도록 저항부(30)가 표면에 노출되도록 설치될 수 있다. 물론, 저항부(30)를 이루는 금속배선이 고온에서 산화 등으로 퇴화되지 않도록 저항부(30) 상에 보호층(미도시)이 더 형성될 수도 있다. 금속배선이 퇴화(degradation)되면 정확한 전위차 측정에 오류가 발생할 수 있다. Since the temperature of the wafer 10 is affected not only by the heating of the susceptor but also by the atmospheric temperature inside the process chamber, the resistive portion 30 may be exposed to the surface so that the temperature inside the process chamber is reflected. Of course, a protective layer (not shown) may further be formed on the resistance portion 30 so that the metal wiring forming the resistance portion 30 is not degraded by oxidation or the like at a high temperature. Degradation of the metal wiring can lead to errors in the measurement of the correct potential difference.

도 3은 본 발명에 따른 다층 저항식 다점 온도측정 웨이퍼 센서(1)의 제조방법을 설명하기 위한 도면이다.3 is a view for explaining a method of manufacturing the multi-layered resistive multi-point temperature measuring wafer sensor 1 according to the present invention.

먼저, 도 3a에 도시된 바와 같이 웨이퍼(10) 상에 금속층을 형성한 후에 상기 금속층을 패터닝하여 복수개의 전극배선(21)으로 이루어지는 전극부(20)를 형성한다. First, as shown in FIG. 3A, after a metal layer is formed on the wafer 10, the metal layer is patterned to form an electrode portion 20 composed of a plurality of electrode wirings 21.

다음에, 도 3b에서와 같이 전극부(20) 상에 층간절연층(50)을 형성하고, 전극배선(21)들 각각의 일단이 노출되도록 층간절연층(50)에 비아홀을 형성한 후에 전극배선(21)들과 전기적 접속을 위하여 상기 비아홀에 도전플러그(55)를 형성시킨다. 3B, an interlayer insulating layer 50 is formed on the electrode portion 20, a via hole is formed in the interlayer insulating layer 50 such that one end of each of the electrode wirings 21 is exposed, A conductive plug 55 is formed in the via hole for electrical connection with the wiring lines 21.

이어서, 도 3c에 도시된 바와 같이, 층간절연층(50) 상에 금속층을 형성한 후 상기 금속층을 패터닝함으로써 선폭이 좁은 부분과 넓은 부분으로 구분되는 금속배선으로 이루어지는 저항부(30)를 형성한다. Next, as shown in FIG. 3C, a metal layer is formed on the interlayer insulating layer 50, and the metal layer is patterned to form a resistive portion 30 having a narrow line width and a wide metal line portion .

본 발명에 의하면, 전극부(20)와 저항부(30)가 서로 다른 층에 형성되기 때문에 저항부(30)의 단위저항(31)과 연결배선(32)을 전극부(20)의 방해를 받지 않고 웨이퍼(10)의 전면적에 설치할 수 있다. 따라서 웨이퍼(10)의 전면적에 대해서 온도 균일도를 세밀하게 파악할 수 있게 된다. The electrode unit 20 and the resistance unit 30 are formed on different layers so that the unit resistance 31 of the resistance unit 30 and the connection wiring 32 are prevented from interfering with the electrode unit 20 It can be installed on the entire surface of the wafer 10 without receiving it. Therefore, temperature uniformity can be grasped with respect to the entire surface of the wafer 10. [

1: 다층 저항식 다점 온도측정 웨이퍼 센서
10: 웨이퍼 20: 전극부
21: 전극배선 30: 저항부
31: 단위저항 32: 연결배선부
40: 전압측정단자 1: Multilayer resistive multi-point temperature measurement wafer sensor
10: wafer 20: electrode part
21: electrode wiring 30:
31: unit resistance 32: connection wiring part
40: Voltage measurement terminal

Claims (4)

웨이퍼 상에 복수개의 전극배선이 형성되어 이루어지는 전극부;
상기 웨이퍼 상에서 상기 전극부와 다른 층에 위치하도록 설치되며, 복수개의 단위저항이 연결배선에 의해 직렬 연결되어 이루어지는 저항부;
상기 전극부와 저항부 사이에 설치되는 층간절연층; 및
상기 전극배선 각각의 일단이 상기 단위저항 각각의 양단에 전기적으로 연결되도록 상기 층간절연층의 비아홀에 설치되는 도전플러그; 를 포함하여 이루어짐으로써,
상기 전극부를 통하여 상기 저항부에서의 전위차를 측정하여 상기 웨이퍼의 온도 균일도를 간파하는 것을 특징으로 하는 다층 저항식 다점 온도측정 웨이퍼 센서.
An electrode portion having a plurality of electrode wirings formed on a wafer;
A resistive part provided on the wafer so as to be positioned in a layer different from the electrode part and having a plurality of unit resistors connected in series by connection wiring;
An interlayer insulating layer provided between the electrode portion and the resistive portion; And
A conductive plug provided in a via hole of the interlayer insulating layer so that one end of each of the electrode wiring is electrically connected to both ends of each of the unit resistors; And,
And measures the potential difference in the resistive portion through the electrode portion to detect the temperature uniformity of the wafer.
제1항에 있어서, 상기 저항부가 상기 전극부보다 위에 위치하도록 설치되는 것을 특징으로 하는 다층 저항식 다점 온도측정 웨이퍼 센서.
The multi-layer resistive multi-point temperature measuring wafer sensor according to claim 1, wherein the resistance portion is disposed above the electrode portion.
제2항에 있어서, 상기 저항부가 표면에 노출되도록 설치되는 것을 특징으로 하는 다층 저항식 다점 온도측정 웨이퍼 센서.
The multi-layer resistive multi-point temperature measuring wafer sensor according to claim 2, wherein the resistance portion is provided so as to be exposed to the surface.
제1항에 있어서, 상기 전극배선들 각각의 타단을 취합하는 전압측정단자가 상기 웨이퍼에 설치되는 것을 특징으로 하는 다층 저항식 다점 온도측정 웨이퍼 센서. The multi-layer resistive multi-point temperature measuring wafer sensor according to claim 1, wherein a voltage measuring terminal for collecting the other ends of each of the electrode wirings is provided on the wafer.
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JP2005286237A (en) 2004-03-30 2005-10-13 Nec Electronics Corp Integrated circuit device
KR100690926B1 (en) * 2006-02-03 2007-03-09 삼성전자주식회사 Micro heat flux sensor array
JP2011216540A (en) * 2010-03-31 2011-10-27 Renesas Electronics Corp Semiconductor device and resistance measurement method

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JP2005286237A (en) 2004-03-30 2005-10-13 Nec Electronics Corp Integrated circuit device
KR100690926B1 (en) * 2006-02-03 2007-03-09 삼성전자주식회사 Micro heat flux sensor array
JP2011216540A (en) * 2010-03-31 2011-10-27 Renesas Electronics Corp Semiconductor device and resistance measurement method

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