KR101679230B1 - Polynomial digital predistortion apparatus for compensation of non-linear characteristic of power amplifier and the method thereof - Google Patents

Polynomial digital predistortion apparatus for compensation of non-linear characteristic of power amplifier and the method thereof Download PDF

Info

Publication number
KR101679230B1
KR101679230B1 KR1020150094677A KR20150094677A KR101679230B1 KR 101679230 B1 KR101679230 B1 KR 101679230B1 KR 1020150094677 A KR1020150094677 A KR 1020150094677A KR 20150094677 A KR20150094677 A KR 20150094677A KR 101679230 B1 KR101679230 B1 KR 101679230B1
Authority
KR
South Korea
Prior art keywords
input
polynomial
power
power amplifier
power amplifiers
Prior art date
Application number
KR1020150094677A
Other languages
Korean (ko)
Inventor
성원진
육준형
홍대형
Original Assignee
서강대학교산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 서강대학교산학협력단 filed Critical 서강대학교산학협력단
Priority to KR1020150094677A priority Critical patent/KR101679230B1/en
Application granted granted Critical
Publication of KR101679230B1 publication Critical patent/KR101679230B1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3258—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits based on polynomial terms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3294—Acting on the real and imaginary components of the input signal

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Amplifiers (AREA)

Abstract

A method for compensating nonlinear characteristics of a plurality of power amplifiers connected in series using a polynomial digital predistorter is provided. The linear predistorter compensates nonlinear characteristics of a plurality of power amplifiers connected in series using a polynomial digital predistorter. Output characteristic data of each of the plurality of power amplifiers for each power amplifier, extracts coefficients of the polynomial digital predistorter corresponding to each power amplifier from each input / output characteristic data, and calculates a plurality of polynomial digital predistorter The method of connecting in series and extracting the coefficients of the polynomial digital predistorter is to estimate the input / output characteristics of the polynomial type by applying the Boltera series to the input / output characteristic data, and to perform the LMS (Least Mean Squares) To obtain the coefficients of the polynomial digital predistorter And stores the coefficients according to the address of the amplitude modulation section of the input power, thereby compensating for the nonlinear characteristics of the plurality of power amplifiers.
Therefore, there is an effect of extracting coefficients for a plurality of power amplifiers connected in series, and connecting a plurality of polynomial digital predistorters to which the extracted coefficients are applied, in series, thereby compensating for nonlinear characteristics of various function forms.

Description

TECHNICAL FIELD [0001] The present invention relates to a polynomial digital predistorter for compensating for nonlinear characteristics of a power amplifier, and a polynomial digital predistorter for compensating for nonlinear characteristics of a power amplifier.

The present invention relates to a polynomial digital predistortion apparatus and method for compensating for nonlinear characteristics of a power amplifier, and more particularly, to a polynomial digital predistorter that extracts coefficients of a plurality of power amplifiers connected in series and applies a plurality of predistorters, To compensate for nonlinear characteristics of a power amplifier that compensates for nonlinear characteristics, and a method thereof.

The emergence of the predistorter has been driven by the development of digital wireless mobile communication systems. As the mobile communication system develops, the demand of the user for the transmission rate has increased, and the technique has been developed in a direction of increasing the antenna output to increase the transmission speed.

In order to increase the antenna output, the power amplifier must use a high output, that is, a high gain. However, the use of a high - power amplifier has shown a large nonlinearity in that the gain of the high - power amplifier decreases as the magnitude of the input signal increases.

Therefore, as the nonlinearity increases, the adjacent band spectrum of the output signal through the power amplifier increases, thereby increasing the interference of the side channel. The bit error rate is increased according to the degree of influence of the side channel interference, and the data yield is lowered.

In order to overcome the channel interference due to the nonlinearity of such a high power amplifier, feedback, forward direction and digital predistorter have been studied and a digital predistorter has been popularly used.

Recently, a power amplifier model is used by combining several nonlinear models. This is to overcome the limitation of high power through a power amplifier with two or more nonlinear characteristics. However, up to now, the digital predistorter compensates the nonlinear output characteristics by using a digital predistortion system with the merged nonlinear output form.

Therefore, the digital predistorter has a problem that the output characteristic is not optimized for a plurality of functions.

Korean Patent Publication No. 10-2013-0039886 (Apr. 23, 2013)

SUMMARY OF THE INVENTION The present invention has been made to overcome the problems of the prior art described above, and it is an object of the present invention to extract coefficients for a plurality of power amplifiers connected in series, to serially connect a plurality of polynomial digital predistorbers, The purpose of this paper is to compensate the nonlinear characteristics of the function form.

In order to compensate for the complex nonlinear characteristics of a plurality of power amplifiers connected in series, a plurality of feedbackless polynomial digital predistorters are constructed, and coefficients are also formed by a plurality of intervals to obtain an Adjacent Channel Leakage Ratio (ACLR) The purpose of the EVM is to improve the error vector magnitude (EVM) performance.

According to another aspect of the present invention, there is provided a method of compensating for nonlinear characteristics of a plurality of power amplifiers connected in series using a polynomial digital predistorter, the method comprising: extracting input / output characteristic data of a plurality of power amplifiers to be connected in series; Extracting coefficients of a polynomial digital predistorter corresponding to each of the power amplifiers from each of the input and output characteristic data; and connecting a plurality of polynomial digital predistorters to which the extracted coefficients are applied, Compensating for the nonlinear characteristic of the power amplifier,
Wherein the step of extracting the coefficients of the polynomial digital predistorter comprises:
Estimating a polynomial type input / output characteristic by applying a Boltera series to the input / output characteristic data; And
Determining a coefficient of the polynomial digital predistorter by applying an LMS (Least Mean Squares) algorithm to the input / output characteristic of the polynomial type, and storing the coefficient according to the address of the amplitude modulation section of the input power .

In the polynomial digital predistorting method according to the present invention, the step of extracting the input / output characteristic data may include a step of adjusting an amplitude modulation period of input power by adjusting a gain of a signal input to the power amplifier, Generating an input signal, storing the input signal in an input address space of the memory, measuring an output signal of the power amplifier according to the input signal, storing the measured output signal in an output address space of the memory The method comprising the steps of:

In the polynomial digital predistortion method according to the present invention, the amplitude modulation section of the input power is divided into a saturation section and a linear section, and the coefficient is composed of a plurality of sections.

In the polynomial digital predistortion method according to the present invention, the step of extracting the coefficients of the polynomial digital predistorter includes estimating input / output characteristics of a polynomial type by applying a Boltera series to the input / output characteristic data, Determining a coefficient of the polynomial digital predistorter by applying an LMS (Least Mean Squares) algorithm to the input / output characteristic, and storing the coefficient according to the address of the amplitude modulation section of the input power.

The plurality of power amplifiers coupled in series may include at least one Doherty power amplifier having a main amplifier and an auxiliary amplifier connected in parallel, and the Doherty power amplifier includes a main amplifier And the operating point of the amplifier is applied to one power amplifier designed differently to extract the coefficient.

In the method of compensating for the nonlinear characteristic, the step of compensating for the nonlinear characteristics may include a step of comparing the nonlinear characteristics of the plurality of power amplifiers with the extracted coefficients And a plurality of polynomial digital predistorters to which a plurality of polynomial digital predistorbers are applied.

The present invention also provides a power amplifier comprising a plurality of polynomial digital predistorters for linearizing nonlinear characteristics of a power amplifier, an orthogonal modulator for modulating the output signals of the plurality of polynomial digital predistorters, A plurality of polynomial digital predistorters for extracting input and output characteristic data of each of the plurality of power amplifiers and outputting a polynomial digital predistortion corresponding to each of the power amplifiers from the input and output characteristic data, And a plurality of polynomial digital predistorters to which the extracted coefficients are applied are connected in series, and coefficients of the polynomial digital predistorter are input to the input / output characteristic data by a polynomial type input / output Estimates the characteristics, and Applying a LMS (Least Mean Squares) algorithm, the input-output characteristics of an expression form to determine the coefficients of the said polynomial digital predistorter, it characterized in that the extract stored according to the coefficient of the amplitude modulation section of the power input address.

The input / output characteristic data may be obtained by adjusting gain of a signal input to each of the plurality of power amplifiers to change an amplitude modulation period of input power, and outputting an input signal The input signal is stored in the input address space of the memory and the output signal of the power amplifier according to the input signal is measured and stored in the output address space of the memory.

In the polynomial digital predistorter according to the present invention, the amplitude modulation section of the input power is divided into a saturation section and a linear section, and the coefficient is composed of a plurality of sections.

In the polynomial digital predistorter according to the present invention, the coefficient of the polynomial digital predistorter may be obtained by estimating input / output characteristics of a polynomial type by applying a Boltera series to the input / output characteristic data, Least Mean Squares) algorithm to determine the coefficients of the polynomial digital predistorter, and stores the coefficients according to the address of the amplitude modulation section of the input power and extracts the coefficients.

The plurality of power amplifiers may further include a Doherty power amplifier having a main amplifier and an auxiliary amplifier connected in parallel, wherein the Doherty power amplifier includes a main amplifier and an auxiliary amplifier, Is applied to one power amplifier designed differently to extract the coefficients.

In the polynomial digital predistorter according to the present invention, the plurality of polynomial digital predistorters may be arranged to correspond to the nonlinear characteristics of each of the plurality of power amplifiers, in a reverse order of the order in which the plurality of power amplifiers are connected in series, And a plurality of polynomial digital predistorters to which a plurality of polynomial digital predistorbers are applied.

According to the polynomial digital predistorter and method of the present invention configured as described above, the coefficients for the plurality of power amplifiers connected in series are extracted, and a plurality of polynomial digital predistorters to which the extracted coefficients are applied are connected in series It is possible to compensate for the nonlinear characteristic of a plurality of functions.

According to the polynomial digital predistorter and method of the present invention configured as described above, in order to compensate for complex nonlinear characteristics of a plurality of power amplifiers connected in series, a plurality of feedbackless polynomial digital predistorters are constructed, The coefficient is also made up of a plurality of intervals to improve the Adjacent Channel Leakage Ratio (ACLR) and the Error Vector Magnitude (EVM) performance.

1 is a diagram showing a structure of an adaptive polynomial digital predistorter.
2 is a flowchart illustrating a polynomial digital predistortion method that compensates for nonlinear characteristics of a power amplifier according to an embodiment of the present invention.
3 is a diagram showing a structure for extracting input / output characteristic data of a power amplifier according to the present invention.
FIG. 4 is a graph illustrating a polynomial coefficient according to the present invention. Referring to FIG.
5 is a diagram showing a coefficient extraction structure of a polynomial predistorter according to the present invention.
6 is a diagram illustrating a structure in which a plurality of polynomial digital predistorters are serially coupled to a plurality of power amplifiers connected in series according to an embodiment of the present invention.
7 is a diagram illustrating a structure in which a plurality of polynomial digital predistorters are serially coupled to a power amplifier in which a Doherty amplifier is combined according to an embodiment of the present invention.

The present invention may have various modifications and various embodiments, and specific embodiments are illustrated in the drawings and described in detail in the detailed description. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First, a conventional polynomial digital predistorter will be described with reference to FIG. 1, a transmitter for transmitting a communication signal includes a digital predistorter 110, a power amplifier 120, a polynomial predistorter algorithm executing unit 130, A gain controller 130, and a signal gain controller 140.

The digital predistorter 110 pre-distorts the signal input to the power amplifier 120 to eliminate the non-linearity of the signal output from the power amplifier 120. Since the digital predistorter 110 can know the nonlinear output characteristic in the power amplifier 120 and can pre-distort the nonlinear inverse characteristic of the input signal, the characteristics of the power amplifier 120 must be grasped.

The characteristics of the power amplifier 120 can be obtained by comparing the gain of the signal after passing through the signal gain controller 140 by receiving feedback of the input signal and the output signal. The polynomial predistorter algorithm executing unit 130 performs a comparison between the received input signal and the feedback output signal.

The polynomial predicting unit 130 updates the polynomial coefficient of the digital predistorter 110 so as to have the inverse characteristic with respect to the characteristic of the power amplifier 120 obtained by the polynomial predistorter algorithm executing unit 130, thereby distorting the signal.

The configuration and signal distortion method of the conventional polynomial digital predistorter have been described with the above configuration. Conventional techniques require feedback and are not suitable for compensating for nonlinear characteristics of multiple functional form due to the configuration of multiple power amplifiers. Therefore, a polynomial digital predistorter according to the present invention and its method for solving the above problem will be described.

2 is a flowchart illustrating a polynomial digital predistortion method that compensates for nonlinear characteristics of a power amplifier according to an embodiment of the present invention. Referring to FIG. 2, input / output characteristic data of a plurality of power amplifiers to be connected in series are extracted (S100). Here, the power amplifier performs the function of amplifying the output. In order to further improve the output, a plurality of power amplifiers may be connected in series. Specifically, a method of extracting the input / output characteristic data of the power amplifier will be described with reference to FIG.

3 is a diagram showing a structure for extracting input / output characteristic data of a power amplifier according to the present invention. 3, in order to extract input / output characteristic data of a power amplifier, an input section 210 includes a signal generation section 220, a power amplifier 230, a signal measurement section 240, and a memory 250 Structure.

The input section adjusting section 210 changes the amplitude modulation (AM) section of the input power by adjusting the gain of the input signal generated by the signal generating section 220. The signal generator 220 generates an input signal according to the gain adjusted by the input section controller 210. The generated signal corresponds to the first input address space x 1 (n) of the memory 250 Where input characteristic I / Q data is stored.

An input signal generated by the signal generator 220 is input to the power amplifier 230 and an output signal amplified by the power amplifier 230 is measured by the signal measuring unit 240. The output characteristic I / Q data is extracted from the signal measured by the signal measuring unit 240 and stored in the first output address space z 1 (n) of the memory 250.

The gain of the input signal is changed in the input section controller 210 and the amplitude modulation section of the input power is changed in the same manner as described above. Then, the signal generator 220 and the signal measurer 240 convert the amplitude of the input power into the memory 250, . The input / output characteristic data of the power amplifier 230 can be extracted through repeated data storage.

Here, a method of setting the amplitude modulation interval will be described with reference to FIG. FIG. 4 is a graph illustrating a polynomial coefficient according to the present invention. Referring to FIG. Referring to FIG. 4, the output amplitude characteristic of the input amplitude of the power amplifier having a general nonlinearity can be confirmed. The nonlinearity characteristics are largely divided into two sections. The P1dB point can be represented by a saturation section to the right and a linear section to the left. Therefore, in order to use the polynomial coefficients of a plurality of intervals of the polynomial digital predistorter, it is possible to construct a coefficient to be classified into a linear interval saturated period.

If the coefficient is composed of a plurality of intervals as described above, the linearity of the polynomial digital predistorter having the inverse characteristic with respect to the total input / output characteristics is more precise than the linearization performance of the polynomial digital predistorter having the ACLR (Adjacent Channel Leakage Ratio) ). Therefore, although the polynomial coefficient is divided into four sections in FIG. 4, it can be suitably changed according to the input / output characteristics of the power amplifier.

The method of extracting the input / output characteristic data of the power amplifier has been described above. Referring again to FIG. 2, a polynomial digital predistortion method that compensates for the nonlinear characteristics of the power amplifier will be described.

The coefficients of the polynomial digital predistorter corresponding to each of the plurality of power amplifiers are extracted from the input / output characteristic data extracted in the step S100 of extracting the input / output characteristic data of each of the plurality of power amplifiers (S200). A method of extracting the coefficients of the polynomial digital predistorter will be described with reference to FIG.

5 is a diagram showing a coefficient extraction structure of a polynomial predistorter according to the present invention. 5, the coefficient extraction structure of the polynomial predistorter includes a memory 250, a polynomial digital predistorter algorithm coefficient extractor 260, and a coefficient memory 270.

First, data on the input / output characteristics of the power amplifier, which is intended to correct non-linearity, is input to the polynomial digital predistorter algorithm coefficient extracting unit 260 using the memory 260 stored in the input / output characteristic data extracting structure of the power amplifier. The input data is input to an input characteristic x (n) and an output characteristic z (n) stored in the memory 260.

The polynomial digital predistorter algorithm coefficient extracting unit 260 estimates the input / output characteristics of the polynomial type using the Boltera series. The Boltera series is given by Equation 1 below.

Figure 112015064442493-pat00001

In Equation (1) representing the Boltera series, k denotes a polynomial degree, a k denotes a polynomial coefficient x (n) denotes an input signal, and y (n) denotes an output signal. To obtain the coefficients of the Volterra series, we use the LMS (Least Mean Squares) algorithm, which sets the coefficients so that the magnitude of the input and output data minimizes the phase difference. The characteristics of the polynomial predistorter must have the inverse characteristics of the input and output characteristics of the power amplifier.

Figure 112015064442493-pat00002

Accordingly, the data of the input section obtained from the memory 250 is input to the input signal x (n) and the output signal y (n) as in Equation 2, and the coefficient is updated by repeatedly practicing the algorithm through the LMS algorithm . When the input / output signal arrives in practice, the coefficient a k of the polynomial predistorter is finally determined. In the coefficient memory 270, the coefficients of the obtained polynomial predistorter for each input section are stored according to the addresses of the input sections (p set1 , p set2 , ..., p setk ).

The method of extracting the coefficients of the polynomial digital predistorter using the input / output characteristic data has been described above. Next, I will return to 2 and explain the next process.

The coefficients extracted from the input / output characteristic data are applied to a plurality of polynomial digital predistorters, and a plurality of polynomial digital predistorters to which the coefficients are applied are connected in series to compensate the nonlinear characteristics of the plurality of power amplifiers (S300). Here, a plurality of polynomial digital predistorters are connected in series, each of which applies coefficients extracted in an inverse order of a series connection of a plurality of power amplifiers to correspond to nonlinear characteristics of each of the plurality of power amplifiers.

Thus, a polynomial digital predistortion method that compensates for nonlinear characteristics of a power amplifier has been described. Next, a structure for compensating the non-linear characteristic of the power amplifier using the above method will be described.

6 is a diagram illustrating a structure in which a plurality of polynomial digital predistorters are serially coupled to a plurality of power amplifiers connected in series according to an embodiment of the present invention. Referring to FIG. 6, the apparatus includes a polynomial digital predistorter A 310, a polynomial digital predistorter B 320, an orthogonal modulator, a power amplifier B 330, and a power amplifier A 340. This structure solves the problem of no feedback signal by obtaining optimized coefficients of each of a plurality of power amplifiers connected in series through the process of FIG. 2 through 5 with no feedback structure.

First, when the power amplifier B 330 is composed of two power amplifiers B 330 and A 340, which are simple structures of a plurality of power amplifiers, a characteristic function of the power amplifier B 330 is G 1 (·), a power amplifier A 340) is defined as G 2 (·), the characteristic function of the polynomial digital predistorter is also defined. The polynomial digital predistorter A 310 is G 2 -1 (·), the polynomial digital predistorter B 320 ) Becomes G 1 -1 (·). The coefficients of each of the polynomial digital predistorters are described in the method of extracting in Figs. 3 to 5 and will not be described here.

When the input signal x (n) is input to the polynomial digital predistorter A 310 and the polynomial digital predistorter B 320, the signal is distorted according to the respective coefficients and modulated in the orthogonal modulator. The modulated signal is input to the power amplifier B 330 and the power amplifier A 340, and the nonlinear characteristic compensated output is finally output. Here, the final output is a nonlinear characteristic generated in the power amplifier B 330 and the power amplifier A 340 by the nonlinear inverse characteristic distorted by the polynomial digital predistorter A 310 and the polynomial digital predistorter B 320 Compensate.

On the other hand, the power amplifier B 330 and the power amplifier A 340 are connected in series in the reverse order of the series connection order of the polynomial digital predistorter A 310 and the polynomial digital predistorter B 320 of FIG. 6 Can be confirmed. Here, the reason why the series connection order of the predistorter and the power amplifier is configured in the opposite order will be explained by the following Equations 3 to 6.

Figure 112015064442493-pat00003

Equation 3 represents the output of the polynomial digital predistorter A 310. The output signal y 1 (n) of the polynomial digital predistorter A 310 with respect to the input signal x (n) is expressed by Equation (3).

Next, the output signal y 1 (n) of the polynomial digital predistorter A 310 is input to the input signal of the polynomial digital predistorter B 320, and the polynomial digital predistorter B 320 is expressed by the following equation And outputs an output signal y2 (n).

Figure 112015064442493-pat00004

The output signal y 2 (n) of the output polynomial digital predistorter B 320 is modulated by the quadrature modulator and input to the power amplifier B 330. The output signal o 1 (n) of the power amplifier B 330 is expressed by Equation (5).

Figure 112015064442493-pat00005

When the output signal o 1 (n) of the power amplifier B 330 is checked through Equation 5, the characteristic functions of the polynomial digital predistorter B 320 and the predistorter B 330 cancel each other, It can be confirmed that the output is the same as the output signal y 1 (n) of the polynomial digital predistorter A 310. As a result, the output signal y 1 (n) of the polynomial digital predistorter A 310 is input to the power amplifier A 340.

Next, the output signal o 2 (n) of the power amplifier A 340 is calculated and finally output as shown in Equation (6).

Figure 112015064442493-pat00006

(6), the characteristic functions of the polynomial digital predistorter A 310 and the power amplifier A 340 are canceled each other, and finally the output signal o 2 (n) output is x (n) .

As a result, it can be seen that the signals input through Equations (3) to (6) are canceled by the characteristics of the polynomial digital predistorter and the power amplifier, and are output as they are. In order to predistort a plurality of power amplifiers as described above, the connecting order of the polynomial digital predistorter and the power amplifier must be reversed to operate as a proper polynomial digital predistorter.

Next, a structure for compensating for nonlinear characteristics of a plurality of power amplifiers in which Doherty amplifiers are combined according to another embodiment will be described. 7 is a diagram illustrating a structure in which a plurality of polynomial digital predistorters are serially coupled to a power amplifier in which a Doherty amplifier is combined according to an embodiment of the present invention. Referring to FIG. 7, a polynomial digital predistorter A 1,2 410, a polynomial digital predistorter B 420, a quadrature modulator, a power amplifier B 430, a power amplifier A 1 440, a power amplifier A 2 (450).

In particular, in FIG. 7, it can be seen that a plurality of power amplifiers are merged in series and parallel. Here, the power amplifier connected in parallel is a combination of a parallel power amplifier of the Doherty amplifier type and a parallel power amplifier of the Doherty amplifier type. The configuration of the frontmost polynomial digital predistorter is shown in FIG. And a coefficient is formed by a plurality of intervals according to the following equation.

The structure in which the Doherty power amplifier is combined and the structure in which the plurality of power amplifiers are combined in series in FIG. 6 is that the structure in which the Doherty amplifier is incorporated is applied in comparison with the power amplifier structure connected in series, have. Therefore, if the nonlinear distortion compensation optimized for this type is obtained, the performance improvement of the existing mobile communication system can be increased.

6, the Doherty amplifier includes a power amplifier A 1 440 and a power amplifier A 2 450. The power amplifier A 1 440 is a main amplifier and the power amplifier A 2 450 is an auxiliary amplifier define. Here, the power amplifier A 1 (440) performs amplification when the input signal is equal to or less than the peak signal, and the power amplifier A 2 (450) operates when an input signal exceeding the peak signal is input. In addition, the power amplifier A 1 (440) and the power amplifier A 2 (450) are designed to have different operating points to improve the efficiency deterioration of the input signal according to the nonlinear characteristic through the power amplifier A 2 (450) .

Therefore, the optimized coefficients of the power amplifier A 1 440 and the power amplifier A 2 450 are extracted based on the high output through FIGS. 3 and 4, and then the peak signals A 1, To implement the coefficient setting. Also, the polynomial digital predistorter B 420 sets a coefficient optimized for the power amplifier B 430 as shown in FIG.

That is, the coefficient of the polynomial digital predistorter A 1,2 (410) is applied by calculating the power amplifier A 1 (440) and the power amplifier A 2 (450) as one power amplifier.

Here, as described with reference to FIG. 6, the polynomial digital predistorter and the power amplifier are connected to each other in reverse order, and the signal input first according to the characteristic function is finally output.

The embodiments of the present invention described in the present specification and the configurations shown in the drawings relate to the most preferred embodiments of the present invention and are not intended to encompass all of the technical ideas of the present invention so that various equivalents It should be understood that water and variations may be present. Therefore, it is to be understood that the present invention is not limited to the above-described embodiments, and that various modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims. , Such changes shall be within the scope of the claims set forth in the claims.

Digital predistorter: 110
Power Amplifiers: 120, 230
Polynomial predistortion algorithm performing part: 130
Signal gain control section: 140
Input section control section: 210
Signal generator 220
Signal measuring part: 240
Memory: 250
Polynomial Digital Predistorter Algorithm Coefficient Extractor: 260
Count memory: 270
Polynomial digital predistorter A: 310
Polynomial digital predistorter B: 320, 420
Power Amplifier A: 340
Power amplifier B: 330, 430
Polynomial digital predistorter A 1,2 : 410
Power Amplifier A 1 : 440
Power amplifier A 2 : 450

Claims (12)

A method for compensating for nonlinear characteristics of a plurality of power amplifiers connected in series using a polynomial digital predistorter,
Extracting input / output characteristic data of each of a plurality of power amplifiers to be connected in series;
Extracting coefficients of the polynomial digital predistorter corresponding to each of the power amplifiers from the respective input / output characteristic data; And
And compensating the nonlinear characteristics of the plurality of power amplifiers by serially connecting a plurality of polynomial digital predistorters to which the extracted coefficients are applied,
Wherein the step of extracting the coefficients of the polynomial digital predistorter comprises:
Estimating a polynomial type input / output characteristic by applying a Boltera series to the input / output characteristic data; And
Determining a coefficient of the polynomial digital predistorter by applying an LMS (Least Mean Squares) algorithm to the input / output characteristic of the polynomial type, and storing the coefficient according to the address of the amplitude modulation section of the input power; Digital predistortion method. The method according to claim 1,
The step of extracting the input /
Adjusting an amplitude modulation period of the input power by adjusting a gain of a signal input to the power amplifier;
Generating an input signal according to the adjusted gain and storing the input signal in an input address space of the memory; And
Measuring an output signal of the power amplifier according to the input signal and storing the measured output signal in an output address space of the memory. 3. The method of claim 2,
Wherein the amplitude modulation section of the input power comprises:
Wherein the saturation section is divided into a linear section and the coefficient is divided into a plurality of sections. delete The method according to claim 1,
The plurality of power amplifiers connected in series,
And one or more Doherty power amplifiers in which a main amplifier and an auxiliary amplifier are connected in parallel,
Wherein the Doherty power amplifier extracts the coefficients by applying the operating points of the main amplifier and the auxiliary amplifier to one power amplifier designed differently from each other. The method of claim 1, wherein
Compensating for the nonlinear characteristic comprises:
Wherein the plurality of power amplifiers are serially connected to a plurality of polynomial digital predistorbers to which the extracted coefficients are applied in a reverse order of a series connection of the plurality of power amplifiers so as to correspond to nonlinear characteristics of each of the plurality of power amplifiers. Way. A plurality of polynomial digital predistorters for linearizing nonlinear characteristics of the power amplifier;
An orthogonal modulator for modulating an output signal of the plurality of polynomial digital predistorters; And
And a plurality of power amplifiers connected in series to amplify the modulated output signal,
Wherein the plurality of polynomial digital predistorters comprises:
Extracting input / output characteristic data of each of the plurality of power amplifiers, extracting coefficients of a polynomial digital predistorter corresponding to each of the power amplifiers from the input / output characteristic data, calculating a plurality of polynomial digital predistortions Lt; / RTI > are connected in series,
Wherein the coefficient of the polynomial digital predistorter is:
Estimating an input / output characteristic of a polynomial type by applying a Boltera series to the input / output characteristic data, determining a coefficient of the polynomial digital predistorter by applying an LMS (Least Mean Squares) algorithm to the input / output characteristic of the polynomial type, Wherein the coefficient is stored and extracted according to the address of the amplitude modulation section of the input power. The method of claim 7, wherein
The input /
Wherein the power amplifier comprises: a plurality of power amplifiers for varying an amplitude modulation period of an input power by adjusting a gain of a signal inputted to each of the plurality of power amplifiers, generating an input signal according to the adjusted gain, storing the input signal in an input address space of the memory, Wherein the output signal of the power amplifier according to the input signal is measured and stored in an output address space of the memory. 9. The method of claim 8,
Wherein the amplitude modulation section of the input power comprises:
Wherein the coefficient is divided into a saturation section and a linear section, and the coefficient is composed of a plurality of sections. delete 8. The method of claim 7,
Wherein the plurality of power amplifiers comprise:
Further comprising a Doherty power amplifier having a main amplifier and an auxiliary amplifier connected in parallel,
Wherein the Doherty power amplifier extracts the coefficients by applying the operating points of the main amplifier and the auxiliary amplifier to one power amplifier designed differently from each other. 8. The method of claim 7,
Wherein the plurality of polynomial digital predistorters comprises:
Wherein the plurality of power amplifiers are serially connected to a plurality of polynomial digital predistorbers to which the extracted coefficients are applied in a reverse order of a series connection of the plurality of power amplifiers so as to correspond to nonlinear characteristics of each of the plurality of power amplifiers. Device.
KR1020150094677A 2015-07-02 2015-07-02 Polynomial digital predistortion apparatus for compensation of non-linear characteristic of power amplifier and the method thereof KR101679230B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020150094677A KR101679230B1 (en) 2015-07-02 2015-07-02 Polynomial digital predistortion apparatus for compensation of non-linear characteristic of power amplifier and the method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020150094677A KR101679230B1 (en) 2015-07-02 2015-07-02 Polynomial digital predistortion apparatus for compensation of non-linear characteristic of power amplifier and the method thereof

Publications (1)

Publication Number Publication Date
KR101679230B1 true KR101679230B1 (en) 2016-11-24

Family

ID=57705486

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020150094677A KR101679230B1 (en) 2015-07-02 2015-07-02 Polynomial digital predistortion apparatus for compensation of non-linear characteristic of power amplifier and the method thereof

Country Status (1)

Country Link
KR (1) KR101679230B1 (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20170106603A (en) * 2016-03-11 2017-09-21 삼성전기주식회사 Envelope tracking power amplifier apparatus and method
KR20170110275A (en) * 2016-03-23 2017-10-11 삼성전기주식회사 Apparatus for pre-distorting high frequency signal and apparatus for compensating nonlinear distortion of power amplifier
KR20190096104A (en) * 2018-02-08 2019-08-19 엘지이노텍 주식회사 An apparatus and a operating method of pre-distorter with compensation
KR20190124288A (en) * 2017-03-07 2019-11-04 자일링크스 인코포레이티드 Method and apparatus for model identification and predistortion
KR20200071436A (en) * 2018-12-11 2020-06-19 삼성전자주식회사 A power amplifier and an elelctronic device comprising the same
KR20210091669A (en) 2020-01-14 2021-07-22 주식회사 유캐스트 An apparatur for compensation of nonlinearly distorted signals caused by power amplifiers based on deep learning and method thereof
WO2023075325A1 (en) * 2021-10-28 2023-05-04 Samsung Electronics Co., Ltd. Apparatus and method for controlling non-linear effect of power amplifier
KR102537866B1 (en) 2022-08-03 2023-05-31 에이투케이에이치에스 주식회사 Apparatus and method for providing selecting volterra series model of digital pre-distortion system
KR102574188B1 (en) * 2022-08-19 2023-09-04 심플라온 주식회사 Protection circuit for digital amp
WO2023226444A1 (en) * 2022-05-27 2023-11-30 华为技术有限公司 Digital pre-distortion circuit, and digital pre-distortion method and device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100253426A1 (en) * 2007-12-17 2010-10-07 Huawei Technologies Co., Ltd. High-Efficiency Power Amplifier
KR101095183B1 (en) 2010-09-15 2011-12-16 (주)답스 Predistorer and amplifier for having the same, predistoration method
US20140254716A1 (en) 2013-03-05 2014-09-11 Qualcomm Incorporated Power Amplifier System Including A Composite Digital Predistorter
WO2015019091A1 (en) 2013-08-09 2015-02-12 University Of Surrey Predistortion in satellite signal transmission systems

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100253426A1 (en) * 2007-12-17 2010-10-07 Huawei Technologies Co., Ltd. High-Efficiency Power Amplifier
KR101095183B1 (en) 2010-09-15 2011-12-16 (주)답스 Predistorer and amplifier for having the same, predistoration method
US20140254716A1 (en) 2013-03-05 2014-09-11 Qualcomm Incorporated Power Amplifier System Including A Composite Digital Predistorter
WO2015019091A1 (en) 2013-08-09 2015-02-12 University Of Surrey Predistortion in satellite signal transmission systems

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102518173B1 (en) * 2016-03-11 2023-04-05 삼성전기주식회사 Envelope tracking power amplifier apparatus and method
KR20170106603A (en) * 2016-03-11 2017-09-21 삼성전기주식회사 Envelope tracking power amplifier apparatus and method
KR20170110275A (en) * 2016-03-23 2017-10-11 삼성전기주식회사 Apparatus for pre-distorting high frequency signal and apparatus for compensating nonlinear distortion of power amplifier
KR102586418B1 (en) * 2016-03-23 2023-10-06 삼성전기주식회사 Apparatus for pre-distorting high frequency signal and apparatus for compensating nonlinear distortion of power amplifier
KR20190124288A (en) * 2017-03-07 2019-11-04 자일링크스 인코포레이티드 Method and apparatus for model identification and predistortion
KR102520787B1 (en) * 2017-03-07 2023-04-11 자일링크스 인코포레이티드 Method and Apparatus for Model Identification and Predistortion
KR20190096104A (en) * 2018-02-08 2019-08-19 엘지이노텍 주식회사 An apparatus and a operating method of pre-distorter with compensation
KR102640792B1 (en) * 2018-02-08 2024-02-27 엘지이노텍 주식회사 An apparatus and a operating method of pre-distorter with compensation
KR20200071436A (en) * 2018-12-11 2020-06-19 삼성전자주식회사 A power amplifier and an elelctronic device comprising the same
KR102662272B1 (en) * 2018-12-11 2024-05-02 삼성전자주식회사 A power amplifier and an elelctronic device comprising the same
KR20210091669A (en) 2020-01-14 2021-07-22 주식회사 유캐스트 An apparatur for compensation of nonlinearly distorted signals caused by power amplifiers based on deep learning and method thereof
WO2023075325A1 (en) * 2021-10-28 2023-05-04 Samsung Electronics Co., Ltd. Apparatus and method for controlling non-linear effect of power amplifier
WO2023226444A1 (en) * 2022-05-27 2023-11-30 华为技术有限公司 Digital pre-distortion circuit, and digital pre-distortion method and device
KR102537866B1 (en) 2022-08-03 2023-05-31 에이투케이에이치에스 주식회사 Apparatus and method for providing selecting volterra series model of digital pre-distortion system
KR102574188B1 (en) * 2022-08-19 2023-09-04 심플라온 주식회사 Protection circuit for digital amp

Similar Documents

Publication Publication Date Title
KR101679230B1 (en) Polynomial digital predistortion apparatus for compensation of non-linear characteristic of power amplifier and the method thereof
KR101789924B1 (en) Device and method for adaptive digital pre-distortion
JP5236661B2 (en) Method and system for linearizing baseband predistortion in multi-channel wideband communication system
CN101911477B (en) Predistorter
JP4255849B2 (en) Power series digital predistorter
CN101416382B (en) Method and equipment for reducing frequency memory effect of RF power amplifier
KR101128487B1 (en) Power amplifier linearization method and apparatus
CN104363191B (en) A kind of digital pre-distortion method of frequency-hopping communication system
US20120128098A1 (en) Apparatus and method for digital predistortion of non-linear amplifiers
Wang et al. Optimal sizing of generalized memory polynomial model structure based on hill-climbing heuristic
KR101386239B1 (en) Predistorter for compensating of nonlinear distortion and method for the same
KR101095183B1 (en) Predistorer and amplifier for having the same, predistoration method
Safari et al. Spline-based model for digital predistortion of wide-band signals for high power amplifier linearization
JP5160344B2 (en) Predistorter
KR100865886B1 (en) Apparatus for calibrating non-linearity of amplifier
US20110065381A1 (en) Method of transmitting higher power from a satellite by more efficiently using the existing satellite power amplifiers
KR100873106B1 (en) Apparatus and method for amplifying using adaptive predistortion based on the direct learning architecture
JP6182973B2 (en) Signal amplification device, distortion compensation method, and wireless transmission device
KR20120054369A (en) Predistorter using memory polynomial model, predistorting method thereof, and system including the predistorter
KR102640792B1 (en) An apparatus and a operating method of pre-distorter with compensation
KR101464753B1 (en) Method for extracting nonlinear model parameter of wideband signal using narrowband signal, apparatus and method for digital predistortering its using
KR20120070143A (en) Apparatus for reducing envelope distortion in power amplifier
KR20140118130A (en) Apparatus and method of predistortion of multiple nonlinear amplifiers with single feedback loop
KR101095936B1 (en) Power Amplifier with Amplifying Characteristic Data and its Method, and Predistorter and Method using that
JP2011228999A (en) Amplifier circuit and wireless communication device

Legal Events

Date Code Title Description
E701 Decision to grant or registration of patent right
GRNT Written decision to grant