KR101337617B1 - Vertical light emitting diode having ohmic electrode pattern and method of fabricating the same - Google Patents

Abstract

A vertical light emitting diode having an ohmic electrode pattern and a method of manufacturing the same are disclosed. This light emitting diode includes a conductive substrate. Compound semiconductor layers are located on the conductive substrate. The compound semiconductor layers include a first conductive compound semiconductor layer, an active layer, and a second conductive compound semiconductor layer. On the other hand, an ohmic electrode pattern is interposed between the compound semiconductor layers and the conductive substrate. The ohmic electrode pattern is in ohmic contact with the compound semiconductor layers and has an opening exposing the compound semiconductor layers. Meanwhile, a metal reflection layer is interposed between the ohmic electrode pattern and the conductive substrate. The metal reflective layer also fills the opening. Accordingly, the light absorption by the ohmic electrode pattern may be reduced to increase the reflectance of light, thereby improving luminous efficiency. The thickness of the ohmic electrode pattern may be increased to provide a vertical light emitting diode capable of stabilizing ohmic contact resistance. Can be.

Vertical light emitting diodes, ohmic electrodes, reflective layers, conductive substrates

Description

Vertical light emitting diode having an ohmic electrode pattern and a method of manufacturing the same {VERTICAL LIGHT EMITTING DIODE HAVING OHMIC ELECTRODE PATTERN AND METHOD OF FABRICATING THE SAME}

1 is a cross-sectional view illustrating a conventional vertical light emitting diode.

2 is a cross-sectional view for describing a vertical light emitting diode having an ohmic electrode pattern according to an exemplary embodiment of the present invention.

3 to 7 are cross-sectional views illustrating a method of manufacturing a vertical light emitting diode having an ohmic electrode pattern according to an embodiment of the present invention.

The present invention relates to a vertical light emitting diode and a method of manufacturing the same, and more particularly to a vertical light emitting diode having an ohmic electrode pattern between the metal reflection layer and the compound semiconductor layer and a method of manufacturing the same.

In general, nitrides of Group III elements, such as gallium nitride (GaN) and aluminum nitride (AlN), have excellent thermal stability and have a direct transition energy band structure. As a lot of attention. In particular, blue and green light emitting devices using gallium nitride (GaN) have been utilized in various applications such as large-scale color flat panel display devices, traffic lights, indoor lighting, high density light sources, high resolution output systems, and optical communications.

The nitride semiconductor layer of such a group III element, in particular GaN, is difficult to fabricate a homogeneous substrate capable of growing it, and thus, a metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy method on a heterogeneous substrate having a similar crystal structure. ; MBE) is grown through the process. A sapphire substrate having a hexagonal system structure is mainly used as a heterogeneous substrate. However, since sapphire is an electrically nonconductive material, it limits the light emitting diode structure and is very stable in terms of mechanics and chemistry, making it difficult to process such as cutting and shaping, and has low thermal conductivity. In recent years, a technology for growing a nitride semiconductor layer on a heterogeneous substrate such as sapphire and then separating the heterogeneous substrate to fabricate a vertical-type LED has been researched.

1 is a cross-sectional view illustrating a conventional vertical light emitting diode.

Referring to FIG. 1, the vertical light emitting diode includes a conductive substrate 31. Compound semiconductor layers including a first conductive semiconductor layer 15, an active layer 17, and a second conductive semiconductor layer 19 are positioned on the conductive substrate 31. In addition, an ohmic electrode layer 21, a metal reflection layer 23, and an adhesive layer 27 are interposed between the compound semiconductor layers and the conductive substrate 31.

The compound semiconductor layers are generally grown on a sacrificial substrate (not shown) such as a sapphire substrate by using a metal organic chemical vapor deposition method or the like. Thereafter, an ohmic electrode layer 21, a metal reflection layer 23, and an adhesive layer 27 are formed on the compound semiconductor layers, and a conductive substrate 31 is attached thereto. Subsequently, the sacrificial substrate is separated from the compound semiconductor layers by using a laser lift-off technique or the like, and the first conductivity type compound semiconductor layer 15 is exposed. Thereafter, an electrode pad 17 is formed on the exposed first conductivity type compound semiconductor layer 15. Accordingly, by adopting the conductive substrate 31 having excellent heat-releasing performance, the light-emitting efficiency of the light-emitting diode can be improved, and the light-emitting diode of FIG. 1 having a vertical structure can be provided.

The vertical light emitting diode adopts a metal reflection layer 23 to reflect light directed to the conductive substrate 31 to improve luminous efficiency, and also reduces the contact resistance between the compound semiconductor layers and the metal reflection layer 23. In order to achieve this, the ohmic electrode layer 21 is adopted. Therefore, since the light directed to the conductive substrate 31 is transmitted through the ohmic electrode layer 21, the light is reflected from the metal reflection layer 23, and then is transmitted through the ohmic electrode layer 21 and emitted upward. ) Is formed of a transparent material layer.

However, even when the ohmic electrode layer 21 is formed of a transparent material layer, as the thickness thereof increases, the light transmittance rapidly decreases and the light absorption increases, thereby increasing the light loss caused by the ohmic electrode layer 21. On the other hand, when the ohmic electrode layer 21 is thinly formed to prevent light absorption, stable ohmic contact is not formed between the ohmic electrode layer 21 and the compound semiconductor layer 19, resulting in uneven contact resistance. Current may be concentrated and a forward voltage may increase.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a vertical light emitting diode capable of improving light emission efficiency by reducing light absorption by an ohmic electrode layer and a method of manufacturing the same.

Another object of the present invention is to provide a vertical light emitting diode and a method of manufacturing the same, which can ensure stable ohmic contact characteristics.

In order to achieve the above technical problem, a vertical light emitting diode having an ohmic electrode pattern according to an aspect of the present invention includes a conductive substrate. Compound semiconductor layers are located on the conductive substrate. The compound semiconductor layers include a first conductive compound semiconductor layer, an active layer, and a second conductive compound semiconductor layer. On the other hand, an ohmic electrode pattern is interposed between the compound semiconductor layers and the conductive substrate. The ohmic electrode pattern is in ohmic contact with the compound semiconductor layers and has an opening exposing the compound semiconductor layers. Meanwhile, a metal reflection layer is interposed between the ohmic electrode pattern and the conductive substrate. The metal reflective layer also fills the opening. Accordingly, the light absorption by the ohmic electrode pattern may be reduced to increase the reflectance of light, and the thickness of the ohmic electrode pattern may be increased to provide a vertical light emitting diode capable of stabilizing ohmic contact resistance.

The ohmic electrode pattern may be formed in various shapes, and the opening may be formed to be distributed over a wide surface. For example, the ohmic electrode pattern may be a matrix pattern of islands, a plurality of lines or a reticular pattern. Accordingly, the reflectance of the light can be evenly improved over the wide surface of the metal reflection layer while preventing current concentration.

Meanwhile, an electrode pad is positioned on the compound semiconductor layers facing the conductive substrate. In addition, an extension extending from the electrode pad is disposed on the compound semiconductor layers. The extension portion prevents current flowing into the compound semiconductor layer from being concentrated on the electrode pad portion and distributes the current. The extension part may be disposed to be positioned on the ohmic electrode pattern, but it is preferably mainly located on the opening of the ohmic electrode pattern for current dispersion.

According to another aspect of the present invention, a method of manufacturing a vertical light emitting diode having an ohmic electrode pattern includes forming compound semiconductor layers on a sacrificial substrate. The compound semiconductor layers include a first conductive compound semiconductor layer, an active layer, and a second conductive compound semiconductor layer. An ohmic electrode pattern having an opening exposing the compound semiconductor layers is formed on the compound semiconductor layers. Thereafter, a metal reflection layer is formed on the compound semiconductor layers on which the ohmic electrode pattern is formed. The metal reflection layer fills the opening. Meanwhile, a conductive substrate is formed on the metal reflection layer, and the sacrificial substrate is separated from the compound semiconductor layers. As a result, a vertical light emitting diode having an ohmic electrode pattern is manufactured.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the width, length, thickness, and the like of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

2 is a cross-sectional view illustrating a vertical light emitting diode having an ohmic electrode pattern 61 according to an exemplary embodiment of the present invention.

Referring to FIG. 2, compound semiconductor layers including a first conductive semiconductor layer 55, an active layer 57, and a second conductive semiconductor layer 59 are positioned on the conductive substrate 71. The conductive substrate 71 is a substrate such as Si, GaAs, GaP, AlGaINP, Ge, SiSe, GaN, AlInGaN or InGaN, but Al, Zn, Ag, W, Ti, Ni, Au, Mo, Pt, Pd, Cu It may be a single metal of Cr or Fe or an alloy thereof. Meanwhile, the compound semiconductor layers are III-N-based compound semiconductor layers, and the first conductive type and the second conductive type represent N type and P type, or P type and N type.

An ohmic electrode pattern 61 is interposed between the compound semiconductor layers and the conductive substrate 71. The ohmic electrode pattern 61 is in ohmic contact with the compound semiconductor layers, for example, the second conductivity type semiconductor layer 59. The ohmic electrode pattern may be a pattern having various shapes such as a matrix pattern of islands, a plurality of lines or a reticular pattern, and has an opening exposing the compound semiconductor layers. The ohmic electrode pattern 61 is preferably distributed over a wide surface of the second conductivity-type semiconductor layer 59, and the opening is also widely distributed for current distribution. The ohmic electrode pattern 61 is formed of a metal or metal oxide in ohmic contact with the compound semiconductor layer to which it contacts.

Meanwhile, a metal reflection layer 63 is interposed between the ohmic electrode pattern 61 and the conductive substrate 71. The metal reflection layer 63 may be formed of a metal material having a high reflectance such as silver (Ag), aluminum (Al), platinum (Pt), or rhodium (Rh). The metal reflection layer 63 fills an opening in the ohmic electrode pattern 61 and may be in contact with the compound semiconductor layers, as shown.

In addition, an adhesive layer 67 may be interposed between the metal reflective layer 63 and the conductive substrate 71, and a diffusion barrier layer 65 may be interposed between the adhesive layer 67 and the metal reflective layer 63. The adhesive layer 67 improves the adhesion between the conductive substrate 71 and the metal reflection layer 63 to prevent the conductive substrate 71 from being separated from the metal reflection layer 63, and the diffusion barrier layer 65 may be formed by the adhesive layer 67 or Metal elements are prevented from diffusing from the conductive substrate 71 into the metal reflection layer 63 to maintain the reflectivity of the metal reflection layer 63.

Meanwhile, the electrode pad 73 is positioned on the upper surface of the compound semiconductor layers to face the conductive substrate 71. In addition, extension parts 73a extending from the electrode pad 73 may be located on the compound semiconductor layers. The extension parts 73a may be adopted to widely distribute current flowing into the compound semiconductor layers. Accordingly, light can be emitted by supplying a current through the conductive substrate 71 and the electrode pad 73. The extension parts 73a may be disposed in the same pattern as the ohmic electrode pattern 61, and may be mainly positioned above the opening of the ohmic electrode pattern 61 to evenly distribute current flowing into the compound semiconductor layers. Can be deployed. That is, when the ohmic electrode pattern 61 is a matrix pattern of islands, the extension parts may be disposed to be positioned above the opening between the matrixes of the islands, and the ohmic electrode pattern 61 may be parallel to each other. In the case of patterns, the extensions may be disposed above the openings between the line patterns. In addition, when the ohmic electrode pattern 61 is a reticular pattern, the extension parts 73a may be disposed above the openings of the reticular pattern.

The conventional vertical light emitting diode has an ohmic electrode layer (21 in FIG. 1) between the metal reflection layer (23 in FIG. 1) and the compound semiconductor layers. Therefore, since the light directed to the conductive substrate 31 is transmitted through the ohmic electrode layer 21 and then reflected by the metal reflection layer 23, light loss is generated by light absorption by the ohmic electrode layer 21. In contrast, according to the embodiment of the present invention, since the ohmic electrode pattern 61 having the opening is interposed between the metal reflection layer 63 and the compound semiconductor layer 59, and the metal reflection layer 63 fills the opening, At least a portion of the light directed to the conductive substrate 71 is reflected by the metal reflection layer 63 without passing through the ohmic electrode pattern 61. Therefore, the light loss due to the ohmic electrode pattern 61 can be reduced, thereby improving luminous efficiency. In addition, since the light absorption by the ohmic electrode pattern 61 can be reduced by forming a wide enough opening in the ohmic electrode pattern 61, the ohmic electrode pattern 61 can be formed thick to ensure stable ohmic contact characteristics. have.

3 to 6 are cross-sectional views illustrating a method of manufacturing a vertical light emitting diode having an ohmic electrode pattern 61 according to an embodiment of the present invention.

Referring to FIG. 3, compound semiconductor layers are formed on the sacrificial substrate 51. The sacrificial substrate 51 may be a sapphire substrate, but is not limited thereto and may be another hetero substrate. The compound semiconductor layers include a first conductive compound semiconductor layer 55, an active layer 57, and a second conductive compound semiconductor layer 59. The compound semiconductor layers are III-N-based compound semiconductor layers, and may be grown by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The first conductivity type and the second conductivity type represent N-type and P-type, or P-type and N-type.

Meanwhile, before forming the compound semiconductor layers, the buffer layer 53 may be formed. The buffer layer 53 is adopted to mitigate lattice mismatch between the sacrificial substrate 51 and the compound semiconductor layers, and may generally be a gallium nitride-based material layer.

Referring to FIG. 4, an ohmic electrode pattern 61 is formed on the compound semiconductor layers. The ohmic electrode pattern 61 may be formed to have various shapes such as a matrix pattern of islands, a plurality of lines or a reticular pattern. In addition, the ohmic electrode pattern may include a material in ohmic contact with the second conductivity-type semiconductor layer 59. For example, when the second conductivity-type semiconductor layer 59 is a P-type semiconductor, the ohmic electrode pattern 61 may include nickel (Ni), platinum (Pt), palladium (Pd), rhodium (Rh), and tungsten (W). ), Titanium (Ti) or gold (Au).

The ohmic electrode pattern 61 may be formed using a lithography technique. That is, an ohmic electrode layer (not shown) is formed on the second conductive compound semiconductor layer 59, and a photoresist pattern corresponding to the ohmic electrode pattern 61 is formed on the ohmic electrode layer by using lithography. The ohmic electrode layer may be a single layer, but is not limited thereto, and may be a stack formed of a plurality of layers. In addition, the photoresist pattern has openings exposing the ohmic electrode layer. Subsequently, an ohmic electrode pattern 61 having an opening is formed by etching the ohmic electrode layer using the photoresist pattern as an etching mask.

The ohmic electrode pattern 61 may also be formed using a lift-off technique. That is, a photoresist pattern having an opening for exposing the upper surface of the second conductivity-type semiconductor layer 59 is formed using a photoresist, and an ohmic electrode layer (not shown) is formed thereon. The ohmic electrode layer may fill the opening of the photoresist pattern and may also be formed on the photoresist pattern. Subsequently, the ohmic electrode layer filling the openings is left, and the ohmic electrode pattern 61 is formed by removing the ohmic electrode layer overlapped with the photosensitive agent together with the photosensitive agent.

The ohmic electrode layer or the ohmic electrode pattern may be heat-treated as necessary to make ohmic contact with the second conductivity-type semiconductor layer 59.

Referring to FIG. 5, the metal reflection layer 63 is formed on the compound semiconductor layers on which the ohmic electrode pattern 61 is formed. The metal reflection layer 63 may be formed by, for example, plating or deposition using silver (Ag), aluminum (Al), platinum (Pt), or rhodium (Rh).

The conductive substrate 71 is formed on the metal reflection layer 63. The conductive substrate 61 is a substrate such as Si, GaAs, GaP, AlGaINP, Ge, SiSe, GaN, AlInGaN or InGaN, but Al, Zn, Ag, W, Ti, Ni, Au, Mo, Pt, Pd, Cu It may be formed by attaching a single metal of Cr or Fe or an alloy substrate thereof on the compound semiconductor layers. In this case, the conductive substrate 61 may be attached to the metal reflection layer 63 through an adhesive layer 67, and formed on the metal reflection layer 63 before the diffusion barrier layer 65 forms the adhesive layer 67. Can be. On the other hand, the conductive substrate 71 may be formed using a plating technique. That is, the conductive substrate 71 may be formed by plating a metal such as Cu or Ni on the metal reflection layer 63, and for improving the diffusion barrier layer 65 and / or the adhesive force for preventing the diffusion of metal elements. An adhesive layer 67 can be added.

Referring to FIG. 6, a sacrificial substrate 51 is separated from the compound semiconductor layers. The sacrificial substrate 51 may be separated by laser lift off (LLO) technology or other mechanical or chemical methods. In this case, the buffer layer 53 is also removed to expose the first conductivity type compound semiconductor layer 55.

Subsequently, an electrode pad 73 is formed on the compound semiconductor layer 55. The electrode pad 73 is in ohmic contact with the first conductive compound semiconductor layer 55. In addition, while the electrode pad 73 is formed, extension parts 73a extending from the electrode pad 73 may be formed together. Thus, the vertical light emitting diode of FIG. 2 is manufactured.

Meanwhile, before forming the electrode pad 73 and the extension parts 73a, a transparent electrode (not shown) may be formed on the first conductivity type compound semiconductor layer 55. The transparent electrode is in ohmic contact with the first conductivity type compound semiconductor layer 55, and the electrode pad 73 is formed on the transparent electrode.

According to embodiments of the present invention, by adopting an ohmic electrode pattern having an opening, it is possible to provide a vertical light emitting diode which can reduce light absorption generated by the conventional ohmic electrode layer and thus improve luminous efficiency. In addition, a thick ohmic electrode pattern can be formed to ensure stable ohmic contact characteristics.

Claims (11)

A conductive substrate; Compound semiconductor layers on the conductive substrate and including a first conductivity type compound semiconductor layer, an active layer, and a second conductivity type compound semiconductor layer; An ohmic electrode pattern interposed between the compound semiconductor layers and the conductive substrate and in ohmic contact with the compound semiconductor layers, the ohmic electrode pattern having an opening exposing the compound semiconductor layers; A metal reflection layer interposed between the ohmic electrode pattern and the conductive substrate and filling the opening; Electrode pads positioned on the compound semiconductor layers opposite the conductive substrate; And Positioned on the compound semiconductor layers, the extension part extending from the electrode pad; The extension part is disposed more vertically on the opening of the ohmic electrode pattern than the ohmic electrode pattern. The method according to claim 1, And the ohmic electrode pattern is a matrix pattern of islands, a plurality of lines or a reticular pattern. delete delete The method according to claim 1, And a transparent electrode disposed on the compound semiconductor layers to face the conductive substrate. The method of claim 5, The transparent electrode is a vertical light emitting diode positioned between the electrode pad and the extension and the compound semiconductor layers. Forming compound semiconductor layers including the first conductive compound semiconductor layer, the active layer, and the second conductive compound semiconductor layer on the sacrificial substrate, Forming an ohmic electrode pattern having an opening exposing the compound semiconductor layers on the compound semiconductor layers, Forming a metal reflection layer on the compound semiconductor layers on which the ohmic electrode pattern is formed, Forming a conductive substrate on the metal reflection layer, Separating the sacrificial substrate from the compound semiconductor layers, After the sacrificial substrate is separated, forming an electrode pad and an extension part extending from the electrode pad on the compound semiconductor layers, And the extension part is formed to be positioned above the opening of the ohmic electrode pattern more than the ohmic electrode pattern. delete delete The method of claim 7, And forming a transparent electrode between the electrode pad and the extension part and the compound semiconductor layers. The method of claim 10, And the transparent electrode is formed before forming the electrode pad and the extension part.

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