KR101042117B1 - Manufacturing method of electronic circuit on thick copper by means of molding - Google Patents
Manufacturing method of electronic circuit on thick copper by means of molding Download PDFInfo
- Publication number
- KR101042117B1 KR101042117B1 KR1020080110094A KR20080110094A KR101042117B1 KR 101042117 B1 KR101042117 B1 KR 101042117B1 KR 1020080110094 A KR1020080110094 A KR 1020080110094A KR 20080110094 A KR20080110094 A KR 20080110094A KR 101042117 B1 KR101042117 B1 KR 101042117B1
- Authority
- KR
- South Korea
- Prior art keywords
- electronic circuit
- circuit
- thickness copper
- mold
- forming
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
본 발명은 두께동 전자회로 형성방법에 관한 것으로서, 금형성형에 의하여 제조원가 및 불량율을 낮출 수 있는 두께동 전자회로 형성방법 및 그에 따른 두께동 전자회로에 관한 것이다.The present invention relates to a method for forming a thickness copper electronic circuit, and to a method for forming a thickness copper electronic circuit capable of lowering a manufacturing cost and a defective rate by mold molding, and a thickness copper electronic circuit accordingly.
금형, 두께동, 전자회로 Mold, thickness copper, electronic circuit
Description
본 발명은 두께동 전자회로 형성방법에 관한 것으로서, 금형성형에 의하여 제조원가 및 불량율을 낮출 수 있는 두께동 전자회로 형성방법 및 그에 따른 두께동 전자회로에 관한 것이다. The present invention relates to a method for forming a thickness copper electronic circuit, and to a method for forming a thickness copper electronic circuit capable of lowering a manufacturing cost and a defective rate by mold molding, and a thickness copper electronic circuit accordingly.
일반적인 회로기판 제조 방법은 원판에 적층된 단면 또는 양면 동(Cu)을 화학적으로 에칭하여 회로를 구성하는데, 대형 파워부품 등에 적용되는 두께동 기판의 경우는 그 두께로 인하여, 세 차례에 걸치는 에칭작업을 거쳐서 회로를 구성하게 된다.In general, the circuit board manufacturing method chemically etches the single-sided or double-sided copper (Cu) laminated on the original plate.In the case of a thick copper substrate applied to a large power part, the etching process is performed three times due to its thickness. The circuit is constructed through the.
그러나 이와 같이 종래의 방법에 따라 회로를 형성하게 되면, 반복되는 에칭작업으로 1차 가공된 부분이 오버 에칭되어 단선 등의 불량이 발생하는바, 이는 회로형성에서 가장 난이도가 높은 공정으로서 제조원가 상승의 가장 큰 요인이다.However, when the circuit is formed according to the conventional method, defects such as disconnection may occur due to overetching of the first processed portion by repeated etching, which is the most difficult process in circuit formation, which leads to increased manufacturing cost. It is the biggest factor.
따라서 상술한 회로형성 방법의 문제점을 해결할 수 있다면, 두께동 전자회로 시장의 획기적인 발전을 기대할 수 있다.Therefore, if the problems of the above-described circuit forming method can be solved, a breakthrough in the thickness copper electronic circuit market can be expected.
본 발명은 종래 에칭방법에 의한 두께동 전자회로 형성방법의 문제점을 해결하기 위한 것으로서, 제조공정을 간소화하면서도 불량발생이 없는 두께동 전자회로형성방법의 제공을 목적으로 한다.The present invention is to solve the problems of the conventional method for forming a thick copper electronic circuit by the etching method, and to provide a method for forming a thick copper electronic circuit without the occurrence of defects while simplifying the manufacturing process.
본 발명은 두께동에 전자회로를 형성하는 방법에 있어서, i) 그라운드 전자회로 패턴 및 회로 사이를 연결하는 브리지를 포함하는 형상을 금형에 의하여 타발하여 일괄적으로 두께동 그라운드 회로를 구성하는 단계; ii) 상기 금형타발되어 그라운드 회로가 형성된 두께동을 절연층인 에폭시 레진원판과 접합시키는 단계; iii) 상기 절연층과 접합이 완료된 두께동에 대하여 PSR 도포인쇄(노광) 및 마킹 인쇄 공정을 수행하는 단계; 및 iv) 상기 인쇄공정이 완료된 전자회로를 펀칭작업하여 절단하고 상기 브리지를 제거하여 전자회로를 완성하는 단계;를 포함하는 것을 특징으로 하는 두께동 전자회로 형성방법을 제공한다.According to an aspect of the present invention, there is provided a method for forming an electronic circuit in a thickness copper, comprising the steps of: i) forming a thickness copper ground circuit in a batch by molding a shape including a ground electronic circuit pattern and a bridge connecting the circuit; ii) bonding the thickness copper on which the mold is punched to form a ground circuit with an epoxy resin disc which is an insulating layer; iii) performing a PSR coating (exposure) and marking printing process on the thickness copper with which the insulating layer is completed; And iv) cutting and cutting the electronic circuits having completed the printing process, and removing the bridges to complete the electronic circuits.
본 발명에 따르면, 금형에 의하여 두께동의 회로 형성이 가능하여 제조공정이 간소화되고 정확한 회로형성으로 불량율이 최소화 됨으로써 제품의 신뢰성 향상 및 대폭적인 제조원가 절감이 가능하다.According to the present invention, it is possible to form a circuit of the thickness copper by the mold, simplifying the manufacturing process and minimizing the defective rate by accurate circuit formation, it is possible to improve the reliability of the product and to significantly reduce the manufacturing cost.
본 발명에 따른 두께동 전자회로는 도 1의 흐름도와 같은 공정으로 제조될 수 있으며, 도 2는 도 1의 프로세스에 따라 전자회로가 완성되어가는 과정을 구성요소를 이용하여 도시한다. The thickness copper electronic circuit according to the present invention may be manufactured by the same process as in the flowchart of FIG. 1, and FIG. 2 illustrates a process of completing the electronic circuit according to the process of FIG. 1 using components.
우선, 그라운드 회로의 패턴에 대응하도록 설계된 금형에 의하여 두께동(1)을 금형타발하여 일괄적으로 그라운드 회로를 구성하되, 회로 사이(제품과 제품 및 제품과 외곽 사이)의 간격(2)을 연결하는 브리지(3)를 포함하여 이후의 공정에서 회로 형태가 그대로 유지될 수 있도록 한다. (도 1의 s10, 도 2의 (가))First, the thickness copper (1) is formed by a mold designed to correspond to the pattern of the ground circuit to form a ground circuit collectively, and the gap (2) between the circuits (product and product and the product and the perimeter) is connected. Including the bridge (3) to ensure that the circuit form is maintained in the subsequent process. (S10 in FIG. 1, (a) in FIG. 2)
다음으로, 상기 금형타발되어 그라운드회로가 형성된 두께동의 표면을 불균일하게 표면처리한 뒤, 에폭시 레진원판 등의 절연층(4)을 접합시킨다. (도 1의 s11, 도 2의 (나)) Next, after unevenly surface-treating the surface of the thickness copper with which the said metal mold was formed and the ground circuit was formed, the
상기 절연층 접합공정에서는 회로 사이(제품과 제품 및 제품과 외곽 사이)에 금형으로 타발되어 생긴 간격(2)에 절연층(4)이 함침되어 상기 간격(2)이 채워질 수 있도록 하며, 회로형태의 유지를 위하여 다수의 브리지(3)가 유지되어 있다.In the insulating layer joining process, the
상기와 같이 접합이 완료된 두께동은 일반적인 두께동 전자회로와 마찬가지로 PSR 도포인쇄(노광) 및 마킹 인쇄 공정 등을 거친다. (도 1의 s12, 도 2의 (다))As described above, the thickness copper, which has been bonded, is subjected to PSR coating (exposure) and marking printing processes as in the general thickness copper electronic circuit. (S12 in FIG. 1, (c) in FIG. 2)
최종적으로 펀칭작업을 통해 인쇄공정이 완료된 전자회로를 절단하게 되며, 이때 상기 브리지가 함께 절단되어 최종 제품은 종래와 같은 에칭방법에 의하여 생산된 두께동과 동일하게 되는 것이다.(도 1의 s13, 도 2의 (라) 및 (마))Finally, through the punching operation, the printed circuit is cut to complete the electronic circuit. At this time, the bridge is cut together so that the final product is the same as the thickness copper produced by the etching method as in the prior art. (D) and (E) of FIG. 2)
상기 제조공정에 따른 두께동 전자회로는 금형 타발에 의해 그라운드 회로를 형성하고 브리지를 형성하여 회로형성과정에서 회로의 형태가 안정적으로 유지되도 록 하며, 최종 펀칭작업에서 상기 브리지가 제거된다.The thick copper electronic circuit according to the manufacturing process forms a ground circuit by forming a mold and forms a bridge so that the shape of the circuit is stably maintained during the circuit formation process, and the bridge is removed in the final punching operation.
본 발명은 금형타발에 의하여 그라운드 회로를 제조하여 전자회로를 형성하는 구체적인 방법을 제시하였다는 데에 의의가 있는 것으로서, 제조가 용이하고 불량 발생의 소지를 없앤 경쟁력 있는 두께동 전자회로의 제공이 가능하다.The present invention has the significance of presenting a specific method for forming an electronic circuit by manufacturing a ground circuit by mold punching, and it is possible to provide a competitive thickness copper electronic circuit which is easy to manufacture and eliminates the possibility of defects. Do.
4온스 이상의 두께동 전자회로는 일반적으로 0.14t정도의 두께이기 때문에 이를 화학적으로 에칭하는 데에는 오버에칭의 문제가 심각하게 대두 되는 것으로서, 본 발명은 이를 해결하기 위하여 금형타발의 방법으로 일괄적인 회로형성이 가능하도록 하며 이를 위한 구체적인 방법을 제시하고 있는 것이다.Over 4 ounces thick copper electronic circuit is generally about 0.14t thick, so the problem of overetching is seriously etched by chemical etching. It makes this possible and suggests specific ways to do this.
상기 금형타발은 다양한 회로구성에 적용 가능하도록 구성된 그라운드 회로 패턴에 따른 금형을 이용하며, 금형 타발된 두께동은 최종 펀칭작업을 통해 다양한 두께동 전자회로로 완성된다.The mold punching uses a mold according to a ground circuit pattern configured to be applicable to various circuit configurations, and the mold punched thickness copper is completed into various thickness copper electronic circuits through a final punching operation.
도 1은 본 발명에 따른 두께동 전자회로 형성방법의 흐름도.1 is a flow chart of a method for forming a thickness copper electronic circuit according to the present invention.
도 2는 도 1에 따른 공정으로 완성되는 두께동 전자회로의 형성도.2 is a view illustrating the formation of a thickness copper electronic circuit completed by the process according to FIG. 1.
<주요 도면부호에 대한 설명><Description of the major reference numerals>
1 : 두께동 2 : 간격1: thickness copper 2: spacing
3 : 브리지 4 : 절연층3: bridge 4: insulation layer
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080110094A KR101042117B1 (en) | 2008-11-06 | 2008-11-06 | Manufacturing method of electronic circuit on thick copper by means of molding |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080110094A KR101042117B1 (en) | 2008-11-06 | 2008-11-06 | Manufacturing method of electronic circuit on thick copper by means of molding |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20100050957A KR20100050957A (en) | 2010-05-14 |
KR101042117B1 true KR101042117B1 (en) | 2011-06-16 |
Family
ID=42276880
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020080110094A KR101042117B1 (en) | 2008-11-06 | 2008-11-06 | Manufacturing method of electronic circuit on thick copper by means of molding |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR101042117B1 (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07254770A (en) * | 1994-03-16 | 1995-10-03 | Sumitomo Electric Ind Ltd | Manufacturing method of flexible printed wiring board |
KR100741677B1 (en) | 2006-03-06 | 2007-07-23 | 삼성전기주식회사 | Substrate manufacturing method by imprinting |
KR20070093751A (en) * | 2006-03-15 | 2007-09-19 | 주식회사 코리아써키트 | Manufacturing method of printed circuit board |
KR100771298B1 (en) | 2005-08-24 | 2007-10-29 | 삼성전기주식회사 | Manufacturing method of chip embedded PCB using an engraved mold |
-
2008
- 2008-11-06 KR KR1020080110094A patent/KR101042117B1/en not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07254770A (en) * | 1994-03-16 | 1995-10-03 | Sumitomo Electric Ind Ltd | Manufacturing method of flexible printed wiring board |
KR100771298B1 (en) | 2005-08-24 | 2007-10-29 | 삼성전기주식회사 | Manufacturing method of chip embedded PCB using an engraved mold |
KR100741677B1 (en) | 2006-03-06 | 2007-07-23 | 삼성전기주식회사 | Substrate manufacturing method by imprinting |
KR20070093751A (en) * | 2006-03-15 | 2007-09-19 | 주식회사 코리아써키트 | Manufacturing method of printed circuit board |
Also Published As
Publication number | Publication date |
---|---|
KR20100050957A (en) | 2010-05-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107484356B (en) | Manufacturing method of thick copper sandwich aluminum substrate | |
US8956918B2 (en) | Method of manufacturing a chip arrangement comprising disposing a metal structure over a carrier | |
CN107041077A (en) | A kind of circuit board producing method of turmeric and the golden compound base amount method of electricity | |
JP5379281B2 (en) | Method for manufacturing printed circuit board | |
US20120312775A1 (en) | Method for manufacturing a printed circuit board | |
KR20090029508A (en) | Fabricating method of printed circuit board using the carrier | |
CN104684260A (en) | Method for improving warpage of circuit board with asymmetric laminating structure | |
CN102577642B (en) | Printed circuit board and manufacturing methods | |
KR101042117B1 (en) | Manufacturing method of electronic circuit on thick copper by means of molding | |
KR101569192B1 (en) | Method for manufacturing rigid-flexible printed circuit board | |
CN110740564A (en) | dense network multilayer printed circuit board and processing method thereof | |
KR101067157B1 (en) | A fabricating method of printed circuit board | |
JP2011171353A (en) | Method of manufacturing printed board, and printed board using this | |
KR101044117B1 (en) | Method of Fabricating Printed Circuit Board | |
KR101088731B1 (en) | Method of manufacturing printed circuit board | |
CN105228349B (en) | A method of improve without golden on copper hole | |
KR20130067008A (en) | Method of manufacturing printed circuit board | |
CN104105346B (en) | A kind of manufacture method with bump pad printed board | |
KR101109662B1 (en) | Method for fabricating ultra-high reliable micro-electronic package and micro-electronic package fabricated using thereof | |
KR100871034B1 (en) | Fabricating method of paste bump for printed circuit board | |
KR100328854B1 (en) | A Method for Manufacturing a Flexible Printed Circuit Board Having Double Access structure | |
JP2007294932A (en) | Metal core printed wiring board and its manufacturing method | |
KR100861612B1 (en) | Fabricating method of printed circuit board using the carrier | |
JP3841672B2 (en) | Manufacturing method of double-sided flexible circuit board | |
US20090136656A1 (en) | Method of manufacturing printed circuit board |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20140708 Year of fee payment: 4 |
|
FPAY | Annual fee payment |
Payment date: 20150601 Year of fee payment: 5 |
|
FPAY | Annual fee payment |
Payment date: 20160609 Year of fee payment: 6 |
|
LAPS | Lapse due to unpaid annual fee |