KR100991105B1 - Method for fabricating highly conductive fine patterns using self-patterned conductors and plating - Google Patents

Method for fabricating highly conductive fine patterns using self-patterned conductors and plating Download PDF

Info

Publication number
KR100991105B1
KR100991105B1 KR1020090101313A KR20090101313A KR100991105B1 KR 100991105 B1 KR100991105 B1 KR 100991105B1 KR 1020090101313 A KR1020090101313 A KR 1020090101313A KR 20090101313 A KR20090101313 A KR 20090101313A KR 100991105 B1 KR100991105 B1 KR 100991105B1
Authority
KR
South Korea
Prior art keywords
polymer material
conductive ink
pattern
conductivity
forming
Prior art date
Application number
KR1020090101313A
Other languages
Korean (ko)
Inventor
신동윤
김인영
Original Assignee
한국기계연구원
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 한국기계연구원 filed Critical 한국기계연구원
Priority to KR1020090101313A priority Critical patent/KR100991105B1/en
Priority to PCT/KR2010/004321 priority patent/WO2011049284A1/en
Priority to US12/841,529 priority patent/US20110094889A1/en
Application granted granted Critical
Publication of KR100991105B1 publication Critical patent/KR100991105B1/en

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1258Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by using a substrate provided with a shape pattern, e.g. grooves, banks, resist pattern
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09DCOATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D11/00Inks
    • C09D11/02Printing inks
    • C09D11/10Printing inks based on artificial resins
    • C09D11/101Inks specially adapted for printing processes involving curing by wave energy or particle radiation, e.g. with UV-curing following the printing
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09DCOATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D5/00Coating compositions, e.g. paints, varnishes or lacquers, characterised by their physical nature or the effects produced; Filling pastes
    • C09D5/38Paints containing free metal not provided for above in groups C09D5/00 - C09D5/36
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70383Direct write, i.e. pattern is written directly without the use of a mask by one or multiple beams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12Using specific substances
    • H05K2203/121Metallo-organic compounds
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/105Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Abstract

PURPOSE: A method for forming a high conductive fine pattern using a conductive pattern and plating is provided to reduce electric resistance of an electrode by plating metal materials on the conductive pattern. CONSTITUTION: Polymer materials(20) are laminated on a substrate(10). A depression(30) is formed to partially expose the substrate by removing the part of polymer materials. Conductive ink(40) is laminated on a mask template. Metal materials are laminated on a conductive pattern(41).

Description

자기패턴된 전도성 패턴과 도금을 이용한 고전도도 미세패턴 형성방법 {METHOD FOR FABRICATING HIGHLY CONDUCTIVE FINE PATTERNS USING SELF-PATTERNED CONDUCTORS AND PLATING}High-conductivity fine pattern formation method using magnetic patterned conductive pattern and plating {METHOD FOR FABRICATING HIGHLY CONDUCTIVE FINE PATTERNS USING SELF-PATTERNED CONDUCTORS AND PLATING}

본 발명은 고전도도 미세패턴 형성방법에 관한 것으로서, 보다 상세하게는 고분자 물질 간의 상호작용에 의해 자기패턴(SELF-PATTERNING)된 도전성 패턴을 도금에 의해 더 높은 전도도를 가지는 미세전극패턴을 형성하는 방법에 관한 것이다.The present invention relates to a method for forming a high conductivity micropattern, and more particularly, to form a microelectrode pattern having a higher conductivity by plating a conductive pattern formed by a magnetic pattern (SELF-PATTERNING) by interaction between polymer materials. It is about a method.

전자 및 디스플레이 분야에서 공정 및 소재비용을 절감하고 손쉬운 대량생산을 위해 프린팅 공정을 통해 소자를 제작하기 위한 노력을 지속하고 있으며, 학계에서도 이러한 직접인쇄기술분야의 연구가 계속되고 있다.In the field of electronics and displays, efforts are being made to reduce the process and material costs and to manufacture devices through printing processes for easy mass production, and research in this field of direct printing technology continues.

예를 들어, 저온 동시소성 세라믹(Low Temperature Co-fired Ceramic) 기술을 이용한 RF 필터, 습도센서, 유기 박막트랜지스터(Organic Thin Film Transistor)와 같은 전자소자를 롤이나 잉크젯 인쇄방법을 이용하여 제작하기 위한 연구가 활발히 전개되어 왔다.For example, to manufacture electronic devices such as RF filters, humidity sensors, and organic thin film transistors using low temperature co-fired ceramic technology using a roll or inkjet printing method. Research has been actively developed.

그러나, 액상의 잉크를 이용한 잉크젯 인쇄방법은 프린터 노즐에서의 젖음(wetting) 현상으로 인하여 액적토출조건 및 토출방향이 바뀌는 등 수 마이크로 미터에서 수십 마이크로미터 단위의 미세한 패턴을 제작하기가 용이하지 않으며, 특히, 패턴 간의 정밀한 중첩이 필요한 박막트랜지스터의 경우 중첩 오차에 의하여 소자가 동작하지 못하는 문제가 있었다.However, the inkjet printing method using the liquid ink is not easy to produce a fine pattern of several micrometers to several tens of micrometers, such as the drop ejection condition and the discharge direction are changed due to the wetting phenomenon in the printer nozzle. In particular, in the case of a thin film transistor that requires precise overlap between patterns, there is a problem that the device cannot operate due to overlap error.

이와 같은 문제를 해결하기 위하여 본 출원인이 특허출원한 제10-2009-0055437호에서 마스크 템플릿을 이용한 미세패턴 형성방법이 제안되었다. 그러나 종래의 출원에서 마스크 템플릿의 비노출부를 형성하는 고분자 물질은 소수성 성질을 가지지 못하여 기판 상에 적층되고 추후 전극의 기능을 수행하는 전도성 잉크가 양측에 위치한 고분자 물질 내부로 스며드는 현상이 발생한다. 따라서 도전 패턴을 형성해야 할 노출부의 전도성 잉크의 양이 줄어들어 도전 패턴의 전기저항이 증가하고 도전패턴의 두께가 일정하게 유지되지 못하는 문제가 있다. 이와 같이 형성된 도전패턴의 두께가 얇아서 충분한 전도도를 가지지 못하는 문제가 있다.In order to solve such a problem, a method of forming a micropattern using a mask template has been proposed in Korean Patent Application No. 10-2009-0055437. However, in the conventional application, the polymer material forming the non-exposed portion of the mask template does not have hydrophobic properties, so that a phenomenon in which a conductive ink, which is stacked on a substrate and subsequently functions as an electrode, penetrates into the polymer material located at both sides thereof. Therefore, the amount of the conductive ink to expose the conductive pattern is reduced, there is a problem that the electrical resistance of the conductive pattern is increased and the thickness of the conductive pattern is not kept constant. There is a problem that the thickness of the conductive pattern formed as described above is not thin enough to have sufficient conductivity.

본 발명의 목적은 이와 같은 종래의 문제점을 해결하기 위한 것으로서, 고분자 물질과의 물리, 화학적 상호작용에 의해 자기패턴(self-patterning)된 도전패턴을 형성하고, 더 높은 전도도를 위해 자기패턴된 도전패턴을 도금함으로써, 이웃하는 고분자 물질 내부로 스며들어가서 소실된 전도성 잉크로 말미암아 야기되는 높은 저항값을 낮추는 고전도도 미세패턴 형성방법을 제공함에 있다.SUMMARY OF THE INVENTION An object of the present invention is to solve such a conventional problem, and to form a self-patterned conductive pattern by physical and chemical interaction with a polymer material, and a magnetic patterned conductive material for higher conductivity. The present invention provides a method for forming a high-conductivity micropattern that reduces the high resistance value caused by the conductive ink that penetrates into the neighboring polymer material and is lost by plating the pattern.

상기와 같은 목적을 달성하기 위하여 본 발명의 고전도도 미세패턴 형성방법은, 기판 상에 고분자 물질을 적층하는 고분자 물질 적층단계; 상기 고분자 물질 중 일부를 제거하여 상기 기판의 일부 영역을 외부에 노출시키는 함몰부를 형성하는 마스크 템플릿 형성단계; 상기 마스크 템플릿 상에 전도성 잉크를 적층하는 잉크 적층단계; 상기 전도성 잉크 내부에 용해된 금속 화합물로부터 금속 입자를 추출하기 위하여 열을 가하여, 상기 고분자 물질이 도포된 부위는 전기적 절연성을 가지는 절연패턴을 형성하고, 상기 함몰부 내의 전도성 잉크는 상기 금속 입자들이 추출되어 융합됨으로써 전기적 전도성을 가지는 도전패턴을 형성하는 열처리단계; 및 상기 도전패턴 상에 금속 물질을 적층하는 도금단계;를 포함하는 것을 특징으로 한다.In order to achieve the above object, the high-conductivity fine pattern forming method of the present invention includes a polymer material stacking step of stacking a polymer material on a substrate; A mask template forming step of removing a portion of the polymer material to form a recess for exposing a portion of the substrate to the outside; An ink lamination step of laminating conductive ink on the mask template; Heat is applied to extract metal particles from the metal compound dissolved in the conductive ink, so that the portion coated with the polymer material forms an insulating pattern having electrical insulation, and the conductive ink in the recess is extracted from the metal particles. Heat treatment to form a conductive pattern having electrical conductivity by fusion; And a plating step of laminating a metal material on the conductive pattern.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 도금단계 이후, 상기 기판 상에 적층된 절연패턴을 제거하는 절연패턴 제거단계;를 더 포함한다.In the method for forming a high conductivity fine pattern according to the present invention, preferably, after the plating step, the insulating pattern removing step of removing the insulating pattern laminated on the substrate; further includes.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 도금단계에서는, 전기화학적 반응을 이용한 전기도금 또는 광전기화학적 반응을 이용한 광유도도금(Light Induced Plating)을 이용한다.In the method of forming a high conductivity fine pattern according to the present invention, preferably, in the plating step, electroplating using an electrochemical reaction or light induced plating using a photoelectrochemical reaction is used.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 금속 물질은 은, 구리, 니켈 중 선택된 하나이다.In the method for forming a high conductivity fine pattern according to the present invention, preferably, the metal material is one selected from silver, copper, and nickel.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 기판은 실리콘 웨이퍼이며, 태양 전지의 제조에 이용된다.In the method for forming a high conductivity micropattern according to the present invention, preferably, the substrate is a silicon wafer and is used for the production of solar cells.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 열처리단계에서, 상기 고분자 물질 상에 적층된 전도성 잉크는 상기 고분자 물질 사이의 틈새로 침투하며, 열처리에 의해 상기 전도성 잉크로부터 추출된 금속 입자들이 상기 고분자 물질 내에서 이격되게 배치됨으로써 상기 절연패턴이 전체적으로 전기적 절연성을 가진다.In the method for forming a high conductivity fine pattern according to the present invention, preferably, in the heat treatment step, the conductive ink laminated on the polymer material penetrates into a gap between the polymer materials, and is formed from the conductive ink by heat treatment. The extracted metal particles are arranged to be spaced apart from each other in the polymer material so that the insulating pattern is electrically insulative.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 잉크 적층단계에서는, 잉크젯 인쇄법을 이용하여 상기 전도성 잉크를 적층한다.In the method of forming a high conductivity fine pattern according to the present invention, preferably, in the ink lamination step, the conductive ink is laminated using an inkjet printing method.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 마스크 템플릿 형성단계에서는, 상기 고분자 물질 측에 레이저를 조사하여 상기 고분자 물질을 제거한다.In the method of forming a high conductivity fine pattern according to the present invention, preferably, in the mask template forming step, the polymer material is removed by irradiating a laser to the polymer material side.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 마스크 템플릿 형성단계에서는, 상기 고분자 물질을 스탬프로 가압, 가열하여 임프 린팅함으로써 상기 고분자 물질을 제거한다.In the method of forming a high conductivity fine pattern according to the present invention, preferably, in the mask template forming step, the polymer material is removed by pressing and heating the polymer material with a stamp.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 열처리단계는, 상기 전도성 잉크 및 상기 고분자 물질을 150℃ 내지 350℃의 범위 내에서 가열한다.In the method for forming a high conductivity fine pattern according to the present invention, preferably, the heat treatment step heats the conductive ink and the polymer material within a range of 150 ° C to 350 ° C.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 고분자 물질은 폴리아닐린(polyaniline)이다.In the method for forming a high conductivity micropattern according to the present invention, preferably, the polymer material is polyaniline.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 전도성 잉크는 용액 상태의 유기 금속 화합물이다.In the method for forming a high conductivity fine pattern according to the present invention, preferably, the conductive ink is an organometallic compound in a solution state.

본 발명에 따른 고전도도 미세패턴 형성방법에 있어서, 바람직하게는, 상기 전도성 잉크는 금속 입자들을 더 포함한다.In the method of forming a high conductivity fine pattern according to the present invention, preferably, the conductive ink further includes metal particles.

본 발명의 고전도도 미세패턴 형성방법에 따르면, 전도성 잉크의 열처리를 통해 추출된 금속 입자들의 융합에 의해 획득되는 전도도보다 높은 전도도를 획득하기 위해, 도전패턴 상에 금속 물질을 도금함으로써, 전극의 전기저항을 감소시킬 수 있다.According to the method for forming a high conductivity micropattern of the present invention, in order to obtain a conductivity higher than that obtained by the fusion of metal particles extracted through heat treatment of the conductive ink, a metal material is plated on the conductive pattern, thereby The electrical resistance can be reduced.

또한 본 발명의 고전도도 미세패턴 형성방법은, 열처리단계를 거치면 고분자 물질은 자체적으로 또는 전도성 잉크와 화학적인 반응을 통해 절연성을 가지고, 전도성 잉크의 열처리를 통해 추출된 금속 입자들은 고분자 물질들에 의해 상호간 융합이 저해됨으로써 전체적으로 절연체의 성질을 띠는 반면, 기판 상에 적층된 전도성 잉크는 도전패턴을 형성함으로써, 마스크 템플릿 상에 전도성 잉크의 적층 정밀 도에 영향을 받지 않고 미세전극패턴을 형성할 수 있으며, 인접한 미세전극들 간의 절연성이 향상됨으로써 패턴 불량을 줄일 수 있다.In addition, according to the method of forming a high-conductivity micropattern of the present invention, after the heat treatment step, the polymer material has insulation by itself or by chemical reaction with the conductive ink, and the metal particles extracted through the heat treatment of the conductive ink are applied to the polymer materials. While mutual fusion is inhibited by each other, it has the property of an insulator as a whole, whereas the conductive ink deposited on the substrate forms a conductive pattern, thereby forming a microelectrode pattern without being affected by the stacking accuracy of the conductive ink on the mask template. The pattern defect may be reduced by improving insulation between adjacent microelectrodes.

이하, 본 발명에 따른 고전도도 미세패턴 형성방법의 실시예들을 첨부된 도면을 참조하여 상세히 설명한다.Hereinafter, embodiments of the method for forming a high conductivity fine pattern according to the present invention will be described in detail with reference to the accompanying drawings.

도 1은 본 발명의 일 실시예에 따른 고전도도 미세패턴 형성방법을 순서적으로 도시한 도면이고, 도 2는 에메랄딘 형태의 폴리아닐린이 페르니그라닐린 형태의 폴리아닐린으로 산화되는 과정의 화학식을 도시한 것이고, 도 3은 도 1의 전도성 잉크에 용해된 금속 화합물이 열처리에 의해 금속 입자들(nano-cluster)로 추출되고, 고분자 물질의 존재 유무에 따라 도전패턴과 절연패턴이 형성되는 과정을 도시한 도면이고, 도 4는 도 1의 열처리단계 이후 도전 패턴의 표면저항(a)과 절연 패턴의 표면저항(b)을 측정하여 그래프로 도시한 도면이다.1 is a view illustrating a method of forming a high conductivity micropattern according to an embodiment of the present invention in sequence, Figure 2 is a chemical formula of a process of oxidizing the polyaniline of the emeraldine form to polyaniline of the form of granniline 3 illustrates a process in which a metal compound dissolved in the conductive ink of FIG. 1 is extracted into metal particles (nano-cluster) by heat treatment, and a conductive pattern and an insulating pattern are formed according to the presence or absence of a polymer material. FIG. 4 is a graph illustrating measurement of the surface resistance (a) of the conductive pattern and the surface resistance (b) of the insulating pattern after the heat treatment step of FIG. 1.

도 1 내지 도 4를 참조하면, 본 실시예의 고전도도 미세패턴 형성방법은, 고분자 물질 적층단계(S10)와, 마스크 템플릿 형성단계(S20)와, 잉크 적층단계(S30)와, 열처리단계(S40)와, 도금단계(S50)와, 절연패턴 제거단계(S60)를 포함한다.1 to 4, the method of forming high-conductivity micropatterns according to the present embodiment includes a polymer material stacking step S10, a mask template forming step S20, an ink stacking step S30, and a heat treatment step ( S40, the plating step S50, and the insulating pattern removing step S60.

상기 고분자 물질 적층단계(S10)에서는, 고분자(20) 물질을 기판(10)의 상측에 적층한다. 고분자 물질(20)의 적층은 원심력을 이용하여 물질을 도포하는 스핀코팅(spin-coating)이나 슬릿코팅과 같은 코팅방식, 혹은 롤 코터나 스크린 프린팅과 같은 인쇄방식에 의한다. 본 실시예에서는 스핀코터(spin-coater)의 회전수를 500rpm으로 설정하여, 20초 동안 기판(10)의 상측에 고분자 물질(20)을 도포한다. 한편 고분자 물질(20)은 스프레이 코팅방식에 의하여 적층될 수도 있다.In the polymer material stacking step (S10), the polymer 20 material is stacked on the substrate 10. The stacking of the polymer material 20 may be performed by a coating method such as spin-coating or slit coating using a centrifugal force or by a printing method such as a roll coater or screen printing. In this embodiment, the spin coater is set at a rotational speed of 500 rpm, and the polymer material 20 is coated on the substrate 10 for 20 seconds. Meanwhile, the polymer material 20 may be laminated by spray coating.

본 실시예에서 기판(10)에 적층되는 고분자 물질(20)은, 제조방법이 간단하고 다른 고분자 물질에 비하여 열적 특성이 우수한 폴리아닐린(polyaniline)을 사용하며, 폴리아닐린은 루코-에메랄딘 형태(lecu-emeraldine base), 에메랄딘 형태(emeraldine base) 혹은 페르니그라닐린 형태(pernigraniline base)로 기판(10)에 적층될 수 있다. 그러나, 입자상의 절연성 물질임과 동시에 금속 화합물을 포함한 전도성 잉크(40)에서 열처리에 의해 추출된 금속 입자(43)들을 상호 이격되게 함으로써 절연성을 나타낼 수 있는 물질이라면 그 조성에 대해서 본 발명의 취지에 반하지 않는 제한받지 않는다.In the present embodiment, the polymer material 20 laminated on the substrate 10 uses a polyaniline that is simple in manufacturing method and excellent in thermal properties as compared to other polymer materials, and the polyaniline is in the form of leuc-emeraldine. The substrate 10 may be stacked in an emeraldine base, an emeraldine base, or a pernigraniline base. However, as long as it is a particulate insulating material and a material that can exhibit insulation by separating the metal particles 43 extracted by heat treatment from the conductive ink 40 including a metal compound from each other, the composition of the present invention will be described in terms of its composition. It is not restricted not to fall in love.

에메랄딘 형태의 폴리아닐린은 루코-에메랄딘 형태(leuco-emeraldine base)의 폴리아닐린이 부분적으로 산화된 형태의 물질로써, 전도성을 가지며 녹색을 띈다. 따라서, 기판(10)에 에메랄딘 형태의 폴리아닐린이 적층되면 기판(10)은 전체적으로 녹색을 띈다.Polyaniline in the form of emeraldine is a partially oxidized form of polyaniline in the leuco-emeraldine base, which is conductive and green. Therefore, when polyaniline in the form of emeraldine is laminated on the substrate 10, the substrate 10 becomes green.

기판(10)에 폴리아닐린을 적층한 후에 이를 170℃에서 5분간 가열하여 폴리아닐린에 잔존하는 유기용매를 제거함과 동시에 폴리아닐린의 유기용매에 대한 내성을 증가시키도록 한다.After laminating the polyaniline on the substrate 10, it is heated at 170 ° C. for 5 minutes to remove the organic solvent remaining in the polyaniline and to increase the polyaniline resistance to the organic solvent.

상기 마스크 템플릿 형성단계(S20)에서는, 기판(10)에 적층된 고분자 물질(20)의 상측에서 532nm의 파장대를 가지는 레이저를 조사하여 고분자 물질(20)의 일부를 제거한다. 이때 기판(10)을 훼손하지 않으며 고분자 물질(20)을 용이하게 제거할 수 있는 한, 레이저의 파장대에 의해 본 발명이 제한받지 않는다. 고분자 물질(20)이 제거되면 기판(10)의 일부 영역을 외부에 노출되는 함몰부(30)가 마련된다. 본 명세서에서는 함몰부(30)와, 함몰부(30)에 이웃하게 배치되며 제거되지 않고 기판(10) 상에 적층된 채로 남겨진 고분자 물질(20)을 포함하여 마스크 템플릿이라 정의한다.In the mask template forming step (S20), a portion of the polymer material 20 is removed by irradiating a laser having a wavelength band of 532 nm from the polymer material 20 stacked on the substrate 10. In this case, the present invention is not limited by the wavelength band of the laser as long as the substrate 10 can be easily removed and the polymer material 20 can be easily removed. When the polymer material 20 is removed, the recessed portion 30 exposing a portion of the substrate 10 to the outside is provided. In the present specification, the recess 30 is defined as a mask template including the polymer material 20 disposed adjacent to the recess 30 and left stacked on the substrate 10 without being removed.

상기 잉크 적층단계(S30)에서는, 마스크 템플릿 상에 전도성 잉크(40)를 적층한다. 본 실시예에서는 잉크젯 인쇄법을 이용하여 함몰부(30) 내부에 전도성 잉크(40)를 적층한다. 전도성 잉크(40)를 토출하는 노즐부(미도시)가 함몰부(30)의 경로와 일치되어 함몰부(30) 영역에만 전도성 잉크(40)가 충진되는 것이 바람직하겠지만, 노즐부를 구동하는 구동장치의 오차, 노즐부의 액적토출조건의 변화 등의 요인에 의해 전도성 잉크(40)는 함몰부(30) 영역뿐만 아니라 함몰부(30)의 옆의 고분자 물질(20) 상측에도 적층되는 것이 일반적이다.In the ink lamination step S30, the conductive ink 40 is laminated on the mask template. In the present embodiment, the conductive ink 40 is laminated inside the recess 30 using the inkjet printing method. Although the nozzle unit (not shown) for discharging the conductive ink 40 coincides with the path of the recess 30, the conductive ink 40 is preferably filled only in the recess 30, but a driving device for driving the nozzle unit The conductive ink 40 is generally laminated not only on the recessed portion 30 region but also on the upper side of the polymer material 20 next to the recessed portion 30 due to an error, a change in the droplet ejection condition of the nozzle portion, and the like.

본 실시예에서 적층되는 전도성 잉크(40)는, 유기용매에 실버를 포함한 유기 화합물을 용해시킨 용액 형태의 유기 실버 잉크(organometallic silver compound)로 마련되며, 실버 잉크를 녹이는데 사용되는 유기용매로서는 금속 화합물의 조성에 따라 알코올과 같은 극성용매, 혹은 톨루엔, 크실렌과 같은 비극성용매가 사용될 수 있다. 또한, 하이브리드 타입으로써, 금속 화합물을 용해한 용액에 실버, 구리 등과 같은 금속 입자를 일부 포함시킨 전도성 잉크(40)가 사용될 수 있다.The conductive ink 40 laminated in the present embodiment is provided as an organic silver ink in the form of a solution in which an organic compound including silver is dissolved in an organic solvent. The organic ink used to melt the silver ink is a metal. Depending on the composition of the compound, a polar solvent such as alcohol or a non-polar solvent such as toluene or xylene may be used. In addition, as the hybrid type, a conductive ink 40 in which metal particles such as silver and copper are partially contained in a solution in which a metal compound is dissolved may be used.

본 실시예에서 적층되는 전도성 잉크(40)는 이외에도 다양한 종류의 금속 화합물일 수 있으며, 열처리에 의해 금속 입자로 추출될 수 있는 한, 그 조성에 의해 본 발명이 제한을 받지 않는다.In addition to the conductive ink 40 laminated in the present embodiment may be various kinds of metal compounds, as long as it can be extracted into metal particles by heat treatment, the present invention is not limited by the composition.

상기 열처리단계(S40)에서는, 150℃ 내지 350℃ 범위 내의 온도에서 그에 대응되는 최적의 시간 동안 전도성 잉크(40)와 고분자 물질(20)을 가열함으로써, 고분자 물질(20)은 전기적 절연성을 가지는 절연패턴(21)으로 변화되고, 전도성 잉크(40)는 전기적 전도성을 가지는 도전패턴(41)으로 변화된다. 도 1(d)에 도시된 바와 같이, 열처리단계(S40)를 거치면 함몰부(30) 내부의 전도성 잉크(40)와, 고분자 물질(20)에는 서로 다른 변화가 발생한다.In the heat treatment step (S40), by heating the conductive ink 40 and the polymer material 20 for an optimal time corresponding to the temperature in the range of 150 ℃ to 350 ℃, the polymer material 20 is insulated having electrical insulation The pattern 21 is changed, and the conductive ink 40 is changed into a conductive pattern 41 having electrical conductivity. As shown in FIG. 1 (d), when the heat treatment step (S40) is performed, different changes occur in the conductive ink 40 and the polymer material 20 in the depression 30.

함몰부(30) 영역에서는, 기판(10)의 상측에 적층된 유기 실버 잉크에서 금속성의 실버 입자(43)들이 추출되고, 추출된 실버 입자(43)들은 서로 융합하여(nano-cluster) 전도성 네트워크를 형성하면서 전기적 전도성을 가지게 된다. 함몰부(30) 영역에서의 기판(10) 상에 배치된 실버 입자(43)들은 도전패턴(41)을 형성한다.In the depression 30 region, metallic silver particles 43 are extracted from the organic silver ink stacked on the upper side of the substrate 10, and the extracted silver particles 43 are fused to each other (nano-cluster) to form a conductive network. It has electrical conductivity while forming. The silver particles 43 disposed on the substrate 10 in the recess 30 form the conductive pattern 41.

한편, 도 2를 참조하면, 고분자 물질(20)과 유기 실버 잉크가 적층된 영역에서는, 에메랄딘 형태의 고분자 물질(20) 즉, 폴리아닐린은 완전산화(oxidation)되며, 페르니그라닐린 형태(pernigraniline base)의 폴리아닐린으로 변환된다. 페르니그라닐린 형태의 폴리아닐린은 표면저항이 크므로 전기적 전도성을 갖지 못하고, 색깔은 녹색에서 짙은 푸른색 혹은 검은색으로 바뀐다.Meanwhile, referring to FIG. 2, in the region in which the polymer material 20 and the organic silver ink are stacked, the polymer material 20 in the emeraldine form, that is, polyaniline is completely oxidized, and the pernigraniline form. base) to polyaniline. The polyaniline in the form of fernigraniline has a high surface resistance and thus has no electrical conductivity, and the color is changed from green to dark blue or black.

폴리아닐린의 상측에 도포된 전도성 잉크(40)는 페르니그라닐린 형태의 폴리아닐린의 내부로 침투하고, 열처리에 의해 추출된 금속성의 실버 입자(43)들은 폴리아닐린 사이사이에 배치되어 융합하지 못함으로써 전기적 전도성 네트워크를 형성하지 못한다. 따라서, 융합된 형태에서만 나타날 수 있는 실버 입자(43)들의 전 기적 전도성이 발현되지 못하고, 폴리아닐린과 그 내부에 존재하는 실버 입자(43)는 전체적으로 전기적인 절연성을 가지는 절연패턴(21)을 형성한다.The conductive ink 40 applied on the upper side of the polyaniline penetrates into the inside of the polyaniline in the form of fernigraniline, and the metallic silver particles 43 extracted by the heat treatment are disposed between the polyanilines and are not electrically fused. It does not form a network. Therefore, the electrical conductivity of the silver particles 43 which may appear only in the fused form is not expressed, and the polyaniline and the silver particles 43 present therein form an insulating pattern 21 having electrical insulation as a whole. .

도 3(a)를 참조하면, 고분자 물질(20) 상에 적층된 전도성 잉크(40)는 고분자 물질(20) 사이의 공극으로 침투하며, 열처리 후에 높은 전도성의 실버 입자(43)들이 생성되더라도 고분자 물질(20)에 의해 융합되지 못함으로써 전기적 전도성의 네트워크를 형성하지 못하지만, 도 3(b)에 도시된 바와 같이 함몰부(30) 영역에서 기판(10)상에 적층된 전도성 잉크(40)로부터 추출된 금속성 실버 입자(43)들은 서로 융합하여 높은 전기적 전도성의 네트워크를 형성한다.Referring to FIG. 3 (a), the conductive ink 40 stacked on the polymer material 20 penetrates into the pores between the polymer material 20, and even after the heat treatment, the silver particles 43 having high conductivity are produced. It is not fused by the material 20 to form an electrically conductive network, but from the conductive ink 40 deposited on the substrate 10 in the region of the depression 30 as shown in FIG. 3 (b). The extracted metallic silver particles 43 fuse with each other to form a network of high electrical conductivity.

상술한 현상은 본 실시예의 도전패턴(41)과 절연패턴(21)의 각각의 표면저항값을 측정함으로써 확인할 수 있다. 도 4를 참조하면, 210℃ 온도에서 20분간 열처리한 후 측정된 도전 패턴(41)의 표면저항은 2.57±0.06Ω/□ 이고, 절연 패턴(21)의 표면저항은 6.01±1.46MΩ/□ 이상으로 측정된다.The above phenomenon can be confirmed by measuring the surface resistance values of the conductive pattern 41 and the insulating pattern 21 of the present embodiment. Referring to FIG. 4, the surface resistance of the conductive pattern 41 measured after heat treatment at 210 ° C. for 20 minutes is 2.57 ± 0.06 kΩ / □, and the surface resistance of the insulating pattern 21 is 6.01 ± 1.46 Mk / □ or more. Is measured.

상기 도금단계(S50)에서는, 도전패턴(41) 상에 금속 물질(50)을 전기화학적 전기도금 혹은 광전기화학적 광유도도금을 통해 적층한다. 일반적으로 기판(10) 상에 적층되는 고분자 물질(20)은 완벽한 소수성 성질을 가지지 못하기 때문에 함몰부(30) 영역에 충진되는 전도성 잉크(40)가 공정 중에 이웃하는 고분자 물질(20) 내부로 스며드는 현상이 발생한다. 전도성 잉크(40)는 도전패턴(41)을 형성하여 추후 전극으로 이용되는데, 양이 줄어들게 되면 전극의 두께가 감소하고 전기저항이 커지는 문제가 발생한다. 따라서 도전패턴(41) 위에 금속 물질(50)을 적층함으로써 고분자 물질(20) 내부로 스며든 전도성 잉크(40)로 말미암아 얇아진 두께로 인해 높은 전기저항을 보이는 도전패턴(41)의 전도도를 향상시킬 수 있다.In the plating step (S50), the metal material 50 is laminated on the conductive pattern 41 by electrochemical electroplating or photoelectrochemical photoinduction plating. In general, since the polymer material 20 stacked on the substrate 10 does not have perfect hydrophobicity, the conductive ink 40 filled in the depression 30 is transferred into the neighboring polymer material 20 during the process. Soaking occurs. The conductive ink 40 forms a conductive pattern 41 to be used later as an electrode. When the amount is reduced, the thickness of the electrode decreases and the electrical resistance increases. Therefore, by stacking the metal material 50 on the conductive pattern 41, the conductivity of the conductive pattern 41 showing high electrical resistance due to the thinned thickness of the conductive ink 40 penetrated into the polymer material 20 can be improved. Can be.

본 실시예의 도금단계에서는, 전기도금(electroplating) 또는 광유도도금(Light Induced Plating)을 이용한다. 전기도금은 도전패턴(41)에 음극을 연결하고 전원을 공급하여 도전패턴(41) 상에 금속 물질(50)을 코팅하는 방법으로서, 통상의 기술자에게 잘 알려진 사항이므로 더이상의 상세한 설명은 생략한다. 광유도도금은 도전패턴(41)에 음극을 연결하고 빛을 조사함으로써 기전력을 발생시켜 도전패턴(41) 상에 금속 물질(50)을 적층하는 도금방법이다.In the plating step of the present embodiment, electroplating or light induced plating is used. Electroplating is a method of coating the metal material 50 on the conductive pattern 41 by connecting a cathode to the conductive pattern 41 and supplying power, which is well known to those skilled in the art, and thus, further detailed description thereof will be omitted. . Photo-induction plating is a plating method in which a metal material 50 is stacked on the conductive pattern 41 by generating electromotive force by connecting a cathode to the conductive pattern 41 and irradiating light.

도전패턴(41) 상에 적층되는 금속 물질(50)은 은, 구리, 니켈 중 선택된 하나이며, 이 외에도 전기적 전도성이 우수하며 기 패턴된 도전패턴(41)과 우수한 밀착력을 보이며 부식 등에 강한 저항을 보이는 한 다양한 금속 재질이 이용될 수 있다.The metal material 50 stacked on the conductive pattern 41 is one selected from silver, copper, and nickel. In addition, the metal material 50 is excellent in electrical conductivity, exhibits excellent adhesion to the pre-patterned conductive pattern 41, and has a strong resistance to corrosion. Various metal materials may be used as far as it is visible.

상기 절연패턴 제거단계(S60)에서는, 기판(10) 상에 적층된 절연패턴(21)을 제거한다. 절연패턴(21)이 제거되면 기판(10) 상에는 도전패턴(41)과 금속 물질(50)이 적층되어 만들어진 전극(60)만이 남게 되고, 태양 전지 제조에 이용되는 경우 절연패턴(21)이 제거된 영역에는 반사 방지막 등의 다른 층이 적층될 수 있다.In the insulating pattern removing step (S60), the insulating pattern 21 stacked on the substrate 10 is removed. When the insulating pattern 21 is removed, only the electrode 60 formed by stacking the conductive pattern 41 and the metal material 50 is left on the substrate 10. When the insulating pattern 21 is used for manufacturing a solar cell, the insulating pattern 21 is removed. Another layer, such as an anti-reflection film, may be stacked in the area.

본 실시예의 고전도도 미세패턴 형성방법은 전자회로기판 등의 제조에 사용될 수 있으며, 특히 광유도도금의 경우에는 태양 전지의 제조에 이용되는 것이 바람직하며, 태양 전지 제조에 이용되는 경우 기판(10)은 실리콘 웨이퍼인 것이 바람직하다.The method of forming a high-conductivity fine pattern of the present embodiment may be used for manufacturing an electronic circuit board, and the like, and in particular, in the case of photo-induction plating, it is preferable to be used for manufacturing a solar cell. ) Is preferably a silicon wafer.

상술한 바와 같이 구성된 본 실시예의 고전도도 미세패턴 형성방법은, 고분자 물질 내부로 스며든 전도성 잉크의 양을 보충하기 위하여 도전패턴 상에 금속 물질을 도금함으로써, 전극의 전기저항을 감소시키는 효과를 얻을 수 있다.The high-conductivity micropattern forming method of this embodiment configured as described above has the effect of reducing the electrical resistance of the electrode by plating a metal material on the conductive pattern to compensate for the amount of conductive ink penetrated into the polymer material. You can get it.

또한 상술한 바와 같이 구성된 본 실시예의 고전도도 미세패턴 형성방법은, 열처리단계를 거치면 기판 상에 적층된 고분자 물질은 자체적으로 또는 전도성 잉크와 물리적, 화학적 반응에 의해 절연패턴을 형성하고, 기판 상에 적층된 전도성 잉크는 도전패턴을 형성함으로써, 마스크 템플릿 상에서 도전패턴과 절연패턴이 스스로 발현되는 자기패턴됨으로써 전도성 잉크의 도포 정밀도와는 무관하게 미세한 패턴을 전기적 합선과 같은 불량 없이 제작할 수 있는 효과를 얻을 수 있다.In addition, in the method of forming the high conductivity micropattern according to the present embodiment configured as described above, after the heat treatment step, the polymer material laminated on the substrate forms an insulation pattern by itself or by physical and chemical reaction with the conductive ink, The conductive ink laminated on the conductive pattern forms a conductive pattern, and a magnetic pattern in which the conductive pattern and the insulating pattern are self-expressed on the mask template, thereby producing a fine pattern without defects such as electrical shorts, regardless of the application accuracy of the conductive ink. You can get it.

본 발명의 실시예들에 있어서, 레이저를 이용하여 일부 고분자 물질을 제거함으로써 마스크 템플릿을 형성하였으나, 고분자 물질을 기판 상에 적층한 후 임프린팅 방식을 통하여 마스크 템플릿을 제작할 수도 있다.In embodiments of the present invention, the mask template is formed by removing some polymer material using a laser, but the mask template may be manufactured by imprinting after stacking the polymer material on the substrate.

본 발명의 실시예들에 있어서, 전도성 잉크로 유기 실버 잉크가 이용되었으나, 미세패턴의 종류에 따라 금, 아연, 백금, 니켈, 구리 등의 유기 금속 화합물들이 본 발명의 취지가 훼손되지 않는 한 그 조성에 제한을 받지 않고 이용될 수 있다.In the embodiments of the present invention, an organic silver ink is used as the conductive ink, but organometallic compounds such as gold, zinc, platinum, nickel, and copper may be used according to the type of micropattern so long as the gist of the present invention is not impaired. It can be used without limitation in composition.

본 발명의 권리범위는 상술한 실시예에 한정되는 것이 아니라 첨부된 특허청구범위 내에서 다양한 형태의 실시예로 구현될 수 있다. 특허청구범위에서 청구하는 본 발명의 요지를 벗어남이 없이 당해 발명이 속하는 기술 분야에서 통상의 지식을 가진 자라면 누구든지 변형 가능한 다양한 범위까지 본 발명의 청구범위 기재 의 범위 내에 있는 것으로 본다.The scope of the present invention is not limited to the above-described embodiment, but may be embodied in various forms of embodiments within the scope of the appended claims. Without departing from the gist of the invention claimed in the claims, it is intended that any person skilled in the art to which the present invention pertains falls within the scope of the claims described in the present invention to various extents which can be modified.

도 1은 본 발명의 일 실시예에 따른 고전도도 미세패턴 형성방법을 순서적으로 도시한 도면이고,1 is a view sequentially showing a method of forming a high conductivity fine pattern according to an embodiment of the present invention,

도 2는 에메랄딘 형태의 폴리아닐린이 페르니그라닐린 형태의 폴리아닐린으로 산화되는 과정의 화학식을 도시한 것이고,Figure 2 shows the chemical formula of the process of oxidizing polyaniline in the form of emeraldine to polyaniline in the form of fernigranyline,

도 3은 도 1의 전도성 잉크에 용해된 금속 화합물이 열처리에 의해 금속 입자들(nano-cluster)로 추출되고, 고분자 물질의 존재 유무에 따라 도전패턴과 절연패턴이 형성되는 과정을 도시한 도면이고,3 is a view illustrating a process in which a metal compound dissolved in the conductive ink of FIG. 1 is extracted into metal particles (nano-cluster) by heat treatment, and a conductive pattern and an insulating pattern are formed according to the presence or absence of a polymer material. ,

도 4는 도 1의 열처리단계 이후 도전 패턴의 표면저항(a)과 절연 패턴의 표면저항(b)을 측정하여 그래프로 도시한 도면이다.4 is a graph illustrating measurement of the surface resistance (a) of the conductive pattern and the surface resistance (b) of the insulating pattern after the heat treatment step of FIG. 1.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>

10: 기판 20: 고분자 물질10: substrate 20: polymer material

21: 절연패턴 30: 함몰부21: insulation pattern 30: depression

40: 전도성 잉크 41: 도전패턴40: conductive ink 41: conductive pattern

50: 금속 물질 60: 전극50: metal material 60: electrode

Claims (13)

기판 상에 고분자 물질을 적층하는 고분자 물질 적층단계;Stacking a polymer material on the substrate; 상기 고분자 물질 중 일부를 제거하여 상기 기판의 일부 영역을 외부에 노출시키는 함몰부를 형성하는 마스크 템플릿 형성단계;A mask template forming step of removing a portion of the polymer material to form a recess for exposing a portion of the substrate to the outside; 상기 마스크 템플릿 상에 전도성 잉크를 적층하는 잉크 적층단계;An ink lamination step of laminating conductive ink on the mask template; 상기 전도성 잉크 내부에 용해된 금속 화합물로부터 금속 입자를 추출하기 위하여 열을 가하여, 상기 고분자 물질이 도포된 부위는 전기적 절연성을 가지는 절연패턴을 형성하고, 상기 함몰부 내의 전도성 잉크는 상기 금속 입자들이 추출되어 융합됨으로써 전기적 전도성을 가지는 도전패턴을 형성하는 열처리단계; 및Heat is applied to extract metal particles from the metal compound dissolved in the conductive ink, so that the portion coated with the polymer material forms an insulating pattern having electrical insulation, and the conductive ink in the recess is extracted from the metal particles. Heat treatment to form a conductive pattern having electrical conductivity by fusion; And 상기 도전패턴 상에 금속 물질을 적층하는 도금단계;를 포함하는 것을 특징으로 하는 고전도도 미세패턴 형성방법.Plating step of depositing a metal material on the conductive pattern; high-conductivity fine pattern forming method comprising a. 제1항에 있어서,The method of claim 1, 상기 도금단계 이후,After the plating step, 상기 기판 상에 적층된 절연패턴을 제거하는 절연패턴 제거단계;를 더 포함하는 것을 특징으로 하는 고전도도 미세패턴 형성방법.And a dielectric pattern removing step of removing the dielectric pattern stacked on the substrate. 제1항에 있어서,The method of claim 1, 상기 도금단계에서는, 전기화학적 반응을 이용한 전기도금 또는 광전기화학 적 반응을 이용한 광유도도금(Light Induced Plating)을 이용하는 것을 특징으로 하는 고전도도 미세패턴 형성방법.In the plating step, a high-conductivity fine pattern forming method characterized in that using electroplating using an electrochemical reaction or light induced plating using a photoelectrochemical reaction (Light Induced Plating). 제1항에 있어서,The method of claim 1, 상기 금속 물질은 은, 구리, 니켈 중 선택된 하나인 것을 특징으로 하는 고전도도 미세패턴 형성방법.The metal material is a high conductivity micropattern forming method, characterized in that the selected one of silver, copper, nickel. 제1항에 있어서,The method of claim 1, 상기 기판은 실리콘 웨이퍼이며,The substrate is a silicon wafer, 태양 전지의 제조에 이용되는 것을 특징으로 하는 고전도도 미세패턴 형성방법.A method of forming a high conductivity micropattern, which is used for manufacturing a solar cell. 제1항에 있어서,The method of claim 1, 상기 열처리단계에서,In the heat treatment step, 상기 고분자 물질 상에 적층된 전도성 잉크는 상기 고분자 물질 사이의 틈새로 침투하며, 열처리에 의해 상기 전도성 잉크로부터 추출된 금속 입자들이 상기 고분자 물질 내에서 이격되게 배치됨으로써 상기 절연패턴이 전체적으로 전기적 절연성을 가지는 것을 특징으로 하는 고전도도 미세패턴 형성방법.The conductive ink laminated on the polymer material penetrates into a gap between the polymer materials, and the metal particles extracted from the conductive ink by heat treatment are spaced apart in the polymer material so that the insulating pattern has electrical insulation as a whole. High-conductivity fine pattern forming method, characterized in that. 제1항에 있어서,The method of claim 1, 상기 잉크 적층단계에서는, 잉크젯 인쇄법을 이용하여 상기 전도성 잉크를 적층하는 것을 특징으로 하는 고전도도 미세패턴 형성방법.In the ink stacking step, a high conductivity fine pattern forming method characterized in that the conductive ink is laminated using an inkjet printing method. 제1항에 있어서,The method of claim 1, 상기 마스크 템플릿 형성단계에서는, 상기 고분자 물질 측에 레이저를 조사하여 상기 고분자 물질을 제거하는 것을 특징으로 하는 고전도도 미세패턴 형성방법.In the mask template forming step, the high-conductivity fine pattern forming method, characterized in that for removing the polymer material by irradiating a laser on the polymer material side. 제1항에 있어서,The method of claim 1, 상기 마스크 템플릿 형성단계에서는, 상기 고분자 물질을 스탬프로 가압, 가열하여 임프린팅함으로써 상기 고분자 물질을 제거하는 것을 특징으로 하는 고전도도 미세패턴 형성방법.In the mask template forming step, the high-conductivity micro-pattern forming method of removing the polymer material by imprinting by pressing, heating and pressing the polymer material with a stamp. 제1항에 있어서,The method of claim 1, 상기 열처리단계는,The heat treatment step, 상기 전도성 잉크 및 상기 고분자 물질을 150℃ 내지 350℃의 범위 내에서 가열하는 것을 특징으로 하는 고전도도 미세패턴 형성방법.A method of forming a high conductivity micropattern, wherein the conductive ink and the polymer material are heated within a range of 150 ° C to 350 ° C. 제1항에 있어서,The method of claim 1, 상기 고분자 물질은 폴리아닐린(polyaniline)인 것을 특징으로 하는 고전도 도 미세패턴 형성방법.The polymer material is a polyaniline (polyaniline), characterized in that the high conductivity micropattern forming method. 제1항에 있어서,The method of claim 1, 상기 전도성 잉크는 용액 상태의 유기 금속 화합물인 것을 특징으로 하는 고전도도 미세패턴 형성방법.The conductive ink is a high conductivity micropattern forming method, characterized in that the solution in the organic metal compound. 제12항에 있어서,The method of claim 12, 상기 전도성 잉크는 금속 입자들을 더 포함하는 것을 특징으로 하는 고전도도 미세패턴 형성방법.The conductive ink is a high conductivity micropattern forming method characterized in that it further comprises metal particles.
KR1020090101313A 2009-10-23 2009-10-23 Method for fabricating highly conductive fine patterns using self-patterned conductors and plating KR100991105B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020090101313A KR100991105B1 (en) 2009-10-23 2009-10-23 Method for fabricating highly conductive fine patterns using self-patterned conductors and plating
PCT/KR2010/004321 WO2011049284A1 (en) 2009-10-23 2010-07-02 Method for fabricating highly conductive fine patterns using self-patterned conductors and plating
US12/841,529 US20110094889A1 (en) 2009-10-23 2010-07-22 Method for fabricating highly conductive fine patterns using self-patterned conductors and plating

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020090101313A KR100991105B1 (en) 2009-10-23 2009-10-23 Method for fabricating highly conductive fine patterns using self-patterned conductors and plating

Publications (1)

Publication Number Publication Date
KR100991105B1 true KR100991105B1 (en) 2010-11-01

Family

ID=43409180

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020090101313A KR100991105B1 (en) 2009-10-23 2009-10-23 Method for fabricating highly conductive fine patterns using self-patterned conductors and plating

Country Status (3)

Country Link
US (1) US20110094889A1 (en)
KR (1) KR100991105B1 (en)
WO (1) WO2011049284A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10344385B2 (en) 2013-08-09 2019-07-09 Lg Chem, Ltd. Method for forming conductive pattern by direct radiation of electromagnetic wave, and resin structure having conductive pattern thereon

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111628101A (en) 2015-10-26 2020-09-04 Oti照明公司 Method for patterning a surface overlayer and device comprising a patterned overlayer
EP3491177A4 (en) * 2016-07-29 2020-08-12 Simon Fraser University Methods of electrochemical deposition
KR20230117645A (en) 2017-04-26 2023-08-08 오티아이 루미오닉스 인크. Method for patterning a coating on a surface and device including a patterned coating
US11043636B2 (en) 2017-05-17 2021-06-22 Oti Lumionics Inc. Method for selectively depositing a conductive coating over a patterning coating and device including a conductive coating
US11751415B2 (en) 2018-02-02 2023-09-05 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
CN113785411B (en) 2019-03-07 2023-04-11 Oti照明公司 Material for forming nucleation inhibiting coatings and apparatus incorporating the same
US11832473B2 (en) 2019-06-26 2023-11-28 Oti Lumionics Inc. Optoelectronic device including light transmissive regions, with light diffraction characteristics
CN114097102B (en) 2019-06-26 2023-11-03 Oti照明公司 Optoelectronic device comprising a light transmissive region having light diffraction features
JP2022544198A (en) 2019-08-09 2022-10-17 オーティーアイ ルミオニクス インコーポレーテッド Optoelectronic device containing auxiliary electrodes and partitions
CN113068311B (en) * 2021-03-18 2022-11-18 四会富仕电子科技股份有限公司 Manufacturing method of precise circuit and circuit board

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4344817A (en) * 1980-09-15 1982-08-17 Photon Power, Inc. Process for forming tin oxide conductive pattern
US6705910B2 (en) 2001-09-12 2004-03-16 Industrial Technology Research Institute Manufacturing method for an electron-emitting source of triode structure
US20040203235A1 (en) * 2003-01-15 2004-10-14 Seiko Epson Corporation Formation method for metal element, production method for semiconductor device, production method for electronic device, semiconductor device, electronic device, and electronic equipment
KR100691706B1 (en) 2004-05-07 2007-03-09 세이코 엡슨 가부시키가이샤 A method of fabricating a desired pattern of electronically functional material

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5017419A (en) * 1989-04-13 1991-05-21 Chomerics, Inc. Non-moire shielded window
JP2002076574A (en) * 2000-09-04 2002-03-15 Toshiba Chem Corp Printed board and manufacturing method therefor
TWI268813B (en) * 2002-04-24 2006-12-21 Sipix Imaging Inc Process for forming a patterned thin film conductive structure on a substrate
JP2004095983A (en) * 2002-09-03 2004-03-25 Toppan Printing Co Ltd Manufacturing method of printed wiring board
US20060204865A1 (en) * 2005-03-08 2006-09-14 Luminus Devices, Inc. Patterned light-emitting devices

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4344817A (en) * 1980-09-15 1982-08-17 Photon Power, Inc. Process for forming tin oxide conductive pattern
US6705910B2 (en) 2001-09-12 2004-03-16 Industrial Technology Research Institute Manufacturing method for an electron-emitting source of triode structure
US20040203235A1 (en) * 2003-01-15 2004-10-14 Seiko Epson Corporation Formation method for metal element, production method for semiconductor device, production method for electronic device, semiconductor device, electronic device, and electronic equipment
KR100691706B1 (en) 2004-05-07 2007-03-09 세이코 엡슨 가부시키가이샤 A method of fabricating a desired pattern of electronically functional material

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10344385B2 (en) 2013-08-09 2019-07-09 Lg Chem, Ltd. Method for forming conductive pattern by direct radiation of electromagnetic wave, and resin structure having conductive pattern thereon

Also Published As

Publication number Publication date
US20110094889A1 (en) 2011-04-28
WO2011049284A1 (en) 2011-04-28

Similar Documents

Publication Publication Date Title
KR100991105B1 (en) Method for fabricating highly conductive fine patterns using self-patterned conductors and plating
EP2313900B1 (en) Substrate with embedded patterned capacitance
JP4741616B2 (en) Method for forming photoresist laminated substrate
CN101467501B (en) Printed wiring board and method for manufacturing the same
CN103906360A (en) Flexible circuit board and manufacturing method thereof
KR100969172B1 (en) Method for making fine patterns using mask template
KR100991103B1 (en) Method for fabricating fine conductive patterns using surface modified mask template
CN107615898A (en) The manufacture method of printed substrate substrate, printed substrate and printed substrate substrate
KR20180070499A (en) Method for manufacturing a photovoltaic module and photovoltaic module thus obtained
US7799370B2 (en) Method of forming through hole and method of manufacturing electronic circuit
CN111837210B (en) Wiring substrate and method for manufacturing same
CN107211538A (en) The manufacture method and distributing board of distributing board
CN113766754A (en) Manufacturing method of battery sensor
JP4270364B2 (en) Manufacturing method of substrate with built-in capacitor
JP2022548586A (en) Electrode tab and method of forming same
WO2011086796A1 (en) Method of manufacturing substrate with built-in capacitor
TW201946074A (en) Method for producing wiring substrate
CN111343802A (en) Circuit board and manufacturing method thereof
US20040155188A1 (en) Infrared sensor and method for making same
JP2012151355A (en) Silicon wiring board and method of manufacturing the same
RU2307486C1 (en) Method for manufacturing electronic boards
KR20040102706A (en) Fabrication of sheet heater
RU2282319C2 (en) Method for manufacturing electronic boards
KR101453490B1 (en) Printed circuit board and method of manufacturing the same
TW202203722A (en) Method for producing wiring substrate

Legal Events

Date Code Title Description
A201 Request for examination
A302 Request for accelerated examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20130904

Year of fee payment: 4

FPAY Annual fee payment

Payment date: 20140917

Year of fee payment: 5

FPAY Annual fee payment

Payment date: 20150909

Year of fee payment: 6

LAPS Lapse due to unpaid annual fee