KR100785321B1 - A 2nd protection circuit for a battery pack - Google Patents
A 2nd protection circuit for a battery pack Download PDFInfo
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- KR100785321B1 KR100785321B1 KR1020060104057A KR20060104057A KR100785321B1 KR 100785321 B1 KR100785321 B1 KR 100785321B1 KR 1020060104057 A KR1020060104057 A KR 1020060104057A KR 20060104057 A KR20060104057 A KR 20060104057A KR 100785321 B1 KR100785321 B1 KR 100785321B1
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- protection circuit
- battery pack
- fet
- vdd
- output
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/18—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for batteries; for accumulators
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
- H01M10/482—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte for several batteries or cells simultaneously or sequentially
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
- Protection Of Static Devices (AREA)
Abstract
Description
도 1은 배터리 팩 2차 보호회로 IC의 셀 연결과정의 회로도1 is a circuit diagram of a cell connection process of a battery pack secondary protection circuit IC
도 2는 도 1의 2차 보호회로의 셀 연결완료상태의 회로도2 is a circuit diagram of a cell connection completion state of the secondary protection circuit of FIG.
도 3은 본 발명의 한 실시예의 회로도3 is a circuit diagram of one embodiment of the present invention;
본 발명은 이동통신기기와 노트 PC 등의 휴대용 전기통신기기에 주로 사용되는 배터리팩에 관한 것으로, 더 자세하게는 2차 보호회로 IC의 출력단자에 스위치 역할을 하는 Q1을 연결하여 VDD가 연결되기 전까지는 출력을 FET로 주지 않도록 함으로써 출력 오동작을 방지할 수 있도록 하는 배터리팩의 2차 보호회로 IC 출력 오동작 방지회로에 관한 것이다.The present invention relates to a battery pack mainly used in mobile telecommunication devices such as mobile communication devices and note PC, more specifically, to connect the Q1 acting as a switch to the output terminal of the secondary protection circuit IC until the VDD is connected The present invention relates to a secondary protection circuit IC output malfunction prevention circuit of a battery pack that prevents output malfunction by not giving the output to the FET.
일반적으로 휴대폰이나 노트 PC 등에 주로 사용되는 배터리팩에는 안전을 위해서 셀의 전압을 모니터링하여 일정 전압 이상 충전되거나 방전되었을 때 충전, 방전을 제어하는 1차 보호회로와, 셀의 전압을 모니터링하여 일정 전압 이상 충전되었을 경우 보호휴즈(예를 들면 SCP; Sony Chem사의 Protector)를 동작시켜 영구히 배터리팩을 사용하지 못하도록 제어하는 2차 보호회로를 구비한다.In general, a battery pack mainly used in a mobile phone or a notebook PC includes a primary protection circuit that monitors the voltage of a cell for safety and controls charging and discharging when the battery is charged or discharged above a certain voltage, and monitors the voltage of the cell to provide a constant voltage. In case of abnormal charging, secondary protection circuit is provided to control the protection fuse (for example, SCP; Protector of Sony Chem) to permanently prevent the use of the battery pack.
상기 1차 보호회로 IC는 주로 TI사의 BQ2931XX 등과 같은 IC 이외에 MAXIM 사, RENESAS사 등에서 생산하고 있으며, 2차 보호회로 IC는 TI사의 BQ294XX시리즈와 SEIKO사의 S-8244시리즈 및 S-8264시리즈가 주로 사용된다.The primary protection circuit IC is mainly produced by MAXIM, RENESAS, etc. in addition to ICs such as TI's BQ2931XX, and the secondary protection circuit IC is mainly used by TI's BQ294XX series, SEIKO's S-8244 series and S-8264 series. do.
그런데 종래에 있어서 상기 제품들 중 일부의 2차 보호회로 IC(S-8264시리즈)는 셀(Cell)과의 연결과정에서 오동작을 발생시키게 되는 문제가 있었다.However, in the related art, some of the secondary protection circuit ICs (S-8264 series) of the above products have a problem of causing a malfunction in the connection process with the cell.
즉, PCB의 회로와 셀인 BAT1,2,3,4를 연결할 때는 도 1과 같이 BAT1,2,3에 대한 PCB의 연결패드를 회로와 연결되지 않도록 한 후 BAT1,2,3,4가 PCB와 연결 후 솔더링 포인트(soldering point)에 솔더링을 IC의 전원인가 순서에 연결하게 된다.That is, when connecting the circuit of the PCB and the cells BAT1,2,3,4, as shown in Figure 1, so that the connection pad of the PCB for BAT1,2,3 is not connected to the circuit, BAT1,2,3,4 After the connection, soldering is connected to the soldering point in the order of powering up the IC.
셀인 BAT1,2,3,4가 PCB와 연결된 후에는 도 2와 같이 보호휴즈(SCP)에 BAT1 전원이 인가되지만 PCB에서 R1,2,3,4가 셀과 연결되지 않게 되면(SEIKO사 IC의 VDD와 SENSE는 맨 마지막에 연결되어야 함.) 최하위 셀인 BAT4가 IC에 인가될 경우 출력단자 CO의 출력전압이 Low이어야 함에도 불구하고 High(BAT4-0.3V)로 되는 오동작이 발생하게 된다.After the cells BAT1,2,3,4 are connected to the PCB, BAT1 power is applied to the protective fuse (SCP) as shown in FIG. 2, but when R1,2,3,4 are not connected to the cells on the PCB (SEIKO IC VDD and SENSE should be connected at the end.) When BAT4, the lowest cell, is applied to the IC, a malfunction occurs that goes high (BAT4-0.3V) even though the output voltage of the output terminal CO should be low.
한편 상기 2차 보호회로 IC(S-8264시리즈)는 셀의 전압이 일정 전압이상 될 경우 출력단자 CO의 전압이 High가 되어 보호휴즈(SCP)를 끊음으로써 배터리팩을 보호하게 되는데, 전술한 바와 같이 BAT4만 연결될 경우 출력단자 CO가 High로 되어 보호휴즈(SCP)가 파손되는 불량이 발생하게 된다.On the other hand, the secondary protection circuit IC (S-8264 series) protects the battery pack by cutting off the protective fuse (SCP) when the voltage of the cell becomes higher than a predetermined voltage, the output terminal CO becomes high. Likewise, if only BAT4 is connected, the output terminal CO becomes high, which causes the failure of the protection fuse (SCP).
본 발명은 상기와 같은 종래의 문제점을 감안하여 안출한 것이며, 그 목적이 배터리 팩의 2차 보호회로 IC에 셀들을 접속할 때에 출력 오동작으로 보호휴즈가 파손되는 것을 방지할 수 있도록 하는 배터리팩의 2차 보호회로 IC 출력 오동작 방지회로를 제공하는 데에 있는 것이다.SUMMARY OF THE INVENTION The present invention has been made in view of the above-described conventional problems, and an object thereof is to prevent damage to a protection fuse due to an output malfunction when connecting cells to a secondary protection circuit IC of a battery pack. The primary protection circuit is to provide an IC output malfunction prevention circuit.
본 발명은 상기의 목적을 달성하기 위하여 2차 보호회로 IC의 출력단자 CO에 스위치 역할을 하는 Q1을 연결하여 VDD가 연결되기 전까지는 출력을 FET로 주지 않도록 하는 것을 특징으로 하며, 이하 그 구체적인 기술내용을 첨부도면에 의거하여 더욱 자세히 설명하면 다음과 같다.In order to achieve the above object, the present invention is characterized in that the output is not connected to the FET until the VDD is connected by connecting Q1 serving as a switch to the output terminal CO of the secondary protection circuit IC. The content is described in more detail based on the attached drawings as follows.
즉, 도 3에는 본 발명의 한 실시예의 회로도가 도시되어 있는 바, 본 발명은 다수의 셀(BAT1,2,3,4)이 FET와 보호휴즈(SCP: SC PROTECTOR)를 구비하는 2차 보호회로 IC(S-8264A/B Series)에 연결되는 배터리 팩에 있어서, 상기 2차 보호회로 IC(S-8264A/B Series)의 출력단자 CO와 FET 사이에 스위치 역할을 하는 Q1을 설치하여 VDD가 연결되기 전까지는 출력을 FET로 주지 않도록 하고, VDD와 Q1 사이에 VDD가 연결될 경우 Q1을 턴온시킬 수 있도록 하는 Q2를 설치하여서 되는 것이다.That is, FIG. 3 shows a circuit diagram of an embodiment of the present invention, in which the present invention provides a secondary protection in which a plurality of cells BAT1, 2, 3, and 4 have a FET and a protective fuse (SCP: SC PROTECTOR). In a battery pack connected to a circuit IC (S-8264A / B Series), a VDD is provided by installing a Q1 serving as a switch between the output terminal CO and the FET of the secondary protection circuit IC (S-8264A / B Series). Do not give the output to the FET until connected, and install Q2 to turn on Q1 if VDD is connected between VDD and Q1.
본 발명에 있어서는 Q1을 FET 대신에 트랜지스터로 제어할 수도 있음은 물론이다.Of course, in the present invention, Q1 can be controlled by a transistor instead of a FET.
상기와 같이 구성된 본 발명에 있어서는 2차 보호회로 IC(S-8264A/B Series) 와 셀(Cell)과의 연결과정 만약 PCB에서 R1,2,3,4가 셀과 연결되지 않게 되고 최하위 셀인 BAT4가 IC에 인가되어 출력단자 CO의 출력전압이 Low이어야 함에도 불구하고 High(BAT4-0.3V)로 되더라도 출력단자 CO와 FET 사이에 스위치 역할을 하는 Q1이 턴오프(Turn Off) 되어 VDD가 연결되기 전까지는 출력을 FET로 주지 않게 되므로 보호휴즈(SCP)에 전원이 인가되지 않게 되므로 보호휴즈(SCP)에 아무런 영향이 없게 된다.In the present invention configured as described above, the connection process between the secondary protection circuit IC (S-8264A / B Series) and the cell (Cell) if R1, 2, 3, 4 is not connected to the cell in the PCB BAT4 is the lowest cell Is applied to the IC and the output voltage of the output terminal CO should be low, but even when the output voltage is high (BAT4-0.3V), Q1, which acts as a switch between the output terminal CO and the FET, is turned off, and VDD is connected. Until the output is not given to the FET, no power is applied to the protection fuse (SCP), so there is no effect on the protection fuse (SCP).
본 발명에 있어서 VDD가 정상 연결되면 Q2를 통해 Q1이 턴온(Turn On)되어 출력단자 CO를 통한 출력이 FET 및 보호휴즈(SCP)로 인가되어 정상 작동될 수 있게 된다.In the present invention, when VDD is normally connected, Q1 is turned on through Q2 so that the output through the output terminal CO is applied to the FET and the protective fuse (SCP) so that it can operate normally.
이상에서 설명한 바와 같이 본 발명은 2차 보호회로 IC(S-8264A/B Series)의 출력단자 CO와 FET 사이에 VDD가 연결되기 전까지는 출력을 FET로 주지 않도록 하는 Q1을 설치하고, VDD와 Q1 사이에 VDD가 연결될 경우 Q1을 턴온시킬 수 있도록 하는 Q2를 설치한 것으로, 본 발명에 의하면 배터리 팩 양산시에 출력 오동작으로 보호휴즈(SCP)가 파손되는 불량을 개선할 수 있게 됨은 물론 보호휴즈(SCP)가 이상 동작으로 인해 완전 불량되지 않고 일부 파손되었음에도 불구하고 출고되는 일을 방지할 수 있게 되어 배터리팩의 안전성 및 상품성을 크게 향상시킬 수 있게 되는 등의 효과를 얻을 수 있게 된다.As described above, in the present invention, Q1 is provided so that the output is not fed to the FET until VDD is connected between the output terminal CO and the FET of the secondary protection circuit IC (S-8264A / B Series), and VDD and Q1 Q2 is installed to turn on Q1 when VDD is connected between the devices. According to the present invention, a defect in which the protection fuse is broken due to an output malfunction during mass production of a battery pack can be improved, as well as a protection fuse (SCP). ) Is not completely defective due to the abnormal operation, but can be prevented from being shipped in spite of being partially damaged, thereby greatly improving the safety and marketability of the battery pack.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020060104057A KR100785321B1 (en) | 2006-10-25 | 2006-10-25 | A 2nd protection circuit for a battery pack |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020060104057A KR100785321B1 (en) | 2006-10-25 | 2006-10-25 | A 2nd protection circuit for a battery pack |
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| KR100785321B1 true KR100785321B1 (en) | 2007-12-17 |
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| KR1020060104057A KR100785321B1 (en) | 2006-10-25 | 2006-10-25 | A 2nd protection circuit for a battery pack |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980034274A (en) * | 1996-11-06 | 1998-08-05 | 문정환 | Chip malfunction prevention circuit |
| KR20060059680A (en) * | 2004-11-29 | 2006-06-02 | 삼성에스디아이 주식회사 | Protect circuit of battery pack |
-
2006
- 2006-10-25 KR KR1020060104057A patent/KR100785321B1/en not_active IP Right Cessation
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980034274A (en) * | 1996-11-06 | 1998-08-05 | 문정환 | Chip malfunction prevention circuit |
| KR20060059680A (en) * | 2004-11-29 | 2006-06-02 | 삼성에스디아이 주식회사 | Protect circuit of battery pack |
Non-Patent Citations (2)
| Title |
|---|
| 국내 공개특허공보 10-1998-034274 |
| 국내 공개특허공보 10-2006-0059680 |
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