KR100713879B1 - Method for manufactruing liquid crystal display device - Google Patents
Method for manufactruing liquid crystal display device Download PDFInfo
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- KR100713879B1 KR100713879B1 KR1020000037374A KR20000037374A KR100713879B1 KR 100713879 B1 KR100713879 B1 KR 100713879B1 KR 1020000037374 A KR1020000037374 A KR 1020000037374A KR 20000037374 A KR20000037374 A KR 20000037374A KR 100713879 B1 KR100713879 B1 KR 100713879B1
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 11
- 238000000034 method Methods 0.000 title claims abstract description 11
- 239000010408 film Substances 0.000 claims abstract description 80
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 46
- 229920005591 polysilicon Polymers 0.000 claims abstract description 44
- 239000010409 thin film Substances 0.000 claims abstract description 27
- 238000000151 deposition Methods 0.000 claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims abstract description 10
- 239000011521 glass Substances 0.000 claims abstract description 6
- 238000000059 patterning Methods 0.000 claims abstract description 3
- 238000002425 crystallisation Methods 0.000 claims description 4
- 230000008025 crystallization Effects 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 4
- 150000002500 ions Chemical class 0.000 claims description 4
- 238000009832 plasma treatment Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 238000009125 cardiac resynchronization therapy Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
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- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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Abstract
본 발명은 스태거형 구조의 박막 트랜지스터 액정표시소자의 제조 방법을 개시한다.The present invention discloses a method for manufacturing a thin film transistor liquid crystal display device having a staggered structure.
개시된 본 발명은, 유리기판 상부에 금속막과 도핑된 비정질 폴리 실리콘막을 차례로 증착하는 단계; 상기 도핑된 비정질 폴리 실리콘막과 금속막을 소정부분 패터닝하여 소오스/드레인 전극 및 오믹 콘택층을 형성하는 단계; 상기 오믹 콘택층 상부에 박막의 절연막을 증착하는 단계; 상기 결과물 상부에 비도핑된 비정질 폴리 실리콘막을 증착하는 단계; 상기 비도핑된 비정질 폴리 실리콘막을 다결정 폴리 실리콘막으로 결정화하는 단계; 상기 다결정 폴리 실리콘막 상부에 게이트 절연막을 증착하고, 이어서 게이트 전극을 형성하는 단계를 포함하여 구성하는 것을 특징으로 한다.The disclosed invention comprises the steps of depositing a metal film and a doped amorphous polysilicon film on top of the glass substrate; Patterning the doped amorphous polysilicon film and the metal film to form a source / drain electrode and an ohmic contact layer; Depositing an insulating film of a thin film on the ohmic contact layer; Depositing an undoped amorphous polysilicon film over the resulting product; Crystallizing the undoped amorphous polysilicon film into a polycrystalline polysilicon film; And depositing a gate insulating film on the polycrystalline polysilicon film, and then forming a gate electrode.
Description
도 1은 종래의 박막 트랜지스터의 액정 표시 장치의 제조방법을 설명하기 위한 단면도.1 is a cross-sectional view for explaining a method for manufacturing a liquid crystal display device of a conventional thin film transistor.
도 2a 및 도 2b는 본 발명의 박막 트랜지스터의 액정 표시 장치의 제조방법을 설명하기 위한 단면도.2A and 2B are cross-sectional views illustrating a method for manufacturing a liquid crystal display device of a thin film transistor of the present invention.
* 도면의 주요 부분에 대한 부호 설명 *Explanation of symbols on the main parts of the drawings
10 : 유리기판 S, D : 소오스/드레인 전극10: glass substrate S, D: source / drain electrode
11 ; 오믹 콘택층 12 : 박막의 절연막11; Ohmic contact layer 12: thin film insulating film
13 : 다결정 폴리 실리콘막 14 : 게이트 절연막13
15 : 게이트 전극15: gate electrode
본 발명은 박막 트랜지스터 액정표시소자의 제조방법에 관한 것으로, 보다 구체적으로는, 비도핑된 비정질 실리콘막을 다결정실리콘막으로 결정화할 때 오믹 콘택층 내의 불순물 이온이 채널층으로 사용되는 다결정실리콘막으로 확산되는 것을 방지를 위한 확산방지막을 포함하는 스태거형 구조의 박막 트랜지스터 액정표시장치의 제조방법에 관한 것이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film transistor liquid crystal display device, and more particularly, when an undoped amorphous silicon film is crystallized into a polycrystalline silicon film, impurity ions in an ohmic contact layer diffuse into a polysilicon film used as a channel layer. The present invention relates to a method for manufacturing a thin film transistor liquid crystal display device having a staggered structure including a diffusion barrier layer for preventing the formation thereof.
박막 트랜지스터 액정표시소자(이하, TFT-LCD)는 경량, 박형 및 저소비 전력 등의 특성을 갖기 때문에, CRT를 대신하여 각종 정보 기기의 단말기 또는 비디오 기기 등에 사용되고 있다. 이러한 TFT-LCD는 박막 트랜지스터 및 화소전극이 구비된 어레이 기판과 컬러필터 및 상대전극이 구비된 컬러필터 기판이 액정층의 개재하에 합착된 구조로 이루어져 있으며, 각 화소는 상기 박막 트랜지스터에 의해서 독립적으로 구동된다.Thin-film transistor liquid crystal display elements (hereinafter, TFT-LCDs) have characteristics such as light weight, thinness, and low power consumption, and thus are used in terminals or video devices of various information devices instead of CRTs. The TFT-LCD has a structure in which an array substrate including a thin film transistor and a pixel electrode and a color filter substrate including a color filter and a counter electrode are bonded together through a liquid crystal layer, and each pixel is independently formed by the thin film transistor. Driven.
상기 박막 트랜지스터는 주로 역스태거(inverted staggered)형, 또는, 스태거형 구조로 형성되며, 여기서, 상기 스태거형 구조의 박막 트랜지스터 제조방법을 설명한다.The thin film transistor is mainly formed of an inverted staggered type or a staggered type structure. Here, a method of manufacturing a thin film transistor having the staggered type structure will be described.
도 1을 참조하면, 절연기판, 예컨데, 투명성 유리기판(1) 상부에 소오스/드레인 전극용 금속막과 도핑된 비정질 폴리 실리콘막을 차례로 증착한다. 그런다음, 소오스/드레인 형성 영역을 한정하도록 상기 도핑된 비정질 폴리 실리콘막과 금속막을 차례로 패터닝하여 소오스/드레인 전극(S, D) 및 오믹 콘택층(2)을 형성한다. 그리고나서, 상기 결과물 상부에 채널층 형성을 위한 비도핑된 비정질 폴리 실리콘막을 형성한 후, 상기 비도핑된 비정질 폴리 실리콘막을 다결정 폴리 실리콘막(3)으로 결정화한다. Referring to FIG. 1, a metal film for a source / drain electrode and a doped amorphous polysilicon film are sequentially deposited on an insulating substrate, for example, the transparent glass substrate 1. Then, the doped amorphous polysilicon film and the metal film are sequentially patterned to define the source / drain formation region to form the source / drain electrodes S and D and the
상기 결정화 단계는 비정질 폴리 실리콘막 상부에 Ni 플라즈마 또는 스퍼터링 방법에 의해 수 Å 미만의 Ni막을 증착한 후 450℃ 미만의 온도에서 비정질 실리콘막이 증착된 반도체 기판 양단에 DC 전압을 인가하여 다결정 폴리 실리콘막을 형성한다. 이어서, 상기 다결정 폴리 실리콘막(3) 상부에 게이트 절연막(4)을 증착 하고, 공지의 방식에 의해 게이트 전극(5)을 형성하여 스태거형 구조의 박막 트랜지스터를 형성한다.In the crystallization step, a Ni film of less than a few kV is deposited on the amorphous polysilicon film by a Ni plasma or sputtering method, and then a DC voltage is applied to both ends of the semiconductor substrate on which the amorphous silicon film is deposited at a temperature of less than 450 ° C. to form a polycrystalline polysilicon film. Form. Subsequently, a gate insulating film 4 is deposited on the polycrystalline polysilicon film 3, and the
그러나, 종래의 스태거형 구조의 박막 트랜지스터의 제조방법은 다음과 같은 문제점이 있다.However, the conventional method for manufacturing a thin film transistor having a staggered structure has the following problems.
비정질 폴리 실리콘막을 다결정 폴리 실리콘막으로 결정화하는 단계에서 고온과 전계에 의해 상기 오믹 콘택층의 불순물들이 채널층인 다결정 폴리 실리콘막으로 확산되어 TFT의 전기적 특성을 저하시킨다.In the step of crystallizing an amorphous polysilicon film into a polycrystalline polysilicon film, impurities of the ohmic contact layer diffuse into the polycrystalline polysilicon film, which is a channel layer, by high temperature and an electric field, thereby degrading the electrical characteristics of the TFT.
이에 따라, 본 발명은 상기와 같은 문제점을 해결하기 위하여 안출된 것으로, 오믹 콘택층 상부에 플라즈마에 의한 절연막을 증착하여 결정화 단계에서 다결정 폴리 실리콘막으로 이온이 확산되는 것을 방지할 수 있는 스태거형 구조의 박막 트랜지스터의 제조방법을 제공하는데 그 목적이 있다.Accordingly, the present invention has been made to solve the above problems, a stagger type that can prevent the diffusion of ions into the polycrystalline polysilicon film in the crystallization step by depositing an insulating film by the plasma on the ohmic contact layer It is an object of the present invention to provide a method for manufacturing a thin film transistor having a structure.
상기와 같은 목적을 달성하기 위하여, 본 발명은, 유리기판 상부에 금속막과 도핑된 비정질 폴리 실리콘막을 차례로 증착하는 단계; 상기 도핑된 비정질 폴리 실리콘막과 금속막을 소정부분 패터닝하여 소오스/드레인 전극 및 오믹 콘택층을 형성하는 단계; 상기 오믹 콘택층 상부에 박막의 절연막을 증착하는 단계; 상기 결과물 상부에 비도핑된 비정질 폴리 실리콘막을 증착하는 단계; 상기 비도핑된 비정질 폴리 실리콘막을 다결정 폴리 실리콘막으로 결정화하는 단계; 상기 다결정 폴리 실리콘막 상부에 게이트 절연막을 증착하고, 이어서 게이트 전극을 형성하는 단계 를 포함하여 구성하는 것을 특징으로 한다.In order to achieve the above object, the present invention, the step of sequentially depositing a metal film and the doped amorphous polysilicon film on the glass substrate; Patterning the doped amorphous polysilicon film and the metal film to form a source / drain electrode and an ohmic contact layer; Depositing an insulating film of a thin film on the ohmic contact layer; Depositing an undoped amorphous polysilicon film over the resulting product; Crystallizing the undoped amorphous polysilicon film into a polycrystalline polysilicon film; And depositing a gate insulating film on the polycrystalline polysilicon film, and then forming a gate electrode.
상기 박막의 절연막은 수 십초의 NH3 개스의 플라즈마 처리에 의해 형성된다. 아울러, 절연막 증착 두께는 바람직하게 15 ~ 100Å의 두께로 형성된다.The thin film insulating film is formed by plasma treatment of NH3 gas for several ten seconds. In addition, the insulating film deposition thickness is preferably formed to a thickness of 15 ~ 100Å.
(실시예)(Example)
이하, 첨부된 도면을 참조하여, 본 발명의 스태거형 구조의 박막 트랜지스터의 제조방법을 상세히 설명한다.Hereinafter, a method of manufacturing a thin film transistor having a staggered structure according to the present invention will be described in detail with reference to the accompanying drawings.
도 2a를 참조하면, 절연기판, 예컨데, 투명성 유리기판(10) 상부에 금속막과 도핑된 비정질 폴리 실리콘막을 차례로 증착한다. 그런다음, 공지된 방식에 의해 도핑된 비정질 폴리 실리콘막과 금속막을 소정부분 패터닝하여 소오스/드레인 전극(S, D) 및 오믹 콘택층(11)을 형성한다. 그리고나서, 상기 오믹 콘택층(11) 상부에 플라즈마에 의한 박막의 절연막(12)을 증착한다. 상기 박막의 절연막(12)은 수 십초의 NH3 개스의 플라즈마 처리에 의해 형성된다. 아울러, 절연막 증착 두께는 바람직하게 15 ~ 100Å의 두께로 형성된다.Referring to FIG. 2A, a metal film and a doped amorphous polysilicon film are sequentially deposited on an insulating substrate, for example, the
도 2b를 참조하면, 상기 결과물 상부에 채널층 형성을 위한 비도핑된 비정질 폴리 실리콘막을 형성한 후, 상기 비도핑된 비정질 폴리 실리콘막을 다결정 폴리 실리콘막(13)으로 결정화한다. 상기 결정화 단계는 비정질 폴리 실리콘막 상부에 Ni 플라즈마 또는 스퍼터링 방법에 의해 수 Å 미만의 Ni막을 증착한 후 450℃ 미만의 온도에서 비정질 실리콘막이 증착된 반도체 기판 양단에 DC 전압을 인가하여 다결정 폴리 실리콘막을 형성한다. 이어서, 상기 다결정 폴리 실리콘막(13) 상부에 게이트 절연막(14)을 증착하고, 공지의 방식에 의해 게이트 전극(15)을 형성하여 스태거형 구조의 박막 트랜지스터를 형성한다.Referring to FIG. 2B, after the undoped amorphous polysilicon film is formed on the resultant to form a channel layer, the undoped amorphous polysilicon film is crystallized into a
이상에서 자세히 설명한 바와같이, 오믹 콘택층 형성후, NH3 개스 플라즈마 처리를 수행하여 상기 오믹 콘택층 상부에 박막의 절연막을 증착함으로써, 채널층인 비도핑된 비정질 폴리 실리콘막을 다결정 폴리 실리콘막으로 결정화하는 단계에서, 오믹층의 이온들이 다결졍 폴리 실리콘막으로의 확산을 억제한다.As described in detail above, after the ohmic contact layer is formed, a thin film insulating film is deposited on the ohmic contact layer by performing an NH 3 gas plasma treatment to crystallize the undoped amorphous polysilicon film as a polycrystalline polysilicon film. In the step, the ions of the ohmic layer suppress diffusion into the polysilicon film.
이에 따라, TFT를 전계 효과 이동도가 우수하고, 전기적 특성이 향상된 다결졍 실리콘막 TFT로 형성할 수 있는 효과가 있다.Accordingly, there is an effect that the TFT can be formed of a polycrystalline silicon film TFT having excellent field effect mobility and improved electrical characteristics.
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| KR20000024969A (en) * | 1998-10-07 | 2000-05-06 | 구본준, 론 위라하디락사 | X-ray detector and method for manufacturing the same |
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| KR19980082176A (en) * | 1997-05-01 | 1998-12-05 | 장진 | Thin film transistor and its manufacturing method |
| KR20000024969A (en) * | 1998-10-07 | 2000-05-06 | 구본준, 론 위라하디락사 | X-ray detector and method for manufacturing the same |
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