KR100528530B1 - 반도체 디바이스의 배선 형성 방법 - Google Patents
반도체 디바이스의 배선 형성 방법 Download PDFInfo
- Publication number
- KR100528530B1 KR100528530B1 KR10-2000-0079095A KR20000079095A KR100528530B1 KR 100528530 B1 KR100528530 B1 KR 100528530B1 KR 20000079095 A KR20000079095 A KR 20000079095A KR 100528530 B1 KR100528530 B1 KR 100528530B1
- Authority
- KR
- South Korea
- Prior art keywords
- wiring
- seed layer
- region
- forming
- copper
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 24
- 239000002184 metal Substances 0.000 title claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 11
- 239000004065 semiconductor Substances 0.000 title claims abstract description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 24
- 239000010949 copper Substances 0.000 claims abstract description 22
- 229910052802 copper Inorganic materials 0.000 claims abstract description 22
- 230000004888 barrier function Effects 0.000 claims abstract description 17
- 238000009792 diffusion process Methods 0.000 claims abstract description 17
- 238000000151 deposition Methods 0.000 claims abstract description 11
- 230000009977 dual effect Effects 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 239000000463 material Substances 0.000 claims abstract description 4
- 238000001312 dry etching Methods 0.000 claims description 4
- 238000001771 vacuum deposition Methods 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000001962 electrophoresis Methods 0.000 description 6
- 235000017166 Bambusa arundinacea Nutrition 0.000 description 4
- 235000017491 Bambusa tulda Nutrition 0.000 description 4
- 241001330002 Bambuseae Species 0.000 description 4
- 235000015334 Phyllostachys viridis Nutrition 0.000 description 4
- 239000011425 bamboo Substances 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 239000007769 metal material Substances 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (4)
- 기판 상의 듀얼 상감 구조로 식각된 영역에 금속 재질의 배선을 형성하는 반도체 디바이스의 배선 형성 방법에 있어서,상기 식각된 영역의 보텀과 측벽에 확산 방지막을 증착하는 단계;상기 확산 방지막 상에 구리 재질의 시드 레이어를 증착하는 단계;상기 시드 레이어의 보텀을 건식식각하여 측벽에만 시드 레이어를 남기는 단계;상기 영역 내에 잔류된 시드 레이어를 측방향으로 성장시켜서 상기 영역을 구리 재질로 채우는 단계; 및상기 영역에 형성된 배선을 평탄화하는 단계를 구비함을 특징으로 하는 반도체 디바이스의 배선 형성 방법.
- 삭제
- 삭제
- 제 1 항에 있어서,상기 구리 재질의 시드 레이어는 플라즈마 진공 증착 방법으로 증착됨을 특징으로 하는 반도체 디바이스의 배선 형성 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2000-0079095A KR100528530B1 (ko) | 2000-12-20 | 2000-12-20 | 반도체 디바이스의 배선 형성 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2000-0079095A KR100528530B1 (ko) | 2000-12-20 | 2000-12-20 | 반도체 디바이스의 배선 형성 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20020049804A KR20020049804A (ko) | 2002-06-26 |
KR100528530B1 true KR100528530B1 (ko) | 2005-11-15 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2000-0079095A KR100528530B1 (ko) | 2000-12-20 | 2000-12-20 | 반도체 디바이스의 배선 형성 방법 |
Country Status (1)
Country | Link |
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KR (1) | KR100528530B1 (ko) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000003563A (ko) * | 1998-06-29 | 2000-01-15 | 김영환 | 반도체 소자의 금속배선 제조방법 |
KR20000035543A (ko) * | 1998-11-19 | 2000-06-26 | 이데이 노부유끼 | 반도체 장치 및 그 제조 방법 |
KR20000043063A (ko) * | 1998-12-28 | 2000-07-15 | 김영환 | 반도체 소자의 금속 배선 형성 방법 |
KR20000042153A (ko) * | 1998-12-24 | 2000-07-15 | 서평원 | 이중 광궤환 구조를 갖는 이득 고정 광증폭 장치 |
KR20000043910A (ko) * | 1998-12-29 | 2000-07-15 | 김영환 | 반도체 소자의 구리 배선 형성 방법 |
US6156648A (en) * | 1999-03-10 | 2000-12-05 | United Microelectronics Corp. | Method for fabricating dual damascene |
-
2000
- 2000-12-20 KR KR10-2000-0079095A patent/KR100528530B1/ko active IP Right Grant
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000003563A (ko) * | 1998-06-29 | 2000-01-15 | 김영환 | 반도체 소자의 금속배선 제조방법 |
KR20000035543A (ko) * | 1998-11-19 | 2000-06-26 | 이데이 노부유끼 | 반도체 장치 및 그 제조 방법 |
KR20000042153A (ko) * | 1998-12-24 | 2000-07-15 | 서평원 | 이중 광궤환 구조를 갖는 이득 고정 광증폭 장치 |
KR20000043063A (ko) * | 1998-12-28 | 2000-07-15 | 김영환 | 반도체 소자의 금속 배선 형성 방법 |
KR20000043910A (ko) * | 1998-12-29 | 2000-07-15 | 김영환 | 반도체 소자의 구리 배선 형성 방법 |
US6156648A (en) * | 1999-03-10 | 2000-12-05 | United Microelectronics Corp. | Method for fabricating dual damascene |
Also Published As
Publication number | Publication date |
---|---|
KR20020049804A (ko) | 2002-06-26 |
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