KR100517171B1 - Inlaid conductive flooring containing conductive materials and method for preparing the same - Google Patents

Inlaid conductive flooring containing conductive materials and method for preparing the same Download PDF

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Publication number
KR100517171B1
KR100517171B1 KR10-2002-0068710A KR20020068710A KR100517171B1 KR 100517171 B1 KR100517171 B1 KR 100517171B1 KR 20020068710 A KR20020068710 A KR 20020068710A KR 100517171 B1 KR100517171 B1 KR 100517171B1
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weight
parts
vinyl chloride
conductive
chip
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KR10-2002-0068710A
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Korean (ko)
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KR20040040550A (en
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강해천
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주식회사 엘지화학
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/12—Layered products comprising a layer of synthetic resin next to a fibrous or filamentary layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/18—Layered products comprising a layer of synthetic resin characterised by the use of special additives
    • B32B27/20—Layered products comprising a layer of synthetic resin characterised by the use of special additives using fillers, pigments, thixotroping agents
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/30—Layered products comprising a layer of synthetic resin comprising vinyl (co)polymers; comprising acrylic (co)polymers
    • B32B27/304—Layered products comprising a layer of synthetic resin comprising vinyl (co)polymers; comprising acrylic (co)polymers comprising vinyl halide (co)polymers, e.g. PVC, PVDC, PVF, PVDF
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/08—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the cooling method
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00—Ancillary operations in connection with laminating processes
    • B32B38/06—Embossing
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2260/00—Layered product comprising an impregnated, embedded, or bonded layer wherein the layer comprises an impregnation, embedding, or binder material
    • B32B2260/02—Composition of the impregnated, bonded or embedded layer
    • B32B2260/021—Fibrous or filamentary layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2260/00—Layered product comprising an impregnated, embedded, or bonded layer wherein the layer comprises an impregnation, embedding, or binder material
    • B32B2260/04—Impregnation, embedding, or binder material
    • B32B2260/046—Synthetic resin
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2264/00—Composition or properties of particles which form a particulate layer or are present as additives
    • B32B2264/10—Inorganic particles
    • B32B2264/107—Ceramic
    • B32B2264/108—Carbon, e.g. graphite particles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00—Properties of the layers or laminate
    • B32B2307/20—Properties of the layers or laminate having particular electrical or magnetic properties, e.g. piezoelectric
    • B32B2307/202—Conductive
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2471/00—Floor coverings

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  • Floor Finish (AREA)
  • Laminated Bodies (AREA)

Abstract

본 발명은 다양한 색상의 인레이드 칩(inlaid chip, 이하 '칩') 표면에 전도성 물질을 코팅처리한 칩을 표면층으로 하는 바닥장식재 및 이를 제조하는 방법에 관한 것이다. 또한 본 발명의 바닥장식재는 전도성 물질을 포함하는 기재층 및 이지층을 적층하여 전체적으로 전도성을 부여할 수 있다. The present invention relates to a flooring material using a chip coated with a conductive material on a surface of an inlaid chip (hereinafter referred to as 'chip') of various colors and a method of manufacturing the same. In addition, the flooring material of the present invention can be imparted to the overall conductivity by laminating a base layer and an easy layer comprising a conductive material.

본 발명의 바닥장식재는 종래 전도성 바닥장식재의 문제점인 카본블랙에 의한 표면오염 및 외관 차별화의 한계를 극복한 바닥장식재로서, 전도성 및 패션성(인테리어 효과)을 동시에 만족시킨다. 또한, 치수보강층을 삽입하여 온도에 의한 치수변형을 최소화시키고 시공성 및 사용 품질을 극대화할 수 있다.The flooring material of the present invention as a flooring material that overcomes the limitations of surface contamination and appearance differentiation by carbon black, which is a problem of the conventional conductive flooring material, satisfies the conductivity and fashion (interior effect) at the same time. In addition, by inserting the dimensional reinforcement layer can minimize the dimensional deformation by the temperature and maximize the workability and use quality.

Description

전도성 물질을 함유하는 인레이드 전도성 바닥장식재 및 그 제조 방법 {Inlaid conductive flooring containing conductive materials and method for preparing the same}Inlaid conductive flooring containing conductive material and method for manufacturing the same

본 발명은 다양한 색상의 인레이드 칩(inlaid chip,이하 '칩') 표면에 전도성 물질을 코팅처리한 칩을 표면층으로 하고, 선택적으로는 전도성 물질을 포함하는 기재층 및 이지층을 합판하여 다양한 패션성과 전도성 기능을 갖는 바닥장식재 및 그의 제조 방법에 관한 것이다.According to the present invention, a chip coated with a conductive material on a surface of inlaid chip (hereinafter referred to as 'chip') of various colors is used as a surface layer, and optionally a base layer and an easy layer including a conductive material are laminated to various fashions. It relates to a flooring material having a performance and a conductive function and a method of manufacturing the same.

일반적으로 전도성 기능을 갖는 바닥재는 그 기능이 전기 저항치로 표현되며, 미국화재방지협회의 99 규정에 의한 표면 및 체적저항이 10,000 내지 1,000,000 ohm인 범위 내에서 반도체 조립공장 등 정전기 장애에 의해서 문제가 발생될 수 있는 장소에서 널리 사용되어 왔다.In general, the flooring material having a conductive function is expressed as an electrical resistance value, and a problem is caused by an electrostatic disturbance such as a semiconductor assembly plant within the range of 10,000 to 1,000,000 ohm of surface and volume resistance according to 99 regulations of the American Fire Protection Association. It has been widely used in places where it can be.

최근 들어 소득 수준의 향상에 따라 정보전자분야 및 반도체분야에 대한 관심이 증대되면서 설비 투자가 지속적으로 늘어남에 따라, 정보전자공장 및 반도체 조립공장 등에 사용되는 바닥장식재에 기능성 이외에 패션성을 요구하는 추세에 있으나, 실제 시공되고 있는 바닥장식재는 기능성 위주의 바닥장식재가 시공되고 있는 실정이다.In recent years, as the income level has increased, interest in the information electronics and semiconductor sectors has increased, and facility investment has continued to increase. As a result, the trend of requiring fashion in addition to functionality for flooring materials used in information electronics and semiconductor assembly plants, etc. However, the floor decorative material that is actually being constructed is the situation that the functional decorative floor materials are being installed.

이러한 종래의 전도성 바닥장식재는 전도성 카본블랙만을 사용하여 검은색 계통의 전도성 바닥재만이 제조되어 왔으며, 이로 인하여 용제를 많이 사용하는 장소에서는 용제에 의해 전도성 카본블랙이 표면으로 노출되어 바닥재 표면의 오염이 심각하였다.Such conventional conductive flooring materials have been manufactured using only conductive carbon black, and only black conductive flooring materials have been produced. As a result, the conductive carbon black is exposed to the surface by the solvent in places where a lot of solvents are used. It was serious.

이는 전도성 카본블랙의 물성상 전도성 바닥재의 표면을 오염시키는 문제점을 가지고 있었으며, 또한 검은색 계통 일색으로 다양한 외관 표현을 할 수 없는 문제점이 있었다.This had a problem of contaminating the surface of the conductive flooring material in the physical properties of the conductive carbon black, there was also a problem that can not express a variety of appearance in one color black system.

본 발명은 상기 종래기술의 문제점을 개선하기 위한 것으로, 본 발명의 목적은 종래의 전도성 바닥장식재가 가지는 전도성 카본블랙에 의한 표면오염 문제를 원칙적으로 제거하고, 온도 변형에 의한 틈과 벌어짐 등 사용상의 문제점을 해결하면서, 다양한 색상의 인레이드 칩 표면에 전도성 물질을 코팅함으로써 정전기 방지기능과 인테리어 효과를 동시에 갖는 바닥장식재 및 이를 제조하는 방법을 제공하는 것이다.The present invention is to improve the problems of the prior art, an object of the present invention is to eliminate the problem of surface contamination caused by conductive carbon black in the conventional conductive flooring material, and in principle, such as gaps and gaps caused by temperature deformation To solve the problem, by coating a conductive material on the surface of the inlaid chip of various colors to provide a flooring material having an antistatic function and interior effect at the same time and a method of manufacturing the same.

본 발명은 패션성 및 전도성이 강화된 바닥장식재에 관한 것으로, 본 발명의 바닥장식재는 하부로부터 이지층, 기재층 및 표면층이 적층된 바닥장식재에 있어서, 상기 표면층이 적어도 2종 이상의 다양한 색으로 조합된 다수의 칩으로 이루어지며, 상기 칩이 전도성 물질로 코팅되고 바인더졸에 의해 결합되어 있는 것을 특징으로 한다.The present invention relates to a fashion decorative and reinforced flooring material, the flooring material of the present invention in the flooring material laminated the easy layer, the base layer and the surface layer from the bottom, the surface layer is combined in at least two different colors It consists of a plurality of chips, characterized in that the chip is coated with a conductive material and bonded by a binder sol.

본 발명에서 표면층을 구성하는 칩의 색상은 적어도 2종 이상이어야 하며, 다양하고 화려할수록 좋으나 작업성 및 제조원가 등을 고려하여 바람직하게는 2 내지 5종의 색상으로 칩을 제조한다. 칩의 색상은 무기안료를 사용하여 칩의 색상을 부여하며, 각각의 칩의 색상에 따라 2 내지 5종을 선택 배합하여 패션성이 부여될 수 있도록 표면층을 형성한다.In the present invention, the color of the chip constituting the surface layer should be at least two or more, and the more diverse and colorful, the better, but in consideration of workability and manufacturing cost, the chip is preferably manufactured in two to five colors. The color of the chip gives the color of the chip using an inorganic pigment, and forms a surface layer so that fashion can be provided by selectively blending 2 to 5 types according to the color of each chip.

본 발명에서 칩의 재질은 특별히 제한되지 않으나, 바람직하게는 가볍고 저가이며 가공성이 우수한 범용수지, 예를 들면 염화비닐수지를 사용한다.The material of the chip in the present invention is not particularly limited, but is preferably a general-purpose resin, such as vinyl chloride resin, which is light, inexpensive and has excellent workability.

본 발명에서 사용되는 전도성 물질은 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄 분말을 포함하는 투명한 용액 또는 졸이다. 상기 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄은 상업적으로 광범위하게 사용되는 전도성 물질이다. 상기 전도성 물질은 칩 100 중량부에 대하여 3 내지 15 중량부를 사용하는 것이 바람직하다. 전도성 물질의 사용량이 3 중량부 미만이면 저항값이 미국화재방지협회 규정치인 106 Ω을 초과할 수 있으며, 15 중량부를 초과하면 가열가압하는 과정에서 칩간의 결합력이 감소될 수 있다.The conductive material used in the present invention is a clear solution or sol comprising titanium oxide powder coated with SnO 2 , Sb or mixtures thereof. Titanium oxide coated with the SnO 2 , Sb or mixtures thereof is a conductive material widely used commercially. The conductive material is preferably used 3 to 15 parts by weight based on 100 parts by weight of the chip. If the amount of the conductive material is less than 3 parts by weight, the resistance value may exceed 10 6 kPa, which is regulated by the National Fire Protection Association, and if it exceeds 15 parts by weight, the bonding force between the chips may be reduced during the heating and pressing process.

본 발명에서 칩과 칩 사이에 결합력을 증가시킬 목적으로 바인더졸을 사용하는데, 본 발명에서 사용되는 바인더졸은 염화비닐수지를 주성분으로 하는 졸로서, 구체적으로 염화비닐수지 100 중량부, 디옥틸프탈레이트 가소제 60 내지 80 중량부 및 바륨-아연계 안정제 3 내지 5 중량부를 포함한다.In the present invention, a binder sol is used for the purpose of increasing the bonding force between the chip and the chip. The binder sol used in the present invention is a sol mainly composed of vinyl chloride resin, specifically 100 parts by weight of vinyl chloride resin, dioctylphthalate. 60 to 80 parts by weight of the plasticizer and 3 to 5 parts by weight of the barium-zinc stabilizer.

본 발명에서 치수안정 및 보강을 위하여 기재층으로 유리섬유 재질의 스크림, 직포 또는 부직포를 사용하며, 바람직하게는 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄 분말을 포함하는 폴리염화비닐졸을 사용하여 함침시킨 기재층을 사용한다. 기재층을 함침하는 이유는 기재층의 다공성으로 인하여 발생할 수 있는 균열이나 박리와 같은 문제를 방지하기 위함이다. 함침액에 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄 분말을 첨가함으로써 기재층에도 전도성을 부여할 수 있다. 상기 산화티탄 분말의 바람직한 첨가량은 염화비닐수지 100 중량부에 대하여 10 내지 50 중량부이다. 산화티탄 분말의 첨가량이 10 중량부 미만이면 저항값이 미국화재방지협회 규정치인 106 Ω을 초과할 수 있으며, 50 중량부를 초과하면 가열 가압하는 과정에서 칩간의 결합력이 감소될 수 있다.In the present invention, a polyvinyl chloride sol comprising a titanium oxide powder coated with SnO 2 , Sb or a mixture thereof is preferably used as a base layer for the dimensional stability and reinforcement using a glass fiber scrim, woven fabric or nonwoven fabric. The base material layer impregnated and used is used. The reason for impregnating the base layer is to prevent problems such as cracking or peeling which may occur due to the porosity of the base layer. The conductivity can also be imparted to the base layer by adding titanium oxide powder coated with SnO 2 , Sb or a mixture thereof to the impregnation solution. The preferred amount of the titanium oxide powder is 10 to 50 parts by weight based on 100 parts by weight of the vinyl chloride resin. If the added amount of the titanium oxide powder is less than 10 parts by weight, the resistance value may exceed 10 6 kPa, which is the regulation of the American Fire Protection Association, and if it exceeds 50 parts by weight, the bonding force between the chips may be reduced during the heating and pressing process.

본 발명에서는 이지층에도 전도성 물질을 첨가함으로써 바닥장식재 전체에 전도성을 부여할 수 있다. 이지층에 첨가되는 전도성 물질은 카본블랙이며, 카본블랙의 바람직한 첨가량은 염화비닐수지 100 중량부에 대하여 10 내지 25 중량부이다.In the present invention, it is possible to impart conductivity to the entire flooring material by adding a conductive material to the easy layer. The conductive material added to the easy layer is carbon black, and a preferred amount of carbon black is 10 to 25 parts by weight based on 100 parts by weight of vinyl chloride resin.

본 발명의 패션성 및 전도성이 개선된 바닥장식재를 제조하는 방법은 적어도 2종 이상의 색상으로 칩을 제조하는 단계; 상기 칩을 전도성 물질로 코팅하고 바인더졸로 결합시키는 단계; 및 상기 코팅 및 결합된 칩을 기재층 상부에 배열하고 예열한 후 압연하여 표면층을 형성시키는 단계를 포함하며, 바람직하게는 상기 기재층을 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄 분말을 포함하는 폴리염화비닐졸로 함침하는 단계; 및 카본블랙을 함유하는 이지층을 기재층 하부에 합판하는 단계를 더 포함한다.The method of manufacturing a flooring material with improved fashion and conductivity of the present invention comprises the steps of manufacturing a chip in at least two or more colors; Coating the chip with a conductive material and bonding with a binder sol; And arranging the coated and bonded chips on top of the base layer, preheating and rolling to form a surface layer. Preferably, the base layer is coated with titanium oxide powder coated with SnO 2 , Sb or a mixture thereof. Impregnating with a polyvinyl chloride sol comprising; And plywood the easy layer containing carbon black under the base layer.

본 발명에서는 다양한 색상의 칩을 제조하고 상기 칩 표면에 전도성이 우수하고 투명한 전도성 물질을 코팅처리하여 배열한 후 압착함으로써 자연스러운 입체효과를 부여하고, 치수보강층을 삽입함으로써 온도에 의한 치수 변형을 최소화하여 시공성 및 사용품질을 극대화하였다.In the present invention, by manufacturing a chip of various colors and coating and arranged a conductive material with excellent conductivity on the surface of the chip, and then compressed to give a natural three-dimensional effect, by inserting a dimensional reinforcement layer to minimize the dimensional deformation by temperature Constructability and quality of use are maximized.

이하, 첨부도면 및 실시예를 참조하여 본 발명을 상세하게 설명하지만, 본 발명의 권리범위가 첨부도면 및 실시예에 국한되는 것을 아니다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings and examples, but the scope of the present invention is not limited to the accompanying drawings and examples.

도 1은 본 발명의 바람직한 실시예에 따라 바닥장식재를 제조하는 과정을 도시한 공정도로서, 제조공정은 첫째 전도성 물질을 포함하는 염화비닐수지졸을 사용하여 기재층을 함침하고, 둘째 상기 함침된 기재층 위에 전도성 물질이 코팅된 염화비닐수지 칩층을 도포하고 가압하여 비발포 염화비닐수지층 칩 반제품을 형성하는 단계; 셋째 기재층 하부에 제품의 발란스를 유지하기 위한 이지층을 합판하는 단계를 포함한다.1 is a process chart showing a process for manufacturing a floor decorative material according to a preferred embodiment of the present invention, the manufacturing process is first impregnated with a base layer using a vinyl chloride resin sol containing a conductive material, and secondly the impregnated substrate Applying and pressing a vinyl chloride resin chip layer coated with a conductive material on the layer to form a non-foamed vinyl chloride resin chip semifinished product; And plywood the easy layer for maintaining the balance of the product under the third base layer.

도 2는 도 1의 제조공정에 따라 제조한 본 발명의 바닥장식재로서, 하부로부터 카본블랙이 함유된 이지층(3), 전도성 물질을 포함하는 염화비닐수지졸로 함침된 기재층(1) 및 전도성 물질로 코팅처리된 칩층인 표면층(2)이 순차적으로 적층되어 있다.2 is a floor decorative material of the present invention prepared according to the manufacturing process of Figure 1, the base layer (1) impregnated with a vinyl chloride resin sol containing a conductive material, the easy layer (3) containing carbon black from the bottom and conductive The surface layer 2, which is a chip layer coated with a material, is sequentially stacked.

상기 기재층(1)은 치수안전성을 위한 유리섬유 재질의 스크림(scrim), 직포 또는 부직포를 전도성 물질을 함유한 염화비닐수지졸로 함침한 것이다. 구체적으로 염화비닐수지 100 중량부에 가소제 TXIB(2,2,4-트리메틸-1,3-펜탄디올디이소부틸레이트) 50~70 중량부, 내열안정제인 바륨-아연계 화합물 3~5 중량부, 탄산칼슘 100~200 중량부 및 전도성 분말(SnO2, Sb가 표면에 코팅되어 있는 산화티탄) 10~50 중량부를 혼합하여 졸 상태로 만든 후, 상기 졸을 유리섬유 스크림, 직포 또는 부직포에 도포하여 함침시킨 다음, 130~150℃ 정도의 히팅드럼에 통과시켜 고화함으로써 함침된 기재층을 제조한다.The base layer (1) is impregnated with a vinyl chloride resin sol containing a conductive material scrim, woven fabric or nonwoven fabric of glass fiber material for dimensional safety. Specifically, 50 to 70 parts by weight of plasticizer TXIB (2,2,4-trimethyl-1,3-pentanediol diisobutylate) in 100 parts by weight of vinyl chloride resin, 3 to 5 parts by weight of a barium-zinc compound that is a heat stabilizer , 100 to 200 parts by weight of calcium carbonate and 10 to 50 parts by weight of conductive powder (SnO 2 , titanium oxide coated on the surface of Sb) were mixed to make a sol, and then the sol was applied to a glass fiber scrim, woven fabric or nonwoven fabric. Impregnated, and then impregnated by passing through a heating drum at about 130 to 150 ° C. to produce an impregnated base layer.

상기 표면층(2)은 함침된 기재층 위에 0.8 내지 1.3 mm 정도의 두께로 균일하게 분산 배열된 칩층으로 이루어지는데, 이때 칩과 칩간의 결합력을 증가시킬 목적으로 바인더졸을 칩과 함께 고속믹서 또는 헨셀믹서에서 5~20분간 혼합하여 칩 표면에 바인더졸이 골고루 부착된 칩을 사용한다. 여기서 사용된 바인더졸은 염화비닐수지 100 중량부, 가소제인 디옥틸프탈레이트 60~80 중량부 및 바륨-아연계 안정제 3~5 중량부로 이루어진 졸 상태의 혼합물이며, 바인더졸의 적절한 사용량은 칩량의 10~20 중량%이다.The surface layer 2 is composed of a chip layer uniformly arranged on the impregnated substrate layer with a thickness of about 0.8 to 1.3 mm, wherein a binder sol is combined with a chip in a high speed mixer or Hensel for the purpose of increasing the bonding force between the chip and the chip. Mix for 5 to 20 minutes in a mixer to use a chip evenly attached to the binder sol on the chip surface. The binder sol used herein is a sol mixture consisting of 100 parts by weight of vinyl chloride resin, 60 to 80 parts by weight of a plasticizer of dioctylphthalate, and 3 to 5 parts by weight of a barium-zinc stabilizer, and an appropriate amount of the binder sol is 10 20 wt%.

상기 칩은 비발포 염화비닐수지로서 염화비닐수지, 가소제, 내열안정제, 충전제 및 안료 등을 혼합하여 30~50 메쉬 정도의 크기로 제조한다. 또한 색상의 조합에 의해 다양하고 자연스러운 외관효과를 창출하여 패션성을 추구하는 소비자의 욕구를 충족시키도록, 적어도 2~5종의 다양한 색상의 칩을 사용한다.The chip is a non-foamed vinyl chloride resin, and is prepared in a size of about 30 to 50 mesh by mixing a vinyl chloride resin, a plasticizer, a heat stabilizer, a filler, and a pigment. In addition, by using a combination of colors to create a variety of natural appearance effect to meet the needs of consumers seeking fashion, at least two to five different colors of chips are used.

상기 칩은 전도성 물질로 코팅되며, 코팅방법은 바인더졸 코팅방법과 동일하다. 구체적으로 칩을 고속믹서 또는 헨셀믹서에 투입한 후, 여기에 전도성 물질이 함유되어 있는 전도성 용액 또는 졸을 투입하고 혼합하여 칩에 전도성 액체가 코팅되도록 한다.The chip is coated with a conductive material, the coating method is the same as the binder sol coating method. Specifically, after the chip is placed in a high speed mixer or Henschel mixer, a conductive solution or a sol containing a conductive material is added thereto and mixed so that the conductive liquid is coated on the chip.

상기 전도성 용액은 전도성을 부여하는 전도성 분말 100 중량부, 바인더(아크릴수지 3 내지 5 중량%, 비닐아세테이트와 염화비닐수지 코폴리머 15 내지 20 중량%, 메틸에틸케톤 용제 30 내지 50 중량%, 톨루엔 30 내지 40 중량%) 200 내지 400 중량부, 메틸에틸케톤 200 내지 400 중량부 및 내열안정제인 바륨-아연계 화합물 2 내지 5 중량부를 헨셀믹서로 혼합하여 제조된 용액이다. 상기 메틸에틸케톤 용제 대신에 그 전량을 바인더 또는 케톤류 용제(아세톤 등), 알코올류 용제(메탄올, 에탄올 등)와 같은 다른 용제로 대체하여 전도성 용액을 제조할 수도 있다.The conductive solution is 100 parts by weight of a conductive powder imparting conductivity, a binder (3 to 5% by weight of acrylic resin, 15 to 20% by weight of vinyl acetate and vinyl chloride resin copolymer, 30 to 50% by weight of methyl ethyl ketone solvent, 30 toluene To 40% by weight) 200 to 400 parts by weight, 200 to 400 parts by weight of methyl ethyl ketone and 2 to 5 parts by weight of a barium-zinc compound, which is a heat stabilizer, are prepared by mixing with a Henschel mixer. Instead of the methyl ethyl ketone solvent, the entire amount may be replaced with another solvent such as a binder or a ketone solvent (acetone, etc.) or an alcohol solvent (methanol, ethanol, etc.) to prepare a conductive solution.

상기 전도성 용액 이외에 전도성 물질의 또 다른 예로서, 중합도가 100 내지 1,500인 염화비닐수지 100 중량부에 전도성 분말 50 내지 100 중량부, 1차 가소제로 TXIB 50 내지 200 중량부, 2차 가소제로 파라핀계 화합물 50 내지 150 중량부 및 내열안정제로 바륨-아연계 화합물 5 내지 10 중량부를 헨셀믹서로 혼합하여 제조된 졸 형태의 전도성 물질을 사용할 수 있다. 상기 TXIB 전량을 2차 가소제인 파라핀계 화합물로 대체하여도 가능하며, 2차 가소제인 파라핀계 화합물 대신에 TXIB 가소제로 전량 대체하여 전도성 졸을 제조할 수도 있다.As another example of the conductive material in addition to the conductive solution, 50 to 100 parts by weight of conductive powder, 100 parts by weight of vinyl chloride resin having a polymerization degree of 100 to 1,500, 50 to 200 parts by weight of TXIB as a primary plasticizer, and paraffin based secondary plasticizer 50 to 150 parts by weight of the compound and 5 to 10 parts by weight of the barium-zinc compound as a heat stabilizer, a sol-type conductive material prepared by mixing with a Henschel mixer can be used. The entire amount of the TXIB may be replaced with a paraffinic compound which is a secondary plasticizer, and a conductive sol may be prepared by replacing the total amount of the TXIB plasticizer with a TXIB plasticizer instead of the secondary plasticizer.

상기 표면층(2)의 제조방법은 다음과 같다. 먼저 다양한 색의 염화비닐수지칩을 전도성 물질 및 바인더졸로 코팅한 후 기재층(1) 위에 3 내지 4 mm 정도로 배열 도포한다. 칩간의 결합력을 증대시키기 위해 상기 칩층을 190~250℃의 오븐에 3 내지 4분간에 걸쳐 통과시키며 예열함으로써, 졸 상태의 염화비닐수지를 겔화시키고 전도성 물질에 포함되어 있는 용제를 휘발시킨다. 이때 오븐 내에서 너무 오랫동안 지체하면 염화비닐수지졸의 결합력이 약해지고 칩의 색상도 변하고 칩이 퍼지는 등의 결과를 초래하므로 온도통과시간을 잘 조절하여야 한다. 또한 용제에 의한 폭발 가능성이 있으므로 주의를 기울어야 한다. 마지막으로 가열된 칩층을 엠보싱 롤에 통과시켜 압연하고 쿨링 드럼으로 30~80℃까지 냉각시킴으로써 0.8~1.3 mm 두께의 시트를 제조한다. 이때 엠보싱 롤의 압력은 칩 간의 밀림이 없고 칩 간의 밀도가 최대가 될 수 있는 6~7 kg/㎠이다. The manufacturing method of the surface layer 2 is as follows. First, the vinyl chloride resin chips of various colors are coated with a conductive material and a binder sol, and then coated in an array of about 3 to 4 mm on the base layer 1. In order to increase the bonding strength between chips, the chip layer is preheated while passing through an oven at 190 to 250 ° C. for 3 to 4 minutes to gel the sol vinyl chloride resin and volatilize a solvent contained in the conductive material. At this time, if the delay is too long in the oven, the binding force of the vinyl chloride resin is weakened, the color of the chip is changed, and the chip is spread. Care should also be taken because of possible explosions due to solvents. Finally, the heated chip layer is passed through an embossing roll, rolled, and cooled to 30 to 80 ° C. with a cooling drum to produce a sheet having a thickness of 0.8 to 1.3 mm. At this time, the pressure of the embossing roll is 6 ~ 7 kg / ㎠ that can be the maximum density between the chips without the push between chips.

상기의 이지층(3)은 염화비닐수지 100 중량부, 디옥틸프탈레이트 가소제 20 내지 50 중량부, 바륨-아연계의 내열안정제 3 내지 5 중량부, 탄산 칼슘 100 내지 300 중량부, 활제 1 내지 3 중량부, 카본블랙 10 내지 25 중량부로 이루어지며, 연속 카렌다 압연방식으로 제조되는 0.8 내지 1.2 mm 두께의 시트이다.The easy layer (3) is 100 parts by weight of vinyl chloride resin, 20 to 50 parts by weight of dioctylphthalate plasticizer, 3 to 5 parts by weight of barium-zinc-based heat stabilizer, 100 to 300 parts by weight of calcium carbonate, lubricant 1 to 3 It is made of 10 parts by weight to 25 parts by weight of carbon black, and is 0.8 to 1.2 mm thick sheet manufactured by continuous calendar rolling.

최종적으로, 함침된 기재층(1)의 하부면에 카본블랙이 포함된 염화 비닐수지 이지층(3)을 합판하고 130~150℃ 정도의 히팅드럼에 통과시켜 예열한 후, 비발포 염화비닐수지 칩층(2)과 연속 카렌다 압연방법으로 열간 접착시킴으로써 컬링성 향상과 전도성 기능을 갖는 본 발명의 바닥장식재를 제조한다.Finally, the vinyl chloride resin easy layer 3 containing carbon black is laminated on the lower surface of the impregnated base material layer 1 and preheated by passing through a heating drum at about 130 to 150 ° C., followed by a non-foamed vinyl chloride resin. By hot-bonding the chip layer 2 and the continuous calender rolling method, the flooring material of the present invention having the curling property and the conductive function is produced.

도 3은 종래의 전도성 바닥장식재로서, 카본블랙이 포함된 폴리염화비닐졸(4) 및 폴리염화비니수지칩층(5)으로 구성되어 있다. 종래의 바닥장식재는 용제가 접촉하면 상기 카본블랙이 표면으로 노출되어 오염되는 문제가 있었다. 본 발명에서는 표면층에 카본블랙을 사용하지 않음으로써, 카본블랙에 의한 표면오염문제를 원천적으로 봉쇄하였다.3 is a conventional conductive flooring material, and is composed of polyvinyl chloride sol 4 and polyvinyl chloride resin chip layer 5 containing carbon black. Conventional flooring materials have a problem that the carbon black is exposed to the surface when the solvent is in contact with the contamination. In the present invention, carbon black is not used in the surface layer, thereby preventing the surface contamination caused by carbon black.

본 발명에 따른 바닥장식재는 색의 조합에 따라 칩의 색상을 선택할 수 있어 다양한 칼라의 연출이 가능하여 인테리어성이 우수한 패션성을 표현할 수 있다. 또한 칩과 칩 사이에 전도성 물질을 코팅하고, 하부에 카본블랙을 사용하여 표면저항 및 체적저항을 낮추어 전도성 기능을 갖는 장척 모자이크 형태의 인레이드 전도성 효과를 나타낸다.The flooring material according to the present invention can select the color of the chip according to the combination of colors can be produced in a variety of colors can express the interior fashion excellent. In addition, the conductive material is coated between the chip, and carbon black is used at the bottom to lower the surface resistance and the volume resistance, thereby exhibiting an inlaid conductive effect in the form of a long mosaic having a conductive function.

실시예 1Example 1

60 g/㎡의 유리섬유 위에 염화비닐수지 100 중량부, 가소제 TXIB 70 중량부, 내열안정제인 바륨-아연계 화합물 5 중량부, 탄산칼슘 200 중량부 및 전도성 분말(SnO2, Sb가 표면에 코팅되어 있는 산화티탄) 10 중량부로 구성된 염화비닐수지졸을 0.35 mm 두께로 도포하여 함침시킨 후, 130~150℃ 정도의 히팅 드럼에 통과, 고화시켜 염화비닐수지층이 함침된 기재층을 제조하였다.100 parts by weight of vinyl chloride resin, 70 parts by weight of TXIB plasticizer, 5 parts by weight of barium-zinc compound, heat stabilizer, 200 parts by weight of calcium carbonate, and conductive powder (SnO 2 , Sb) on a glass fiber of 60 g / m 2 And impregnated with a 0.35 mm thick vinyl chloride resin sol composed of 10 parts by weight of titanium oxide), and passed through a heating drum at about 130 to 150 ° C. to prepare a base layer impregnated with a vinyl chloride resin layer.

염화비닐수지 100 중량부, 가소제 디옥틸프탈레이트 30 중량부, 내열안정제인 바륨-아연계 화합물 8 중량부, 탄산칼슘 300 중량부 및 안료 2 중량부로 구성된 고형의 칩을 30 내지 50 메쉬의 크기 및 2 내지 5종의 색상으로 제조하고, 염화비닐수지 100 중량부, 디옥틸프타레이트 가소제 60~80 중량부, 바륨-아연계 안정제 3~5 중량부로 이루어진 바인더졸 및 전도성 용액을 칩 100 중량부에 대하여 각각 15 중량부 및 7 중량부로 믹서에 투입하고 혼합하여 칩 표면에 코팅시켰다.A solid chip composed of 100 parts by weight of a vinyl chloride resin, 30 parts by weight of a plasticizer dioctylphthalate, 8 parts by weight of a barium-zinc compound as a heat stabilizer, 300 parts by weight of calcium carbonate and 2 parts by weight of a pigment, has a size of 30 to 50 mesh and 2 To a binder of 5 to 5 colors, consisting of 100 parts by weight of a vinyl chloride resin, 60 to 80 parts by weight of a dioctylphthalate plasticizer, 3 to 5 parts by weight of a barium-zinc stabilizer, and a conductive solution based on 100 parts by weight of a chip. 15 parts by weight and 7 parts by weight were respectively added to the mixer and mixed to coat the chip surface.

이때 전도성 용액은 전도성 분말로서 SnO2, Sb가 표면에 코팅된 산화티탄 분말 100 중량부, 바인더(아크릴수지 3 내지 5 중량%, 비닐아세테이트와 염화비닐수지 코폴리머 15 내지 20 중량%, 메틸에틸케톤 용제 30 내지 50 중량%, 톨루엔 30 내지 40 중량%) 200 중량부, 내열안정제인 바륨-아연계 5 중량부를 헨셀 믹서에서 혼합하여 제조하였다.In this case, the conductive solution is a conductive powder, 100 parts by weight of titanium oxide powder coated on the surface of SnO 2 , Sb, binder (3 to 5% by weight of acrylic resin, vinyl acetate and vinyl chloride resin 15 to 20% by weight, methyl ethyl ketone 30 to 50% by weight of solvent, 30 to 40% by weight of toluene) and 200 parts by weight of barium-zinc based heat stabilizer were prepared by mixing in a Henschel mixer.

상기 코팅된 칩을 함침된 기재층 상부에 3 mm 정도로 배열한 뒤 210℃로 예열한 후 엠보싱하여 1.3 mm 정도의 칩층을 형성한 다음, 카본블랙이 포함된 이지층을 기재층 하부면에 합판하여 인레이드 타입의 전도성 바닥장식재를 제조하였다.The coated chip is arranged on the impregnated substrate layer about 3 mm and then preheated to 210 ° C., and then embossed to form a chip layer about 1.3 mm. Then, the easy layer including carbon black is laminated on the lower surface of the substrate layer. An inlaid type conductive flooring material was prepared.

상기 이지층은 염화비닐수지 100 중량부, 디옥틸프탈레이트 가소제 50 중량부, 바륨-아연계의 내열안정제 3 중량부, 탄산칼슘 300 중량부, 활제 2 중량부, 카본블랙 25 중량부를 혼합하여 연속 카렌다 압연방식을 사용하여 0.8 mm 두께로 제조하였다.The easy layer is a continuous calendar by mixing 100 parts by weight of vinyl chloride resin, 50 parts by weight of dioctylphthalate plasticizer, 3 parts by weight of barium-zinc-based heat stabilizer, 300 parts by weight of calcium carbonate, 2 parts by weight of lubricant, and 25 parts by weight of carbon black. It was prepared in a 0.8 mm thickness using a rolling method.

실시예 2Example 2

칩을 코팅하는 전도성 물질로서 전도성 용액 대신 졸을 사용한 것을 제외하고 상기 실시예 1과 동일하게 실시하였다.Except for using a sol instead of a conductive solution as the conductive material coating the chip was carried out in the same manner as in Example 1.

본 실시예에서는 중합도가 1,300인 염화비닐수지 100 중량부에 SnO2 및 Sb가 표면에 코팅된 산화티탄 분말 80 중량부, TXIB 100 중량부, 2차 가소제로 파라핀계 화합물 70 중량부 및 내열안정제로 바륨-아연계 화합물 8 중량부를 헨셀 믹서로 혼합하여 졸 형태로 제조한 전도성 졸을 사용하였다.In the present embodiment, 80 parts by weight of titanium oxide powder coated on the surface of SnO 2 and Sb on 100 parts by weight of vinyl chloride resin having a polymerization degree of 1,300, 100 parts by weight of TXIB, 70 parts by weight of paraffin compound as a secondary plasticizer, and a heat stabilizer. A conductive sol prepared in the form of a sol by mixing 8 parts by weight of a barium-zinc compound in a Henschel mixer was used.

실시예 3Example 3

조성이 다른 전도성 졸을 사용한 것을 제외하고 상기 실시예 2와 동일하게 실시하였다.The composition was carried out in the same manner as in Example 2, except that a conductive sol having a different composition was used.

본 실시예에서는 중합도가 1,300인 염화비닐수지 100 중량부에 SnO2 및 Sb가 표면에 코팅된 산화티탄 분말 80 중량부, TXIB 170 중량부 및 내열안정제로 바륨-아연계 화합물 8 중량부를 헨셀 믹서로 혼합하여 졸 형태로 제조한 전도성 졸을 사용하였다.In the present embodiment, 80 parts by weight of titanium oxide powder coated with SnO 2 and Sb on 100 parts by weight of vinyl chloride resin having a degree of polymerization of 1,300, 170 parts by weight of TXIB, and 8 parts by weight of a barium-zinc compound as a heat stabilizer using a Henschel mixer. A conductive sol prepared by mixing was used in sol form.

시험예Test Example

상기 실시예 1에서 제조한 본 발명의 바닥장식재 및 카본블랙을 적용한 종래의 바닥장식재를 대상으로 전도성 및 내오염성을 시험하였다. 전도성은 한국원사직물연구소에 의뢰하여 전기저항치, 정전기 발생, 정전기 소멸 등의 항목별로 측정하였으며, 그 결과는 표 1과 같다.Conductivity and fouling resistance were tested for the flooring material of the present invention prepared in Example 1 and the conventional flooring material to which carbon black was applied. Conductivity was measured by each item such as electric resistance value, static electricity generation, static electricity dissipation by requesting the Korea Yarn Textile Research Institute. The results are shown in Table 1.

시험항목Test Items 단위unit 규격치Standard value 종래 제품Conventional products 본 발명 제품Invention Product 시험방법Test Methods 전기저항Electrical resistance 표면저항Surface resistance ΩΩ 2.5ⅹ104~1.0ⅹ106 2.5ⅹ10 4 ~ 1.0ⅹ10 6 1.0ⅹ104~4.0ⅹ105 1.0ⅹ10 4 ~ 4.0ⅹ10 5 2.0ⅹ105~4.5ⅹ105 2.0ⅹ10 5 ~ 4.5ⅹ10 5 ASTM F150,NFPA 99(100 V, 500V)ASTM F150, NFPA 99 (100 V, 500 V) 체적저항Volume resistance ΩΩ 2.5ⅹ104~1.0ⅹ106 2.5ⅹ10 4 ~ 1.0ⅹ10 6 7.5ⅹ103~3.0ⅹ105 7.5ⅹ10 3 ~ 3.0ⅹ10 5 7.0ⅹ103~4.0ⅹ105 7.0ⅹ10 3 ~ 4.0ⅹ10 5 정전기 발생Static electricity generation kVkV 3.5 이내Within 3.5 0.95(끌기)0.95 (drag) 0.99(끌기)0.99 (drag) AATCC-134AATCC-134 정전기 소멸Electrostatic dissipation secsec 0.5 이내Within 0.5 0.01(끌기)0.01 (drag) 0.02(끌기)0.02 (drag) Federal Method101-4046Federal Method101-4046

표 1은 대전성 결과를 나타낸 것으로, 본 발명의 바닥장식재는 종래의 전도성 타일과 유사한 측정결과를 얻어 종래의 전도성 카본블랙 대비 전도성 기능은 이상이 없음을 확인하였다.Table 1 shows the results of the chargeability, the flooring material of the present invention obtained similar measurement results to the conventional conductive tile, it was confirmed that the conductive function compared to the conventional conductive carbon black is no abnormality.

카본에 의한 오염성은 자체적인 시험방법에 의해 종래의 카본블랙을 사용한 바닥장식재와 투명한 전도성 물질을 코팅처리한 본 발명의 바닥장식재 시료 위에 아세톤을 각각 떨어뜨리고 마른 걸레로 문질러 카본블랙이 표면으로 노출되어 나오는지 여부로 평가하였다.Contamination by carbon was dropped by acetone onto the flooring material sample of the present invention coated with a transparent conductive material and a flooring material using the conventional carbon black by its own test method, and rubbed with a dry rag to expose the carbon black to the surface. It was evaluated whether it came out.

시험항목Test Items 종래 제품Conventional products 본 발명 제품Invention Product 시험방법Test Methods 카본 오염성Carbon contamination 카본블랙 오염Carbon black pollution 이상없음clear 아세톤으로 표면 청소Clean the surface with acetone

상기 표 2는 카본블랙에 의한 오염성의 결과를 나타낸 것으로, 종래의 카본블랙을 사용한 바닥장식재의 경우 용제에 의해 전도성 카본블랙이 표면으로 노출된 반면, 본 발명의 바닥장식재는 아무런 이상이 없어 깨끗한 바닥 상태를 유지할 수 있음을 확인하였다.Table 2 shows the results of contamination by the carbon black, the conductive carbon black is exposed to the surface by the solvent in the case of the floor decorative material using the conventional carbon black, the floor decorative material of the present invention is clean, there is no abnormality It was confirmed that the state can be maintained.

또한 본 발명의 바닥장식재는 투명한 전도성 물질을 사용하여 다양한 인레이드 칩의 색상과 자연스러운 입체 효과의 조화로 종래의 전도성 제품의 문제점인 검은색의 카본블랙으로 인한 패션성의 제약을 탈피하고 다양한 외관을 창출할 수 있음을 확인하였다.In addition, the flooring material of the present invention avoids the limitations of fashion due to black carbon black, which is a problem of the conventional conductive products, by creating a variety of appearance and harmony of the color of various inlaid chips using a transparent conductive material and create various appearances It was confirmed that it can be done.

이상 설명한 바와 같이, 본 발명에 따른 바닥장식재는 다양한 색상의 인레이드 칩을 사용함으로써 다양한 색들의 칩의 조화로 다양한 외관 연출이 가능할 뿐만 아니라, 중간에 치수보강층을 삽입하여 온도에 의한 치수 변형을 최소화하여 시공성 및 사용 품질을 극대화하고, 상하부에 전도성이 유지되어 제품의 마모에 따른 전도성 변화가 발생하지 않고, 종래의 카본블랙에 의한 바닥재의 오염을 근본적으로 해결할 수 있다.As described above, the flooring material according to the present invention is not only possible to produce a variety of appearances by harmonizing chips of various colors by using inlaid chips of various colors, but also minimize the dimensional deformation due to temperature by inserting a dimension reinforcing layer in the middle. By maximizing the workability and quality of use, and the conductivity is maintained in the upper and lower parts without changing the conductivity caused by the wear of the product, it is possible to fundamentally solve the contamination of the flooring by the conventional carbon black.

도 1은 본 발명에 따른 바닥장식재의 제조공정도,1 is a manufacturing process of the floor decoration according to the invention,

도 2는 본 발명에 따른 바닥장식재의 단면도,2 is a cross-sectional view of the flooring according to the invention,

도 3은 종래 바닥장식재의 단면도.Figure 3 is a cross-sectional view of the conventional floor decoration.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>

1 : 기재층1: base material layer

2 : 표면층(칩층)2: surface layer (chip layer)

3 : 이지층3: easy layer

4 : 카본블랙이 포함된 염화비닐졸4: vinyl chloride sol containing carbon black

5 : 염화비닐수지 칩층5: vinyl chloride resin chip layer

Claims (10)

아래로부터 이지층, 기재층 및 표면층을 포함하며,From below, including an easy layer, a base layer, and a surface layer, 상기 표면층은 적어도 2종 이상의 색으로 조합된 다수의 칩으로 이루어지되, 상기 칩은 전도성 용액으로 코팅되고 바인더졸에 의해 결합되어 있으며,The surface layer is composed of a plurality of chips combined in at least two or more colors, the chips are coated with a conductive solution and bonded by a binder sol, 상기 칩은 30 내지 50 메쉬(0.279 내지 0.535 ㎜)의 입도크기를 갖는 염화비닐수지 칩이고, 표면층의 두께는 0.8 내지 1.3 ㎜이며,The chip is a vinyl chloride resin chip having a particle size of 30 to 50 mesh (0.279 to 0.535 mm), the thickness of the surface layer is 0.8 to 1.3 mm, 상기 전도성 용액은 전도성 분말로서 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄 분말 100 중량부, 바인더 200 내지 400 중량부, 메틸에틸케톤 200 내지 400 중량부 및 내열안정제인 바륨-아연계 화합물 2 내지 5 중량부를 헨셀믹서로 혼합하여 제조된 전도성 용액이고, 상기 전도성 용액의 사용량은 칩 100 중량부에 대하여 3 내지 15 중량부이며,The conductive solution is a conductive powder, 100 parts by weight of titanium oxide powder coated with SnO 2 , Sb or a mixture thereof, 200 to 400 parts by weight of binder, 200 to 400 parts by weight of methyl ethyl ketone and barium-zinc compound 2 as a heat stabilizer. To 5 parts by weight of a conductive solution prepared by mixing with a Henschel mixer, the amount of the conductive solution is 3 to 15 parts by weight based on 100 parts by weight of the chip, 상기 바인더졸은 염화비닐수지 100 중량부, 디옥틸프탈레이트 가소제 60 내지 80 중량부 및 바륨-아연계 안정제 3 내지 5 중량부를 포함하는 염화비닐졸이며,The binder sol is a vinyl chloride sol containing 100 parts by weight of a vinyl chloride resin, 60 to 80 parts by weight of a dioctylphthalate plasticizer and 3 to 5 parts by weight of a barium-zinc stabilizer. 상기 기재층은 유리섬유 재질의 스크림, 직포 또는 부직포가 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄 분말을 염화비닐수지 100 중량부에 대하여 10 내지 50 중량부 포함하는 염화비닐졸로 함침된 것이며,The base layer is impregnated with a vinyl chloride sol containing 10 to 50 parts by weight of titanium oxide powder coated with a glass fiber scrim, woven fabric or nonwoven fabric of SnO 2 , Sb or a mixture thereof with respect to 100 parts by weight of vinyl chloride resin. , 상기 이지층은 염화비닐수지 100 중량부에 대하여 카본블랙 10 내지 25 중량부를 포함하는 염화비닐수지층인 것을 특징으로 하는 전도성 바닥장식재.The easy layer is a conductive floor decorative material, characterized in that the vinyl chloride resin layer containing 10 to 25 parts by weight of carbon black relative to 100 parts by weight of vinyl chloride resin. 삭제delete 삭제delete 삭제delete 삭제delete 삭제delete 삭제delete 삭제delete 적어도 2종 이상의 색상으로 입도크기 30 내지 50 메쉬(0.279 내지 0.535 ㎜)의 칩을 제조하는 단계;Manufacturing a chip having a particle size of 30 to 50 mesh (0.279 to 0.535 mm) in at least two or more colors; 상기 칩을 전도성 분말로서 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄 분말 100 중량부, 바인더 200 내지 400 중량부, 메틸에틸케톤 200 내지 400 중량부 및 내열안정제인 바륨-아연계 화합물 2 내지 5 중량부를 헨셀믹서로 혼합하여 제조된 전도성 용액으로 코팅하는 단계;100 parts by weight of titanium oxide powder coated with SnO 2 , Sb or a mixture thereof as a conductive powder, 200 to 400 parts by weight of binder, 200 to 400 parts by weight of methyl ethyl ketone, and barium-zinc compound 2 to 2 as heat stabilizer. Coating 5 parts by weight with a conductive solution prepared by mixing with a Henschel mixer; 상기 전도성 용액으로 코팅된 칩을 염화비닐수지 100 중량부, 디옥틸프탈레이트 가소제 60 내지 80 중량부 및 바륨-아연계 안정제 3 내지 5 중량부를 포함하는 염화비닐졸로 이루어진 바인더졸로 결합시키는 단계;Bonding the chip coated with the conductive solution to a binder sol comprising a vinyl chloride sol comprising 100 parts by weight of a vinyl chloride resin, 60 to 80 parts by weight of a dioctylphthalate plasticizer and 3 to 5 parts by weight of a barium-zinc stabilizer; 유리섬유 재질의 스크림, 직포 또는 부직포를 SnO2, Sb 또는 이들의 혼합물로 코팅된 산화티탄 분말을 염화비닐수지 100 중량부에 대하여 10 내지 50 중량부 포함하는 염화비닐졸로 함침하여 기재층을 형성시키는 단계;A substrate layer is formed by impregnating a titanium oxide powder coated with a glass fiber material scrim, woven fabric or nonwoven fabric with SnO 2 , Sb or a mixture thereof with vinyl chloride sol containing 10 to 50 parts by weight based on 100 parts by weight of vinyl chloride resin. step; 상기 전도성 용액으로 코팅되고 바인더졸로 결합된 칩을 기재층 상부에 배열하고, 190 내지 250℃의 오븐에서 3 내지 4분간에 걸쳐 예열한 후, 6 내지 7 kg/㎠의 엠보싱 롤에 통과시켜 압연한 다음, 냉각시켜 0.8 내지 1.3 ㎜ 두께의 표면층을 형성시키는 단계;The chips coated with the conductive solution and bonded with a binder sol were arranged on the substrate layer, preheated in an oven at 190 to 250 ° C. for 3 to 4 minutes, and then rolled by passing through an embossing roll of 6 to 7 kg / cm 2. Then cooling to form a surface layer 0.8-1.3 mm thick; 염화비닐수지 100 중량부에 대하여 카본블랙 10 내지 25 중량부를 포함하는 염화비닐수지층을 기재층 하부에 합판하여 이지층을 형성시키는 단계를 포함하는 전도성 바닥장식재의 제조방법.A method of manufacturing a conductive flooring material comprising the step of plywood a vinyl chloride resin layer containing 10 to 25 parts by weight of carbon black with respect to 100 parts by weight of vinyl chloride resin to the base layer. 삭제delete
KR10-2002-0068710A 2002-11-07 2002-11-07 Inlaid conductive flooring containing conductive materials and method for preparing the same KR100517171B1 (en)

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KR20190072131A (en) * 2017-12-15 2019-06-25 이주엽 Chemical resistance flooring having excellent surface property reinforcement and soundproofing
KR102025482B1 (en) * 2017-12-15 2019-09-25 이주엽 Chemical resistance flooring having excellent surface property reinforcement and soundproofing

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