KR100515828B1 - Method for making conductive thin film - Google Patents
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- KR100515828B1 KR100515828B1 KR10-2002-0073475A KR20020073475A KR100515828B1 KR 100515828 B1 KR100515828 B1 KR 100515828B1 KR 20020073475 A KR20020073475 A KR 20020073475A KR 100515828 B1 KR100515828 B1 KR 100515828B1
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- C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
- C03C17/34—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
- C03C17/36—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
- C03C17/3602—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer
- C03C17/3668—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer the multilayer coating having electrical properties
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- C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
- C03C17/34—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
- C03C17/36—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
- C03C17/40—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal all coatings being metal coatings
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- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
- H01B1/02—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
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- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
- H01B1/06—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of other non-metallic substances
- H01B1/08—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of other non-metallic substances oxides
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- H01B5/00—Non-insulated conductors or conductive bodies characterised by their form
- H01B5/14—Non-insulated conductors or conductive bodies characterised by their form comprising conductive layers or films on insulating-supports
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/02—Pretreatment of the material to be coated
- C23C14/024—Deposition of sublayers, e.g. to promote adhesion of the coating
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
- C23C14/18—Metallic material, boron or silicon on other inorganic substrates
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/24—Vacuum evaporation
Abstract
본 발명은 전도성 박막의 비저항을 개선할 수 있는 새로운 전도성 박막 제조 방법을 제공한다. 본 발명은, 기재 위에, 전도층을 구성하는 그레인의 성장을 위한 핵이 균일하게 생성되도록 유도하는 핵 생성 유도층을 형성하는 단계; 상기 핵 생성 유도층 위에 전도층을 구성하는 재료를 공급하여 핵을 균일하게 생성시키는 단계; 상기 핵 생성 유도층 및 상기 핵 위로 전도층을 구성하는 재료를 공급하여 그레인을 성장시킴으로써 전도층을 형성하는 단계를 포함하며, 이때, 상기 전도층을 구성하는 재료는 상기 핵 생성 유도층 형성 단계에서 사용하는 재료와 서로 다른 조성을 갖는 재료를 사용하는, 전도성 박막 제조 방법을 제공한다.The present invention provides a novel conductive thin film manufacturing method that can improve the specific resistance of the conductive thin film. The present invention comprises the steps of forming a nucleation inducing layer on the substrate to induce nuclei for the growth of the grains constituting the conductive layer uniformly; Supplying a material constituting a conductive layer on the nucleation inducing layer to uniformly generate nuclei; Forming a conductive layer by supplying a material constituting the conductive layer over the nucleation inducing layer and the nucleus to grow grain, wherein the material constituting the conductive layer is formed in the nucleation inducing layer forming step. Provided is a method for producing a conductive thin film, which uses a material having a composition different from that of a material used.
Description
본 발명은 전도성 박막 제조 방법에 관한 것이며, 더욱 상세하게는 전도성 박막의 비저항을 개선하기 위한 방법에 관한 것이다.The present invention relates to a method for manufacturing a conductive thin film, and more particularly to a method for improving the resistivity of a conductive thin film.
전도성 박막을 구성하는 물질의 고유 비저항값을 ρ1, 박막 형성 과정에서 성장하는 결정의 형상에 의한 비저항값을 ρ2, 박막 형성 과정에서 혼입된 불순물에 의한 비저항값을 ρ3, 박막 형성 후 산화된 박막 표면에 의한 비저항값을 ρ4 라 할때, 전도성 박막의 비저항값 ρt 는 ρ1, ρ2, ρ3 및 ρ4 의 합으로 표시된다.The specific resistivity of the material constituting the conductive thin film is ρ 1 , the resistivity due to the shape of the crystal growing in the thin film formation process ρ 2 , the resistivity due to impurities mixed in the thin film formation process ρ 3 , and oxidation When the resistivity value due to the thin film surface is ρ 4 , the resistivity value ρ t of the conductive thin film is represented by the sum of ρ 1 , ρ 2 , ρ 3 and ρ 4 .
종래의 박막 비저항 개선 방법으로서, 박막 형성 중에 기재를 가열함으로써 성장하는 그레인(grain)의 형상을 변형시키는 방법이 있다. 이 방법은 ρ2 의 감소를 통하여 박막의 비저항을 개선할 수 있다. 그러나 이 방법은, 용융점이 높은 금속이나 화학적으로 결합하기 힘든 화합물의 경우에는 적용하기가 곤란하고, 기재가 유기물인 경우에는 적용할 수 없다.As a conventional thin film resistivity improving method, there is a method of modifying the shape of grains grown by heating a substrate during thin film formation. This method can improve the resistivity of the thin film by reducing ρ 2 . However, this method is difficult to apply in the case of a metal having a high melting point or a compound that is difficult to chemically bond, and cannot be applied in the case where the substrate is an organic substance.
종래의 다른 방법으로서는, 진공증착챔버의 초기진공도를 낮게 하여 불순물의 혼입을 최소화시키는 방법이 있다. 이 방법은 ρ3 의 감소를 통하여 박막의 비저항을 개선할 수 있다.Another conventional method is to minimize the incorporation of impurities by lowering the initial vacuum degree of the vacuum deposition chamber. This method can improve the resistivity of the thin film by reducing ρ 3 .
종래의 또 다른 방법으로서는, 박막을 구성하는 그레인의 성장속도를 낮게 하여 증착표면에서의 입자의 이동을 증가시킴으로써 그레인의 크기를 증가시키는 방법이 있다. 이 방법은 ρ2 의 감소를 통하여 박막의 비저항을 개선할 수 있다. 그러나 이 방법은 박막의 형성이 느리게 진행되므로, 챔버 내에 잔류하는 산소, 질소 또는 수분 등의 혼입/반응에 의해 박막내의 불순물 함량이 증가한다는 단점이 있다. 상기 불순물은 ρ3 를 증가시키므로 박막의 비저항값을 증가시키는 요인이 된다.Another conventional method is to increase the grain size by lowering the growth rate of the grains constituting the thin film and increasing the movement of particles on the deposition surface. This method can improve the resistivity of the thin film by reducing ρ 2 . However, since the formation of the thin film proceeds slowly, the impurity content in the thin film is increased by incorporation / reaction of oxygen, nitrogen or moisture remaining in the chamber. Since the impurity increases ρ 3 , it is a factor that increases the resistivity of the thin film.
도 1은 그레인 성장을 위한 핵이 불균일하게 생성된 종래의 박막 형성 과정을 개략적으로 나타낸 도면이다. 도 1을 통하여 박막의 성장과정이 비저항에 영향을 미치는 메카니즘을 이해할 수 있다.1 is a view schematically showing a conventional thin film formation process in which nuclei for grain growth are unevenly generated. The mechanism in which the growth process of the thin film affects the resistivity can be understood through FIG. 1.
기재의 표면을 플라즈마-크리닝 또는 UV-크리닝 등에 의한 전처리를 하지 않거나, 할 수 없는 경우에 일반적으로 기재 위에 핵이 불균일하게 생성된다 (도 1의 A).In the case where the surface of the substrate is not subjected to pretreatment by plasma-cleaning or UV-cleaning or the like, or is not possible, nuclei are generally generated unevenly on the substrate (FIG.
상기 핵에 박막 물질이 계속 공급되면, 핵은 성장하여 그레인이 된다 (도 1의 B).If a thin film material is continuously supplied to the nucleus, the nucleus grows and becomes grain (FIG. 1B).
상기 그레인에 박막 물질이 계속 공급되면, 그레인의 성장이 계속 진행되면서 인접한 그레인들의 결합이 발생한다 (도 1의 C, D).If the thin film material is continuously supplied to the grain, the growth of the grain continues, the bonding of adjacent grains occurs (C, D of FIG. 1).
초기에 생성된 핵의 배열이 불규칙하였기 때문에, 그레인의 성장 및 결합이 진행됨에 따라 박막 물질로 채워지지 않은 채널이 형성된다 (도 1의 E). Since the nucleation of the initially generated nucleus was irregular, as the growth and bonding of the grain proceeded, a channel not filled with the thin film material is formed (E of FIG. 1).
그레인의 성장 및 결합이 더 진행되더라도 상기의 채널은 완전히 소멸하지 않으며, 불순물이 혼입된 다수의 홀을 남긴 채 박막 형성 과정은 종료된다 (도 1의 단계 F). Even if grain growth and bonding proceed further, the channel does not completely disappear, and the thin film formation process is terminated, leaving a plurality of holes in which impurities are mixed (step F in FIG. 1).
도 2는 핵 생성 유도층 없이 성장된 박막의 모식적인 단면 모습인데, 성장된 그레인의 형상 및 크기가 불균일하게 나타나 있다. 그레인의 형상 및 크기가 불균일하면 불순물이 혼입될 가능성이 커진다.2 is a schematic cross-sectional view of a thin film grown without a nucleation inducing layer, and the shape and size of the grown grain are not uniformly shown. If the shape and size of the grains are non-uniform, the possibility of incorporation of impurities increases.
결국, 불균일하게 생성된 핵에 의하여 성장된 그레인의 크기 및 형상은 불균일해지고, 박막 내에 다수의 홀이 발생하며 그 안에 불순물이 혼입되므로, ρ2 와 ρ3 의 값이 증가하게 되어 박막의 비저항은 개선되지 않는다.As a result, the size and shape of the grain grown by the non-uniformly generated nucleus becomes non-uniform, and a large number of holes are generated in the thin film and impurities are mixed therein, so that the values of ρ 2 and ρ 3 increase and the specific resistance of the thin film is increased. No improvement
본 발명은 전도성 박막의 비저항을 개선할 수 있는 새로운 전도성 박막 제조 방법을 제공한다.The present invention provides a novel conductive thin film manufacturing method that can improve the specific resistance of the conductive thin film.
본 발명은, 기재 위에, 전도층을 구성하는 그레인의 성장을 위한 핵이 균일하게 생성되도록 유도하는 핵 생성 유도층을 형성하는 단계; 상기 핵 생성 유도층 위에 전도층을 구성하는 재료를 공급하여 핵을 균일하게 생성시키는 단계; 상기 핵 생성 유도층 및 상기 핵 위로 전도층을 구성하는 재료를 공급하여 그레인을 성장시킴으로써 전도층을 형성하는 단계를 포함하며, 이때, 상기 전도층을 구성하는 재료는 상기 핵 생성 유도층 형성 단계에서 사용하는 재료와 서로 다른 조성을 갖는 재료를 사용하는, 전도성 박막 제조 방법을 제공한다.The present invention comprises the steps of forming a nucleation inducing layer on the substrate to induce nuclei for the growth of the grains constituting the conductive layer uniformly; Supplying a material constituting a conductive layer on the nucleation inducing layer to uniformly generate nuclei; Forming a conductive layer by supplying a material constituting the conductive layer over the nucleation inducing layer and the nucleus to grow grain, wherein the material constituting the conductive layer is formed in the nucleation inducing layer forming step. Provided is a method for producing a conductive thin film, which uses a material having a composition different from that of a material used.
본 발명의 방법에서는 전도층을 구성하는 그레인의 성장을 위한 핵이 균일하게 생성된다. 그레인 성장을 위한 핵이 균일하게 생성된 후의 박막 형성 과정을 도 3에 개략적으로 나타내었다. In the method of the present invention, nuclei for the growth of the grains constituting the conductive layer are uniformly generated. The thin film formation process after the nucleus for grain growth is uniformly generated is schematically shown in FIG. 3.
기재 위에 핵 생성 유도층이 형성되면, 그레인 성장을 위한 핵이 상기 유도층 위에 규칙적인 배열로서 균일하게 생성된다 (도 3의 A).Once the nucleation inducing layer is formed on the substrate, nuclei for grain growth are uniformly generated in a regular arrangement on the induction layer (FIG. 3A).
상기 핵에 전도층 구성 재료가 계속 공급되면, 핵은 성장하여 그레인이 된다 (도 3의 B).If the conductive layer constituent material is continuously supplied to the nucleus, the nucleus grows and becomes grain (FIG. 3B).
상기 그레인에 전도층 구성 재료가 계속 공급되면, 그레인의 성장이 계속 진행되면서 인접한 그레인들의 결합이 발생한다 (도 3의 C).If the conductive layer constituent material is continuously supplied to the grains, the growth of the grains continues to occur and bonding of adjacent grains occurs (FIG. 3C).
초기에 생성된 핵의 배열이 규칙적이기 때문에, 그레인의 성장 및 결합이 진행됨에 따라 박막은 치밀하게 형성된다 (도 3의 D). 채널 및 홀의 발생이 극도로 억제되므로 불순물의 흡착이나 혼입이 발생되기 어렵다.Since the arrangement of nuclei produced initially is regular, thin films are formed densely as grain growth and bonding proceeds (FIG. 3D). Since generation of channels and holes is extremely suppressed, adsorption or mixing of impurities is unlikely to occur.
그레인의 성장 및 결합이 더 진행되면, 박막의 치밀도는 더욱 증가하며, 극소수의 홀 만을 남긴 채 박막은 완성된다 (도 3의 E). As the growth and bonding of the grain proceeds further, the density of the thin film further increases, and the thin film is completed leaving only a few holes (E in FIG. 3).
따라서, 본 발명에 따르면, 균일하게 생성된 핵에 의하여 성장된 그레인의 크기 및 형상이 균일해지고, 박막 내의 홀 발생을 억제할 수 있으며 그에 따라 박막내에 혼입되는 불순물의 양도 감소한다.Therefore, according to the present invention, the size and shape of the grains grown by the uniformly generated nucleus can be made uniform, and the generation of holes in the thin film can be suppressed, thereby reducing the amount of impurities incorporated in the thin film.
도 4 및 도 5는 본 발명의 방법의 일구현예에 따라 성장된 박막 (기재: 유리, 전도층 구성 재료: 알루미늄) 의 모식적인 단면 모습과 표면사진이다. 그레인의 형상 및 크기가 균일하게 나타나 있으며, 또한 큰 그레인 사이의 하부 공간을 작은 그레인이 치밀하게 채우고 있으므로 불순물의 혼입가능성이 최소화된다. 4 and 5 are schematic cross-sectional views and surface photographs of thin films (substrate: glass, conductive layer constituent material: aluminum) grown according to one embodiment of the method of the present invention. The shape and size of the grains are shown uniformly, and since the small spaces are densely filled in the lower space between the large grains, the possibility of incorporation of impurities is minimized.
이와 같이 본 발명의 방법은, 초진공 조건의 엄격한 유지, 기재의 가열 등과 같은 번거로운 단계를 거칠 필요없이 간단하고 용이하게 박막의 ρ2 와 ρ3 의 값을 감소시킬 수 있으므로 제조된 박막의 비저항을 효과적으로 개선하며, 종래의 방법보다 더 광범위하게 적용될 수 있다.As described above, the method of the present invention can reduce the value of ρ 2 and ρ 3 of the thin film simply and easily without the need for troublesome steps such as strict maintenance of ultra-vacuum conditions, heating of the substrate, and the like. It effectively improves and can be applied more widely than the conventional method.
이하 에서는 본 발명의 방법을 보다 상세하게 설명한다.Hereinafter, the method of the present invention will be described in more detail.
상기 핵 생성 유도층 부착 단계에서, 상기 기재로는, 예를 들면, 유리, 플라스틱, 폴리머, 세라믹 등이 사용될 수 있으며, 기타 전도성 박막의 기재로 사용될 수 있는 것이라면 제한없이 사용가능하다.In the step of attaching the nucleation inducing layer, for example, glass, plastic, polymer, ceramic, or the like may be used, and any substrate may be used without limitation as long as it can be used as a substrate for other conductive thin films.
상기 핵 생성 유도층을 형성하기 위하여 사용되는 재료는, 전도층을 구성하는 재료와 다른 재료이면 무엇이든 가능하나, 더욱 바람직하게는 티타늄, 크롬, 코발트, 마그네슘, 카드뮴, 리튬, 은, 이들의 산화물, 질화물, 할로겐화물 등과 같은 화합물, 금, 백금, 또는 이들의 혼합물 등이 사용될 수 있다.The material used to form the nucleation inducing layer may be any material other than the material constituting the conductive layer, but more preferably titanium, chromium, cobalt, magnesium, cadmium, lithium, silver, or oxides thereof Compounds such as nitrides, halides, and the like, gold, platinum, mixtures thereof, and the like can be used.
상기 핵 생성 유도층은, 예를 들면, 진공증착법 또는 스퍼터링법 등과 같은 방법으로 기재 위에 증착될 수 있는데, 반드시 이러한 방법에만 한정되는 것은 아니며 상기 재료를 기재위에 부착시킬 수 있는 어떠한 방법이라도 사용가능하다. The nucleation inducing layer may be deposited on the substrate by a method such as, for example, vacuum deposition or sputtering, and the like, but is not necessarily limited to this method, and any method capable of attaching the material on the substrate may be used. .
상기 핵 생성 유도층의 두께가 너무 얇으면 완벽한 층덮힘이 이루어지지 않을 가능성이 있고, 두께를 어느 정도 이상 증가시키더라도 핵 생성 유도기능은 포화된다. 또한, 상기 핵 생성 유도층의 두께를 지나치게 증가시키면, 나중에 형성될 전도성 박막층의 두께를 위한 여지를 잠식할 우려가 있다. 이러한 점을 고려하여, 상기 핵 생성 유도층은 약 1 내지 약 10 nm 정도의 두께를 갖도록 형성될 수 있다. If the thickness of the nucleation inducing layer is too thin, there is a possibility that perfect layer covering is not achieved, and the nucleation inducing function is saturated even if the thickness is increased to some extent. In addition, if the thickness of the nucleation inducing layer is excessively increased, there is a fear of encroaching room for the thickness of the conductive thin film layer to be formed later. In consideration of this point, the nucleation inducing layer may be formed to have a thickness of about 1 to about 10 nm.
상기 핵 생성 유도층의 표면은 매우 높은 표면에너지를 가지고 있기 때문에, 그 위에 공급되는 전도층 구성 재료가 매우 규칙적인 배열을 갖는 핵(nuclei)을 생성하도록 유도한다.Since the surface of the nucleation inducing layer has a very high surface energy, the conductive layer constituent material supplied thereon leads to the generation of nuclei with a very regular arrangement.
상기 전도층을 구성하는 재료로서는 구리, 알루미늄, 금, 백금, 몰리브덴, 은, 지르코늄, 아연, 몰리브덴-텅스텐 합금, 산화인듐주석(ITO) 또는 이들의 혼합물 등이 사용될 수 있으며, 반드시 이에 한정되지는 않고 기타 전도성을 나타내는 재료도 사용가능하다. Copper, aluminum, gold, platinum, molybdenum, silver, zirconium, zinc, molybdenum-tungsten alloy, indium tin oxide (ITO), or a mixture thereof may be used as a material constituting the conductive layer, but is not necessarily limited thereto. And other conductive materials may be used.
상기 핵 생성 단계에서, 상기 핵 생성 유도층 위에 상기 전도층 구성 재료를 공급하는 방법으로서는, 예를 들면, 진공증착법 또는 스퍼터링법 등이 사용될 수 있으나 반드시 이에 한정되지는 않는다. 핵 생성 유도층 위에 공급된 전도층 구성 재료는 상기 핵 생성 유도층 표면의 매우 강한 표면에너지 때문에 규칙적인 배열을 갖는 핵 군집 형태로 부착된다.In the nucleation step, as the method for supplying the conductive layer constituent material on the nucleation induction layer, for example, a vacuum deposition method or a sputtering method may be used, but is not necessarily limited thereto. The conductive layer constituent material supplied over the nucleation inducing layer is attached in the form of a nucleus community having a regular arrangement because of the very strong surface energy of the surface of the nucleation inducing layer.
상기 전도층 형성 단계에서도, 전도층 구성 재료의 공급은 진공증착법 또는 스퍼터링법에 의하여 수행될 수 있으나, 반드시 이에 한정되지는 않는다. 전도층 구성 재료가 상기 핵 생성 유도층 및 그 위에 균일하게 생성되어 있는 핵으로 공급됨에 따라, 핵은 성장하여 그레인이 된다. 전도층이 완성될 때까지 전도층 구성 재료의 공급은 계속된다.Also in the conductive layer forming step, the supply of the conductive layer constituent material may be performed by a vacuum deposition method or a sputtering method, but is not necessarily limited thereto. As the conductive layer constituent material is fed into the nucleation inducing layer and nuclei uniformly formed thereon, the nuclei grow and become grain. The supply of conductive layer constituent material continues until the conductive layer is completed.
본 발명의 모든 단계는 하나의 챔버내에서 수행될 수도 있으며, 또는 각 단계가 다른 챔버에서 수행될 수 있으며, 또는 둘 이상의 일부 단계는 동일한 챔버에서, 나머지 단계는 다른 챔버에서 수행될 수도 있다. 박막 제조 공정의 간편성 및 신속성을 위해서는 본 발명의 모든 단계가 하나의 챔버 내에서 연속적으로 수행되는 것이 더욱 바람직하다.All steps of the present invention may be performed in one chamber, or each step may be performed in a different chamber, or two or more of some steps may be performed in the same chamber and the remaining steps may be performed in another chamber. For simplicity and rapidity of the thin film manufacturing process, it is more preferred that all steps of the present invention be carried out continuously in one chamber.
또한 본 발명에서는, 핵 생성 유도층; 상기 핵 생성 유도층 위에 위치하며, 상기 핵 생성 유도층을 구성하는 재료와 다른 재료로 구성되는 전도층을 포함하는 전도성 박막을 제공한다.In the present invention, the nucleation induction layer; The conductive thin film is disposed on the nucleation inducing layer and includes a conductive layer composed of a material different from a material constituting the nucleation inducing layer.
상기 박막은 앞에서 설명한 본 발명에 따른 전도성 박막 제조 방법에 의하여 제조될 수 있다.The thin film may be manufactured by the conductive thin film manufacturing method according to the present invention described above.
본 발명의 전도성 박막에 있어서, 일반적으로 상기 핵 생성 유도층은 임의의 기재위에 형성되는데, 상기 기재로서는, 예를 들면, 유리, 플라스틱, 폴리머, 세라믹 등이 사용될 수 있으며, 기타 전도성 박막의 기재로 사용될 수 있는 것이라면 제한없이 사용가능하다. 상기 핵 생성 유도층은, 전도층을 구성하는 재료와 다른 재료이면 무엇이든 가능하나, 더욱 바람직하게는 티타늄, 크롬, 코발트, 마그네슘, 카드뮴, 리튬, 은, 이들의 산화물, 질화물, 할로겐화물 등과 같은 화합물, 금, 백금, 또는 이들의 혼합물 등을 포함할 수 있다. 상기 핵 생성 유도층의 두께는, 특별한 제한은 없으나, 앞에서 설명한 이유를 고려하여, 예를 들면 약 1 내지 약 10 nm 정도로 할 수 있다. 상기 전도층은 구리, 알루미늄, 금, 백금, 몰리브덴, 은, 지르코늄, 아연, 몰리브덴-텅스텐 합금, 산화인듐주석(ITO) 또는 이들의 혼합물 등을 포함할 수 있으며, 반드시 이에 한정되지는 않고 기타 전도성을 나타내는 재료도 사용가능하다.In the conductive thin film of the present invention, generally, the nucleation inducing layer is formed on an arbitrary substrate, and as the substrate, for example, glass, plastic, polymer, ceramic, etc. may be used, and as the substrate of other conductive thin films, Anything that can be used can be used without limitation. The nucleation induction layer may be any material other than the material constituting the conductive layer, more preferably titanium, chromium, cobalt, magnesium, cadmium, lithium, silver, oxides, nitrides, halides, and the like. Compounds, gold, platinum, mixtures thereof, and the like. The thickness of the nucleation inducing layer is not particularly limited, but may be, for example, about 1 nm to about 10 nm in view of the aforementioned reasons. The conductive layer may include copper, aluminum, gold, platinum, molybdenum, silver, zirconium, zinc, molybdenum-tungsten alloy, indium tin oxide (ITO), or a mixture thereof, and the like, but is not necessarily limited thereto. It is also possible to use a material that represents.
본 발명의 전도성 박막은, PDP, VFD, LCD, 유기EL, FED 등과 같은 평판디스플레이의 전극부재로서 적용될 수 있을 뿐만아니라, 임의의 패턴을 갖는 전도성 박막 부재를 필요로 하는 모든 분야에서 적용될 수 있다.The conductive thin film of the present invention can be applied not only as an electrode member of a flat panel display such as PDP, VFD, LCD, organic EL, FED, etc., but also in all fields requiring a conductive thin film member having an arbitrary pattern.
이하에서는 실시예를 통하여 본 발명을 더욱 상세하게 설명한다. 그러나 본 발명의 기술적 사상이 하기의 실시예로 한정되는 것은 아니다.Hereinafter, the present invention will be described in more detail with reference to Examples. However, the technical idea of the present invention is not limited to the following examples.
<실시예><Example>
실시예 1Example 1
유리로된 기재 위에 열-진공증착법으로 LiN을 약 1 nm 정도의 두께로 증착하여 핵 생성 유도층을 형성하였다. 상기 핵 생성 유도층 위에 알루미늄을 진공증착법으로 증착하여 약 150 nm의 전도층을 성장시켰다. LiN was deposited to a thickness of about 1 nm on the glass substrate by heat-vacuum deposition to form a nucleation inducing layer. Aluminum was deposited by vacuum deposition on the nucleation inducing layer to grow a conductive layer of about 150 nm.
이렇게 얻어진 전도성 박막의 면저항값을 4점탐침법 (4-point probe method) 을 이용하여 측정한 결과 약 300 mΩ/cm2 의 수치를 얻었다.The sheet resistance of the conductive thin film thus obtained was measured using a four-point probe method to obtain a value of about 300 mPa / cm 2 .
실시예 2Example 2
유리 기재 위에 스퍼터링법으로 크롬을 약 4 nm 정도의 두께로 증착하여 핵 생성 유도층을 형성하였다. 상기 핵 생성 유도층 위에 구리를 스퍼터링법으로 증착하여 약 300 nm의 전도층을 성장시켰다. Chromium was deposited to a thickness of about 4 nm on the glass substrate by sputtering to form a nucleation inducing layer. Copper was deposited on the nucleation inducing layer by sputtering to grow a conductive layer of about 300 nm.
이렇게 얻어진 전도성 박막의 면저항값을 측정한 결과 약 100 mΩ/cm2 의 수치를 얻었다.As a result of measuring the sheet resistance of the conductive thin film thus obtained, a numerical value of about 100 mPa / cm 2 was obtained.
실시예 3Example 3
유리 기재 위에 진공증착법으로 크롬을 약 4 nm 정도의 두께로 증착하여 핵 생성 유도층을 형성하였다. 상기 핵 생성 유도층 위에 알루미늄을 스퍼터링법으로 증착하여 약 150 nm의 전도층을 성장시켰다. Chromium was deposited to a thickness of about 4 nm on the glass substrate by vacuum deposition to form a nucleation inducing layer. Aluminum was deposited on the nucleation inducing layer by sputtering to grow a conductive layer of about 150 nm.
이렇게 얻어진 전도성 박막의 면저항값을 측정한 결과 약 350 mΩ/cm2 의 수치를 얻었다.As a result of measuring the sheet resistance of the obtained conductive thin film, the numerical value of about 350 mPa / cm <2> was obtained.
실시예 4Example 4
유리 기재 위에 스퍼터링법으로 티타늄을 약 4 nm 정도의 두께로 증착하여 핵 생성 유도층을 형성하였다. 상기 핵 생성 유도층 위에 구리를 진공증착법으로 증착하여 약 300 nm의 전도층을 성장시켰다. Titanium was deposited to a thickness of about 4 nm on the glass substrate by sputtering to form a nucleation inducing layer. Copper was deposited on the nucleation inducing layer by vacuum deposition to grow a conductive layer of about 300 nm.
이렇게 얻어진 전도성 박막의 면저항값을 측정한 결과 약 100 mΩ/cm2 의 수치를 얻었다.As a result of measuring the sheet resistance of the conductive thin film thus obtained, a numerical value of about 100 mPa / cm 2 was obtained.
비교예 1Comparative Example 1
유리 기재 위에 알루미늄을 진공증착법으로 증착하여 약 150 nm의 전도층을 성장시켰다. Aluminum was deposited on the glass substrate by vacuum deposition to grow a conductive layer of about 150 nm.
이렇게 얻어진 전도성 박막의 면저항값을 측정한 결과 약 450 mΩ/cm2 의 수치를 얻었다.As a result of measuring the sheet resistance of the obtained conductive thin film, the numerical value of about 450 mPa / cm <2> was obtained.
비교예 2Comparative Example 2
유리 기재 위에 구리를 스퍼터링법으로 증착하여 약 300 nm의 전도층을 성장시켰다. Copper was deposited on the glass substrate by sputtering to grow a conductive layer of about 300 nm.
이렇게 얻어진 전도성 박막의 면저항값을 측정한 결과 약 150 mΩ/cm2 의 수치를 얻었다.As a result of measuring the sheet resistance of the obtained conductive thin film, the numerical value of about 150 mPa / cm <2> was obtained.
비교예 3Comparative Example 3
유리 기재 위에 알루미늄을 스퍼터링법으로 증착하여 약 150 nm의 전도층을 성장시켰다. Aluminum was deposited on the glass substrate by sputtering to grow a conductive layer of about 150 nm.
이렇게 얻어진 전도성 박막의 면저항값을 측정한 결과 약 420 mΩ/cm2 의 수치를 얻었다.As a result of measuring the sheet resistance of the obtained conductive thin film, the numerical value of about 420 mPa / cm <2> was obtained.
비교예 4Comparative Example 4
유리 기재 위에 구리를 진공증착법으로 증착하여 약 150 nm의 전도층을 성장시켰다. Copper was deposited on the glass substrate by vacuum deposition to grow a conductive layer of about 150 nm.
이렇게 얻어진 전도성 박막의 면저항값을 측정한 결과 약 150 mΩ/cm2 의 수치를 얻었다.As a result of measuring the sheet resistance of the obtained conductive thin film, the numerical value of about 150 mPa / cm <2> was obtained.
표 1에 나타난 바와 같이, 전도층 구성 재료가 같더라도, 핵 생성 유도층을 통하여 성장된 전도성 박막의 저항값이 핵 생성 유도층없이 성장된 전도성 박막의 저항값 보다 매우 낮음을 알 수 있다.As shown in Table 1, even if the conductive layer constituent material is the same, it can be seen that the resistance value of the conductive thin film grown through the nucleation inducing layer is much lower than that of the conductive thin film grown without the nucleation inducing layer.
본 발명의 방법을 사용하면, 크기 및 형상이 균일한 그레인으로 치밀하게 구성되어 있으며, 그 내부의 홀 발생이 억제되어 불순물의 혼입양이 최소화된 박막을 얻을 수 있다. 그리하여, 본 발명의 방법은, 초진공 조건의 엄격한 유지, 기재의 가열 등과 같은 번거로운 단계를 거칠 필요없이 간단하고 용이하게 박막의 ρ2 와 ρ3 의 값을 감소시킬 수 있으므로 제조된 박막의 저항값을 효과적으로 개선한다.When the method of the present invention is used, a thin film is compactly composed of grains of uniform size and shape, and the generation of holes therein is suppressed to minimize the amount of impurities mixed therein. Thus, the method of the present invention can reduce the values of ρ 2 and ρ 3 of the thin film simply and easily without the need for troublesome steps such as strict maintenance of ultra-vacuum conditions, heating of the substrate, and the like. Improve effectively.
도 1은 그레인 성장을 위한 핵이 불균일하게 생성된 종래의 박막 형성 과정을 개략적으로 나타내는 도면이다.1 is a view schematically showing a conventional thin film formation process in which nuclei for grain growth are unevenly generated.
도 2는 핵 생성 유도층 없이 형성된 박막의 모식적인 단면 모습을 나타내는 도면이다.2 is a view showing a schematic cross-sectional view of a thin film formed without a nucleation induction layer.
도 3은 그레인 성장을 위한 핵이 균일하게 생성된 박막 형성 과정을 개략적으로 나타내는 도면이다.3 is a diagram schematically illustrating a thin film formation process in which nuclei for grain growth are uniformly generated.
도 4는 본 발명의 방법의 일구현예에 따라 형성된 박막의 모식적인 단면 모습을 나타내는 도면이다.4 is a view showing a schematic cross-sectional view of a thin film formed according to one embodiment of the method of the present invention.
도 5는 본 발명의 방법의 일구현예에 따라 형성된 박막의 표면 사진이다.5 is a photograph of the surface of a thin film formed according to one embodiment of the method of the present invention.
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| JPH0414821A (en) * | 1990-05-08 | 1992-01-20 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPH09115908A (en) * | 1995-09-27 | 1997-05-02 | Motorola Inc | Manufacture of cvd aluminum layer in semiconductor device |
| KR19980081270A (en) * | 1997-04-11 | 1998-11-25 | 조셉제이.스위니 | Integrated Cdd / pd Al Flattening Method and Apparatus Using Ultra-thin Nucleation Layer |
| US5981382A (en) * | 1998-03-13 | 1999-11-09 | Texas Instruments Incorporated | PVD deposition process for CVD aluminum liner processing |
| US6001420A (en) * | 1996-09-23 | 1999-12-14 | Applied Materials, Inc. | Semi-selective chemical vapor deposition |
| US6274241B1 (en) * | 1996-09-09 | 2001-08-14 | Robert Bosch Gmbh | Substrates seeded with precious metal salts, process for producing the same and their use |
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| JPH0414821A (en) * | 1990-05-08 | 1992-01-20 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPH09115908A (en) * | 1995-09-27 | 1997-05-02 | Motorola Inc | Manufacture of cvd aluminum layer in semiconductor device |
| US6274241B1 (en) * | 1996-09-09 | 2001-08-14 | Robert Bosch Gmbh | Substrates seeded with precious metal salts, process for producing the same and their use |
| US6001420A (en) * | 1996-09-23 | 1999-12-14 | Applied Materials, Inc. | Semi-selective chemical vapor deposition |
| KR19980081270A (en) * | 1997-04-11 | 1998-11-25 | 조셉제이.스위니 | Integrated Cdd / pd Al Flattening Method and Apparatus Using Ultra-thin Nucleation Layer |
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