KR100484896B1 - Method for preventing metal-corrosion in the metal-etch process - Google Patents

Method for preventing metal-corrosion in the metal-etch process Download PDF

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KR100484896B1
KR100484896B1 KR10-2002-0057004A KR20020057004A KR100484896B1 KR 100484896 B1 KR100484896 B1 KR 100484896B1 KR 20020057004 A KR20020057004 A KR 20020057004A KR 100484896 B1 KR100484896 B1 KR 100484896B1
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metal
corrosion
present
ions
photoresist layer
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KR10-2002-0057004A
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KR20040025163A (en
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김백원
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동부아남반도체 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32138—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only pre- or post-treatments, e.g. anti-corrosion processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • G03F7/427—Stripping or agents therefor using plasma means only

Abstract

본 발명은 반도체 소자 제조과정 중 전기적 연결을 위한 금속 라인 형성과정에서 에천트로 사용되는 CL- 이온과 챔버내 존재하는 H2O의 반응에 의해 생성되는 금속 부식 발생을 방지하는 방법에 관한 것이다. 즉, 본 발명은 금속 식각 공정 중 메인 에천트로 사용되는 Cl2 가스의 Cl-이온에 의해 생성되는 부식 발생을 방지시키기 위해 DI 워터 세정이나 Cl-이온을 F-이온으로 치환하는 등의 공정 추가 방법에 의한 종래 방식과는 달리, 포토레지스트를 제거하는 공정에서 H2O 가스 기반의 플라즈마에 의한 패시베이션 공정의 반복 수행을 통해 잔존 Cl-이온을 제거시킴으로써 금속 부식의 발생을 방지시키는 것이다. 이에 따라 본 발명에서는 포토레지스트 층을 제거한 후, 금속 부식 방지를 위한 추가 공정 없이도 부식방지 마진을 높일 수 있어 제품 생산시간을 감소시켜 원가를 절감시킬 수 있게 되며, 반도체 소자 디바이스의 신뢰성을 향상시킬 수 있는 이점이 있다.The present invention is a semiconductor device manufacturing process which CL Trojan etchant used in the metal line forming process for electrical connection of the - present invention relates to a method for preventing metal corrosion produced by the reaction of the ion with H 2 O present in the chamber. That is, the present invention is a method for adding a process such as DI water cleaning or replacing Cl - ions with F - ions to prevent corrosion generated by Cl - ions of Cl 2 gas used as the main etchant during the metal etching process. Unlike the conventional method, it is possible to prevent the occurrence of metal corrosion by removing residual Cl − ions through repeated passivation of the H 2 O gas-based plasma in the process of removing the photoresist. Accordingly, in the present invention, after removing the photoresist layer, it is possible to increase the anti-corrosion margin even without an additional process for preventing metal corrosion, thereby reducing the production time and reducing the cost, and improving the reliability of the semiconductor device device. There is an advantage to that.

Description

금속 식각 공정 시 금속 부식 방지 방법{METHOD FOR PREVENTING METAL-CORROSION IN THE METAL-ETCH PROCESS}METHOD FOR PREVENTING METAL-CORROSION IN THE METAL-ETCH PROCESS}

본 발명은 반도체 소자 제조 방법에 관한 것으로, 특히 반도체 소자 제조과정 중 전기적 연결을 위한 금속 라인(Metal line) 형성과정에서 에천트(Etchant)로 사용되는 CL- 이온과 챔버(Chamber)내 존재하는 H2O의 반응에 의해 생성되는 금속 부식 발생을 방지하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device. In particular, H in a chamber with CL - ions used as an etchant in the process of forming a metal line for electrical connection during a semiconductor device manufacturing process. A method of preventing the occurrence of metal corrosion produced by the reaction of 2 O.

통상적으로 반도체 소자 제조 공정에서는 반도체 소자의 제조가 완성될때까지 여러 가지의 공정을 수행하게 되며, 이중 특히 회로의 전기적 연결 역할을 수행하게 되는 금속 라인은 최근 들어 반도체 디바이스(Device)가 고집적화되고, 고속화됨에 따라 다층 구조 및 보다 미세한 선폭으로의 구현이 요구되고 있다.In general, in the semiconductor device manufacturing process, various processes are performed until the manufacture of the semiconductor device is completed. In particular, the metal line, which plays an electrical connection role of the circuit, has recently been highly integrated with a high speed semiconductor device. As a result, implementation of a multilayer structure and a finer line width is required.

도 1은 종래 금속 라인을 형성하기 위한 금속 식각 공정에서 발생하는 금속 부식 발생 방지를 위한 공정 수순도를 도시한 것으로, 상기 도 1에서 보여지는 바와 같이 종래 금속 부식 발생 방지 공정은 금속 식각 공정(100), PR 스트립(Photo-resist strip) 공정(102), 부식 방지 처리 공정(104) 및 클리닝(Cleaning) 공정(106)으로 이루어지며, 이때 상기 금속 식각 공정(100)에서는 일반적으로 메인 에천트로 금속 라인 물질로 사용되고 있는 알루미늄(AL)과의 반응성이 좋은 Cl2 가스를 사용하고 있다.1 is a view illustrating a process procedure for preventing metal corrosion from occurring in a metal etching process for forming a conventional metal line. As shown in FIG. 1, a conventional metal corrosion prevention process may include a metal etching process (100). ), PR strip (Photo-resist strip) process 102, anti-corrosion treatment process 104 and cleaning process (106), wherein the metal etching process (100) is generally a metal as the main etchant Cl 2 gas, which has good reactivity with aluminum (AL), is used as a line material.

그러나 상기 Cl2 가스의 Cl- 이온은 H2O와 만나면 쉽게 반응을 하는 성질을 가지고 있어, 식각 공정 후 포토레지스트 등 챔버내 잔류되어 있던 상기 Cl-이온이 H2O와 반응하는 경우 아래 [화학식 1]에서 보여지는 바와 같이 금속 부식을 발생시키게 된다.However Cl of the Cl 2 gas, the Cl ion is that it has the property of easy reaction when it meets the H 2 O, the residual photo resist, such as the chamber after the etching step-down if the ion reacts with H 2 O [Chemical Formula As shown in [1], metal corrosion occurs.

이때 상기와 같은 금속 부식 발생은 금속 라인에 심각한 손상을 발생시키게 되며, 심한 경우에는 금속 라인이 브로큰(broken) 되도록 하는 문제점이 있었으며, 이는 고집적화, 고속화되어지고 있는 반도체 제품의 수명 및 속도를 급격히 감소시켜 반도체 소자의 신뢰성을 떨어뜨리게 되는 문제점이 있었다.At this time, the occurrence of the metal corrosion causes serious damage to the metal line, and in severe cases, there is a problem that the metal line is broken, which dramatically reduces the lifespan and speed of the highly integrated and high-speed semiconductor products. There is a problem in that the reliability of the semiconductor device is reduced.

한편, 상기 금속 라인 형성시 금속 부식을 방지하기 위해 종래 여러 가지 방법들이 제안되어 있는데,Meanwhile, in order to prevent metal corrosion when forming the metal line, various conventional methods have been proposed.

먼저 가장 기본적으로 사용하고 있는 방법으로 금속 식각 후, 선택적 식각을 위해서 사용한 포토레지스트를 H2O가 포함되어 있는 대기중으로 노출시키기 전에 포토레지스트를 제거해주는 방법이 있다. 그러나 상기 방법은 실제로 식각 공정을 진행하는 동안 포토레지스트안에 금속 부식의 원인이 되는 Cl-이온이 많이 잔류되어 있기 때문에 포토레지스트 제거 방지와 금속 부식 발생 문제를 동시에 해결해야 하지만, 기존 방법에서는 포토레지스트 제거 방지 측면에서의 마진을 강조하고 있어서, 금속 부식 생성 방지에 대해서는 추가로 공정이 필요하게 되는 문제점이 있었다.Firstly, the most commonly used method is a method of etching a metal and then removing the photoresist before exposing the photoresist used for selective etching to the atmosphere containing H 2 O. However, since the Cl - ions, which cause metal corrosion, remain in the photoresist during the etching process, it is necessary to simultaneously prevent the photoresist removal and the problem of metal corrosion. Since the margin in terms of prevention is emphasized, there is a problem in that an additional process is required for preventing metal corrosion.

또한, 종래 금속 부식을 방지하기 위해 주로 사용되는 방법으로는 금속 식각과 포토레지스트 제거를 한 후에 DI 워터로 웨이퍼를 세정하는 방법과 Cl-이온을 HF처리하여 F-로 치환하는 방법 등이 있다. 그러나 전자의 방법에서는, 상기 DI 워터로 세정을 수행하는 방법은 오히려 DI 워터 사용으로 부식 발생을 더 촉진시키게 되는 문제점이 있으며, 후자의 방법에서 HF 처리는 장비 구입 및 공정 추가에 따른 원가 상승의 요인이 되는 문제점이 있었다.In addition, conventional methods for preventing metal corrosion include a method of cleaning a wafer with DI water after metal etching and photoresist removal, and a method of substituting F − by HF treatment of Cl − ions. However, in the former method, the method of performing cleaning with DI water has a problem of further promoting corrosion generation by using DI water. In the latter method, HF treatment is a factor of cost increase due to equipment purchase and process addition. There was a problem becoming.

따라서, 본 발명의 목적은 반도체 소자 제조과정 중 전기적 연결을 위한 금속 라인 형성과정에서 에천트로 사용되는 CL- 이온과 챔버내 존재하는 H2O의 반응에 의해 생성되는 금속 부식 발생을 방지하는 방법을 제공함에 있다.Accordingly, an object of the present invention is to provide a method for preventing metal corrosion caused by the reaction of CL - ions used as an etchant and H 2 O present in the chamber during the formation of a metal line for electrical connection during semiconductor device manufacturing. In providing.

상술한 목적을 달성하기 위한 본 발명은 금속 라인 형성 공정시 금속 부식 방지 방법에 있어서, (a)금속 라인 층 상부에 증착된 포토레지스트 층을 패터닝시키는 단계와; (b)상기 패터닝된 포토레지스트층을 마스크로하여 Cl2 가스에 기반한 플라즈마 이온으로 금속 라인을 식각시키는 단계와; (c)상기 마스크로 사용된 포토레지스트 층 O2 가스에 기반한 플라즈마 이온을 발생시켜 제거하는 단계와; (d)H2O 가스에 기반한 플라즈마 이온을 발생시켜 상기 금속 라인을 패시베이션시키는 단계;를 포함하는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a method for preventing metal corrosion in a metal line forming process, comprising: (a) patterning a photoresist layer deposited on a metal line layer; (b) etching the metal line with plasma ions based on Cl 2 gas using the patterned photoresist layer as a mask; (c) generating and removing plasma ions based on the photoresist layer O 2 gas used as the mask; (d) generating plasma ions based on the H 2 O gas to passivate the metal line.

이하, 첨부된 도면을 참조하여 본 발명에 따른 바람직한 실시 예의 동작을 상세하게 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the operation of the preferred embodiment according to the present invention.

도 2a 내지 도 2d는 본 발명의 실시 예에 따른 금속 라인 형성을 위한 금속 식각 공정에서 발생하는 금속 부식 발생 방지 공정 수순도를 도시한 것이다. 이하 상기 도 2a 내지 도 2d를 참조하여 본 발명의 금속 부식 발생 방지 공정을 상세히 설명한다.2A to 2D illustrate a process flowchart of preventing metal corrosion from occurring in a metal etching process for forming a metal line according to an embodiment of the present invention. Hereinafter, the metal corrosion generation prevention process of the present invention will be described in detail with reference to FIGS. 2A to 2D.

먼저 도 2a에서와 같이 금속 라인(202) 상부에 포토레지스트 층(204)을 증착시킨 후, 상기 포토레지스트 층(204)을 포토리소그래피(Photolithography) 공정 및 식각 공정을 통해 상기 도 2a에서 보여지는 바와 같이 원하는 모양으로 패터닝시킨다. First, as shown in FIG. 2A, the photoresist layer 204 is deposited on the metal line 202, and then the photoresist layer 204 is shown in FIG. 2A through a photolithography process and an etching process. Pattern it together to the desired shape.

이어 도 2b에서와 같이 상기 패터닝된 포토레지스트 층(204)을 마스크로 하여 금속 라인(202) 및 옥사이드 층(200)을 Cl2 가스에 기반한 플라즈마(Plasma) 이온으로 식각하여 원하는 금속 라인 프로파일(Profile)을 형성시킨다. 이때 상기 도 2b에서 보여지는 바와 같이 금속 식각이 진행된 뒤 포토레지스트 층(204) 제거전 금속 라인 측벽에 Cl-이온(206)이 잔존하게 되는 것을 알 수 있다.Subsequently, as shown in FIG. 2B, the metal line 202 and the oxide layer 200 are etched with plasma ions based on Cl 2 gas using the patterned photoresist layer 204 as a mask. ). In this case, as shown in FIG. 2B, the Cl − ions 206 remain on the metal line sidewalls after the metal etching is performed and before the photoresist layer 204 is removed.

이에 따라 본 발명에서는 도 2c에서와 같이 포토레지스트 층(204)을 O2 가스에 기반한 플라즈마 이온을 발생시켜 제거시킨 후, 남아있는 포토레지스트 층 잔존물과 상기 포토레지스트 층 제거 과정에서도 제거되지 않고 남아 금속 부식 발생의 원인이 되는 상기 Cl-이온 잔존물(206)에 대해, H2O 가스에 기반한 플라즈마 이온을 발생시켜 금속 라인을 패시베이션(Passivation)함으로써, 도 2d에서와 같이 포토레지스트 층과 Cl-이온 잔존물이 완전히 제거된 금속 라인(202) 프로파일을 얻을 수 있어 금속 부식을 방지할 수 있게 된다. 이때 상기 금속 라인 패시베이션 공정은 30초∼2분 정도의 긴 시간동안 포토레지스트 층을 제거하고, 금속 라인을 패시베이션하는 것이 아니라 10∼15초 정도의 짧은 시간 동안 제거하고, 패시베이션 하면서 두 스텝을 5∼10회 정도 반복하도록 한다.Accordingly, in the present invention, after removing the photoresist layer 204 by generating plasma ions based on O 2 gas, as shown in FIG. 2C, the remaining photoresist layer residue and the metal remaining without being removed in the photoresist layer removal process are removed. For the Cl − ion residue 206 that causes corrosion, the plasma lines based on the H 2 O gas are generated to passivate the metal line, thereby reducing the photoresist layer and Cl − ion residue as shown in FIG. 2D. This completely removed metal line 202 profile can be obtained to prevent metal corrosion. In this case, the metal line passivation process removes the photoresist layer for a long time of about 30 seconds to 2 minutes, removes the metal line for a short time of about 10 to 15 seconds, and does not passivate the metal line. Repeat 10 times.

이러한 반복적 패시베이션은 웨이퍼내 잔존하는 Cl-이온의 양을 줄여 부식 마진을 높일 수 있게 된다.This iterative passivation can increase the corrosion margin by reducing the amount of Cl - ions remaining in the wafer.

한편 상술한 본 발명의 설명에서는 구체적인 실시 예에 관해 설명하였으나, 여러 가지 변형이 본 발명의 범위에서 벗어나지 않고 실시될 수 있다. 따라서 발명의 범위는 설명된 실시 예에 의하여 정할 것이 아니고 특허청구범위에 의해 정하여져야 한다.Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications may be made without departing from the scope of the present invention. Therefore, the scope of the invention should be determined by the claims rather than by the described embodiments.

이상에서 설명한 바와 같이, 본 발명은 금속 식각 공정 중 메인 에천트로 사용되는 Cl2 가스의 Cl-이온에 의해 생성되는 금속 부식 발생을 방지시키기 위해 DI 워터 세정이나 Cl-이온을 F-이온으로 치환하는 등의 공정 추가 방법에 의한 종래 방식과는 달리, 포토레지스트를 제거하는 공정에서 H2O 가스 기반의 플라즈마에 의한 패시베이션 공정의 반복 수행을 통해 잔존 Cl-이온을 제거시킴으로써 금속 부식의 발생을 방지시키는 것이다. 이에 따라 본 발명에서는 포토레지스트 층을 제거한 후, 금속 부식 방지를 위한 추가 공정 없이도 부식 마진을 높일 수 있어 제품 생산시간을 감소시켜 원가를 절감시킬 수 있게 되며, 반도체 소자 디바이스의 신뢰성을 향상시킬 수 있는 이점이 있다.As described above, the present invention is to replace the DI water cleaning or Cl - ions with F - ions in order to prevent the occurrence of metal corrosion generated by Cl - ions of Cl 2 gas used as the main etchant during the metal etching process Unlike the conventional method by a method of adding a process such as the above, in the process of removing the photoresist, it is possible to prevent the occurrence of metal corrosion by removing the remaining Cl − ions through the repeated passivation of the H 2 O gas-based plasma. will be. Accordingly, in the present invention, after removing the photoresist layer, it is possible to increase the corrosion margin even without an additional process for preventing metal corrosion, thereby reducing the cost of production time and improving the reliability of the semiconductor device device. There is an advantage.

도 1은 종래 금속 부식 방지 공정 수순을 나타낸 흐름도,1 is a flow chart showing a conventional metal corrosion prevention process procedure,

도 2a 내지 도 2d는 본 발명의 실시 예에 따른 금속 부식 방지 공정 수순도. 2a to 2d is a metal corrosion prevention process according to an embodiment of the present invention.

Claims (4)

금속 식각 공정시 금속 부식 방지 방법에 있어서,In the metal etching process in the metal etching process, (a)금속 라인 층 상부에 증착된 포토레지스트 층을 패터닝시키는 단계와;(a) patterning a photoresist layer deposited over the metal line layer; (b)상기 패터닝된 포토레지스트층을 마스크로하여 Cl2 가스에 기반한 플라즈마 이온으로 금속 라인을 식각시키는 단계와;(b) etching the metal line with plasma ions based on Cl 2 gas using the patterned photoresist layer as a mask; (c)상기 마스크로 사용된 포토레지스트 층을 O2 가스에 기반한 플라즈마 이온을 발생시켜 제거하는 단계와;(c) generating and removing plasma ions based on O 2 gas from the photoresist layer used as the mask; (d)H2O 가스에 기반한 플라즈마 이온을 발생시켜 상기 금속 라인을 패시베이션시켜 상기 포토레지스트 층 잔존물과 상기 메탈 라인 식각시 발생하는 Cl­이온 잔존물을 제거시키는 단계;를 포함하는 것을 특징으로 하는 금속 부식 방지 방법.(d) generating plasma ions based on H 2 O gas to passivate the metal line to remove the photoresist layer residue and Cl ion residue generated during the metal line etching; Prevention method. 제1항에 있어서,The method of claim 1, 상기 (d)단계 수행 후, 상기 (c)∼(d)단계를 미리 설정된 기준시간 단위로 5∼10회 반복 수행하는 것을 특징으로 금속 부식 방지 방법.After the step (d), the step (c) to (d) is characterized in that the metal corrosion prevention method is repeated 5 to 10 times by a predetermined reference time unit. 제2항에 있어서,The method of claim 2, 상기 기준시간은, 10∼15초로 설정되는 것을 특징으로 하는 금속 부식 방지 방법. The reference time is set to 10 to 15 seconds metal corrosion prevention method. 삭제delete
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JPH10189550A (en) * 1996-11-01 1998-07-21 Fujitsu Ltd Manufacture of semiconductor device
KR100241529B1 (en) * 1996-12-12 2000-02-01 김영환 Corrosion resistance method for semiconductor's metal wiring using plasma

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JPH0383337A (en) * 1989-08-28 1991-04-09 Hitachi Ltd Post processing method
JPH10189550A (en) * 1996-11-01 1998-07-21 Fujitsu Ltd Manufacture of semiconductor device
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