KR100353592B1 - Semiconductor ceramic - Google Patents
Semiconductor ceramic Download PDFInfo
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- KR100353592B1 KR100353592B1 KR1020000002816A KR20000002816A KR100353592B1 KR 100353592 B1 KR100353592 B1 KR 100353592B1 KR 1020000002816 A KR1020000002816 A KR 1020000002816A KR 20000002816 A KR20000002816 A KR 20000002816A KR 100353592 B1 KR100353592 B1 KR 100353592B1
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F21—LIGHTING
- F21V—FUNCTIONAL FEATURES OR DETAILS OF LIGHTING DEVICES OR SYSTEMS THEREOF; STRUCTURAL COMBINATIONS OF LIGHTING DEVICES WITH OTHER ARTICLES, NOT OTHERWISE PROVIDED FOR
- F21V19/00—Fastening of light sources or lamp holders
- F21V19/0075—Fastening of light sources or lamp holders of tubular light sources, e.g. ring-shaped fluorescent light sources
- F21V19/008—Fastening of light sources or lamp holders of tubular light sources, e.g. ring-shaped fluorescent light sources of straight tubular light sources, e.g. straight fluorescent tubes, soffit lamps
- F21V19/0085—Fastening of light sources or lamp holders of tubular light sources, e.g. ring-shaped fluorescent light sources of straight tubular light sources, e.g. straight fluorescent tubes, soffit lamps at least one conductive element acting as a support means, e.g. resilient contact blades, piston-like contact
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F21—LIGHTING
- F21V—FUNCTIONAL FEATURES OR DETAILS OF LIGHTING DEVICES OR SYSTEMS THEREOF; STRUCTURAL COMBINATIONS OF LIGHTING DEVICES WITH OTHER ARTICLES, NOT OTHERWISE PROVIDED FOR
- F21V23/00—Arrangement of electric circuit elements in or on lighting devices
- F21V23/06—Arrangement of electric circuit elements in or on lighting devices the elements being coupling devices, e.g. connectors
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Abstract
Description
본 발명은 티탄산바륨계의 반도체 자기 및 그 제조 방법에 관한 것이다.The present invention relates to a barium titanate-based semiconductor porcelain and a method of manufacturing the same.
정(正)의 저항 온도 특성을 갖는 티탄산바륨계의 반도체 자기(이하, 반도체 자기라 함)는, 퀴리점(curie point) 이상에서 저항값이 급격히 증가하는 특성을 가지고 있으며, 모터 기동용, 컬러텔레비전 수상기의 브라운관의 소자(消磁)용, 히터용, 및 그 외의 용도에 폭넓게 사용되고 있다.The barium titanate-based semiconductor porcelain (hereinafter referred to as semiconductor porcelain) having a positive resistance temperature characteristic has a characteristic in which the resistance value rapidly increases above the Curie point. It is widely used for the element of a CRT of a television receiver, a heater, and other uses.
그런데, 이러한 종류의 반도체 자기에 관해서는, 전압 인가시의 돌입 전류에대한 파괴 특성(이하, 돌입 내전압 특성이라 함) 이상의 돌입 전류가 흐르면 층형상으로 파괴된다는 문제가 발생하고 있다.By the way, with respect to this kind of semiconductor magnetism, there arises a problem that when an inrush current flowing beyond the breakdown characteristic (hereinafter referred to as the breakdown voltage characteristic) with respect to the inrush current at the time of voltage application flows, it breaks in a layer shape.
이와 같은 현상이 생기는 것은, 반도체 자기의 외측 부분은 외기에 접촉하고 있기 때문에 열확산이 빠르고 그 부분의 온도가 낮아져서 저저항이 되는 반면, 한편 반도체 자기의 내측 부분은 외측 부분에 비하여 열확산이 느려서 고저항이 됨에 따라, 반도체 자기가 불균일하게 발열하기 때문이다.This phenomenon occurs because the outer portion of the semiconductor magnet is in contact with the outside air, so that the thermal diffusion is faster and the temperature of the portion is lowered, thereby lowering the resistance. On the other hand, the inner portion of the semiconductor magnet is slower than the outer portion and has high resistance. This is because the semiconductor magnetism generates heat unevenly.
그러므로, 이와 같은 자기 파괴를 일으키지 않는 반도체 자기의 제조 방법으로서, 일본국 특허공개 평4-154661호 공보에 기재되어 있는 바와 같이, 공기중에서 소성한 후, 환원 처리하고 대기중에서 재산화 처리하는 방법이 제안되어 있다.Therefore, as a method of manufacturing a semiconductor porcelain that does not cause such self-destruction, a method of calcining in air, followed by reduction and reoxidation in the air, as described in JP-A-4-154661 It is proposed.
그러나, 반도체 자기를 환원 처리 및 재산화 처리하는 방법에서는, 재산화 처리가 불충분하면 내전압이 낮고, 재산화 처리가 진행되면 실온에서의 비저항이 높아진다고 하는 문제가 있었다.However, in the method of reducing and reoxidizing semiconductor porcelain, there is a problem that the withstand voltage is low when the reoxidation treatment is insufficient, and the specific resistance at room temperature becomes high when the reoxidation treatment is performed.
본 발명의 목적은, 돌입 내전압 특성이 우수하고, 자기 파괴가 일어나기 어려운 반도체 자기 및 그 제조 방법을 제공하는 것에 있다.An object of the present invention is to provide a semiconductor porcelain excellent in inrush breakdown voltage characteristics and less likely to cause magnetic breakdown, and a method of manufacturing the same.
제 1도는 본 발명의 반도체 자기에 의해 얻어지는 정특성 서미스터의 일측의 주면에서 타측의 주면으로 단위두께당의 저항값의 변화를 모식적으로 나타낸 도면이다.FIG. 1 is a diagram schematically showing a change in resistance value per unit thickness from the main surface on one side to the main surface on the other side of the static thermistor obtained by the semiconductor magnetism of the present invention.
제 2도는 본 발명의 반도체 자기의 저항값비와 돌입 내전압 특성의 관계에 관하여 나타낸 도면이다.2 is a diagram showing the relation between the resistance value ratio and the inrush withstand voltage characteristic of the semiconductor magnet of the present invention.
제 3도는 본 발명의 반도체 자기의 강온과정의 온도와 돌입 내전압 특성의 관계에 관하여 나타낸 도면이다.3 is a diagram showing the relationship between the temperature and the inrush withstand voltage characteristics of the temperature-falling process of the semiconductor porcelain of the present invention.
본 발명은, 정(正) 저항 온도 특성을 갖는 티탄산 바륨계의 반도체 자기에 있어서, 반도체 자기의 표면부와 중심부 사이의 저항값이 반도체 자기의 표면부 또는 중심부의 저항값보다도 높은 반도체 자기이다.The present invention is a barium titanate-based semiconductor magnet having a positive resistance temperature characteristic, wherein the resistance value between the surface part and the center part of the semiconductor magnet is higher than the resistance value of the surface part or the center part of the semiconductor magnet.
또한, 본 발명은, 반도체 자기의 표면부와 중심부 사이의 저항값이 표면부 또는 중심부의 저항값보다도 15∼68% 높은 반도체 자기이다.In the present invention, the resistance value between the surface portion and the center portion of the semiconductor porcelain is 15 to 68% higher than that of the surface portion or the center portion.
또한, 본 발명은, 반도체 자기가, 산화납, 산화스트론튬, 산화칼슘을 포함하는 티탄산바륨계의 반도체 자기이다.In addition, the present invention is a barium titanate-based semiconductor porcelain in which the semiconductor porcelain contains lead oxide, strontium oxide, and calcium oxide.
또한, 본 발명은 정(正) 저항 온도 특성을 갖는 티탄산바륨계의 반도체 자기를 소성하는 공정에 있어서, 최고 소성 온도 도달후의 강온 과정에서, 1100∼1200℃ 사이에서 0.4∼10시간 유지하는 반도체 자기의 제조 방법이다.In the present invention, in the step of firing a barium titanate-based semiconductor porcelain having a positive resistance temperature characteristic, the semiconductor porcelain is maintained for 0.4 to 10 hours at 1100 to 1200 占 폚 in a temperature-falling process after reaching the highest firing temperature. It is a manufacturing method.
또한, 본 발명은, 정(正) 저항 온도 특성을 갖는 티탄산바륨계의 반도체 자기를 소성하는 공정에 있어서, 최고 소성 온도 도달후의 강온 과정에서 1100∼1200℃ 사이에서 강온 속도를 1.0℃／분 이하로 서냉(徐冷)하는 반도체 자기의 제조 방법이다.In the present invention, in the step of firing a barium titanate-based semiconductor porcelain having a positive resistance temperature characteristic, the temperature-fall rate is 1.0 ° C / min or less in the temperature-falling process after reaching the highest firing temperature. It is a method of manufacturing a semiconductor porcelain, which is slowly cooled.
본 발명의 반도체 자기에 의하면, 두께방향에 있어서 저항값의 분포를 상이하게 함으로써, 돌입 파괴 전압 특성의 향상을 도모할 수 있다.According to the semiconductor magnetism of the present invention, the inrush breakdown voltage characteristic can be improved by varying the distribution of the resistance values in the thickness direction.
본 발명의 반도체 자기의 제조 방법에 의하면, 강온 과정에서 서냉 혹은 유지함으로써 반도체 자기의 두께 방향에 있어서 저항값의 분포를 상이하게 할 수 있으며, 그 결과 돌입 내전압 특성의 향상을 도모할 수 있다.According to the method of manufacturing a semiconductor porcelain of the present invention, by slow cooling or holding in a temperature lowering process, the distribution of resistance values can be made different in the thickness direction of the semiconductor porcelain, and as a result, the inrush withstand voltage characteristics can be improved.
먼저, (Ba0.536Pb0.08Sr0.20Ca0.18Er0.004)TiO3＋0.0004Mn＋0.02SiO2의 조성이 되도록, BaCO3, SrCO3,Pb3O4, CaCO3, TiO2, Er2O3, MnCO3및 SiO2를 칭량하였다. 이들을 순수 및 지르코니아 볼과 함께 폴리에틸렌제 포트에 넣어, 5시간 분쇄 혼합한 후,탈수, 건조하고, 1150℃에서 2시간 가소(假燒)하여 가소분을 얻었다. 이 가소분을 순수 및 지르코니아 볼과 함께 폴리에틸렌제 포트에 넣어 5시간 분쇄하였다. 그 후, 그것에 초산비닐계의 바인더를 혼합하여 조립(造粒)하였다.First, BaCO 3 , SrCO 3 , Pb 3 O 4 , CaCO 3 , TiO 2 , Er 2 O 3 , MnCO to have a composition of (Ba 0.536 Pb 0.08 Sr 0.20 Ca 0.18 Er 0.004 ) TiO 3 + 0.0004Mn + 0.02SiO 2 3 and SiO 2 were weighed. These were put into a pot made of polyethylene together with pure water and zirconia balls, ground and mixed for 5 hours, dehydrated and dried, and calcined at 1150 ° C for 2 hours to obtain a calcined powder. This calcined powder was put together with pure water and zirconia balls into a polyethylene pot and ground for 5 hours. Thereafter, a vinyl acetate-based binder was mixed and granulated therein.
이어서, 건식 프레스로 직경 18mm, 두께 3.6mm의 성형체를 제작하고, 1360℃에서 1시간 소성하고, 표 1에 나타낸 조건에 의해 냉각하고, 반도체 자기를 얻었다. 얻어진 반도체 자기의 양면에 단자 전극이 되는 옴성을 나타내는 니켈층을 무전해도금에 의하여 형성하고, 가장 외측에 은페이스트를 도포하여 600℃에서 30분간 베이킹하고, 정특성 서미스터를 얻었다.Subsequently, a molded product having a diameter of 18 mm and a thickness of 3.6 mm was produced by a dry press, fired at 1360 ° C. for 1 hour, cooled under the conditions shown in Table 1 to obtain a semiconductor porcelain. Nickel layers showing ohmicity as terminal electrodes were formed on both surfaces of the obtained semiconductor porcelain by electroless plating, silver paste was applied on the outermost side, and baked at 600 ° C. for 30 minutes to obtain a static thermistor.
표 1에 나타낸 냉각 조건은 최고 소성 온도로부터 실온까지 냉각하는 조건을 나타내고 있으며, 시료 번호 1∼26은, 최고 소성 온도로부터 유지 온도까지 강온 속도의 비율로 냉각하고, 유지 온도에서 유지 시간동안 유지 온도를 유지하고, 유지 온도에서부터 실온까지 냉각한다.The cooling conditions shown in Table 1 represent conditions for cooling from the highest firing temperature to room temperature, and Sample Nos. 1 to 26 are cooled at a rate of temperature-fall rate from the highest firing temperature to the holding temperature, and the holding temperature for the holding time at the holding temperature. And cool down from room temperature to room temperature.
또, 시료 번호 27∼30은, 최고 소성 온도로부터 1200℃까지 강온 속도로 냉각하고, 1200∼1100℃의 사이에서 서냉 속도의 비율로 냉각하고, 1100℃에서부터 실온까지 냉각한다.Moreover, sample numbers 27-30 are cooled by the temperature-fall rate from the highest baking temperature to 1200 degreeC, are cooled by the ratio of slow cooling rate between 1200-1100 degreeC, and are cooled from 1100 degreeC to room temperature.
또한, 시료 번호 31, 32는 최고 소성 온도로부터 실온까지 강온 속도를 일정하게하여 냉각한다.In addition, sample numbers 31 and 32 are cooled by making constant the temperature-fall rate from the highest baking temperature to room temperature.
이 정특성 서미스터를 사용하여, 비저항, 단위 두께당의 저항값, 돌입 내전압 특성 및 저항값비를 측정하였다. 여기서, 돌입 내전압 특성이란, 하기에 나타내는 식으로부터 얻어지는 값이며, 저항값비란, 정특성 서미스터의 표면부와 중심부 사이에서 최대가 되는 저항값(최대 저항값)와 정특성 서미스터의 중심부의 최소가 되는 저항값(최소 저항값)의 비로부터 얻어지는 값이다.Using this static thermistor, specific resistance, resistance value per unit thickness, inrush withstand voltage characteristic, and resistance value ratio were measured. Here, the inrush withstand voltage characteristic is a value obtained from the equation shown below, and the resistance value ratio is the minimum of the resistance value (maximum resistance value) that is maximum between the surface portion and the center portion of the static characteristic thermistor and the center of the static characteristic thermistor. It is a value obtained from the ratio of a resistance value (minimum resistance value).
돌입 내전압 특성 ＝ (파괴 전압)2／ 상온 저항값Inrush Withstand Voltage = (breakdown voltage) 2 / Resistance value at room temperature
상기의 측정 결과를 표 2에 나타낸다. ＊표시가 있는 것은, 본 발명의 청구범위 외의 것이며, ＊표시가 없는 것은, 본 발명의 범위내의 것이다.Table 2 shows the above measurement results. The fact that there is a * mark is outside the claims of the present invention, and the thing without a * mark is within the scope of the present invention.
제 1 도는, 본 발명의 정특성 서미스터의 일측의 주면에서 타측의 주면으로 단위 두께당의 저항값의 변화를 모식적으로 나타낸 것이다. 제 1 도에서 알 수 있듯이, 중심부와 양 표면부의 저항값이 낮고, 중심부와 표면부 사이에서 저항값이 높은 정특성 서미스터인 것을 알 수 있다.FIG. 1 schematically shows the change in resistance value per unit thickness from the main surface on one side to the main surface on the other side of the static characteristic thermistor of the present invention. As can be seen from FIG. 1, it can be seen that the resistance the central portion and the both surface portions have a low resistance value, and the resistance value is high between the central portion and the surface portion.
또, 제 2 도는, 저항값비와 돌입 내전압 특성의 관계에 관하여 나타낸 것이다. 제 2 도에서, 표면부와 중심부 사이의 저항값이 중심부의 저항값보다 15∼68% 높은 영역(저항값비 ＝ 1.15에서 1.68)을 갖는 반도체 자기에 관하여 돌입 내전압 특성이 우수하다는 결과를 나타내고 있다.2 shows the relationship between the resistance value ratio and the inrush withstand voltage characteristic. 2 shows that the inrush withstand voltage characteristics are excellent for semiconductor magnetism having a region (resistance value ratio = 1.15 to 1.68) in which the resistance value between the surface portion and the center portion is 15 to 68% higher than the resistance value at the center portion.
또한, 제 3 도는, 강온 과정에서의 유지 온도와 돌입 내저항 특성의 관계에 관하여 나타낸 것이다. 제 3 도에서, 강온 과정의 유지 온도 1100∼1200℃의 영역에서 돌입 내전압 특성이 양호하다. 또, 상술한 온도 범위에 있어서 서냉하더라도 돌입 내전압 특성이 우수한 것이 얻어지고 있다.3 shows the relationship between the holding temperature and the inrush resistance characteristics in the temperature lowering process. In FIG. 3, the inrush breakdown voltage characteristic is good in the range of the holding temperature of 1100-1200 degreeC of a temperature-fall process. Moreover, the thing excellent in the inrush voltage characteristic is obtained even if it cools slowly in the above-mentioned temperature range.
본 발명의 반도체 자기는, 단위 두께당의 저항값 분포를 상이한 것으로 함으로써, 돌입 내저항 특성이 우수하며, 높은 전압에 대해서도 파괴되지 않는다는 효과를 발휘한다.The semiconductor porcelain of the present invention exhibits an excellent inrush resistance characteristic and does not break down even at a high voltage by making the resistance distribution per unit thickness different.
또, 본 발명의 반도체 자기는, 반도체 자기의 표면부와 중심부 사이의 저항값이 표면부 또는 중심부의 저항값보다도 15∼68% 높기 때문에, 높은 전압에 대하여 자기 파괴가 발생하지 않으며, 회로의 과전류 보호의 용도에 적합하다.In the semiconductor magnetism of the present invention, since the resistance value between the surface portion and the center portion of the semiconductor magnetism is 15 to 68% higher than the resistance value of the surface portion or the center portion, magnetic destruction does not occur with a high voltage, and the circuit overcurrent Suitable for the use of protection.
또한, 본 발명의 반도체 자기는, 산화납, 산화스트론튬, 산화칼슘을 포함하는 티탄산바륨계의 반도체 자기로 이루어지기 때문에, 반도체 자기의 표면부와 중심부 사이의 저항값이 표면부 또는 중심부의 저항값보다도 15∼68% 높아진다는 효과를 보다 현저하게 할 수 있으며, 종래의 반도체 자기에 비해 상대적으로 높은 전압에 대해서도 자기 파괴가 발생하지 않으며, 회로의 과전류 보호용이나 소자용 등에 폭넓게 이용할 수 있다.In addition, since the semiconductor magnet of the present invention is made of a barium titanate-based semiconductor magnet including lead oxide, strontium oxide, and calcium oxide, the resistance value between the surface part and the center part of the semiconductor magnet is the resistance value of the surface part or the center part. The effect of being 15 to 68% higher than that can be made more remarkable, and magnetic destruction does not occur even at a voltage that is relatively higher than that of a conventional semiconductor magnet, and it can be widely used for overcurrent protection of a circuit or element.
본 발명의 반도체 자기의 제조 방법에 의하면, 강온 과정에서 서냉 혹은 유지하여, 반도체 자기의 단위 두께당의 저항값 분포를 상이한 것으로 함으로써, 높은 전압을 인가하더라도 자기 파괴가 일어나기 어려우며, 돌입 내전압 특성이 우수한 반도체 자기를 얻을 수 있다.According to the method of manufacturing a semiconductor porcelain of the present invention, by slow cooling or maintaining in a temperature-falling process to make the resistance value distribution per unit thickness of the semiconductor porcelain different, magnetic breakdown is unlikely to occur even when a high voltage is applied, and the semiconductor has excellent inrush voltage characteristics. You can get yourself.
Claims (2)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15791995A JP3198876B2 (en) | 1995-06-23 | 1995-06-23 | Semiconductor porcelain, manufacturing method thereof, and positive temperature coefficient thermistor |
| JP7-157919 | 1995-06-23 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019960022930A Division KR100341082B1 (en) | 1995-06-23 | 1996-06-21 | Semiconductor ceramics and method for producing same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR100353592B1 true KR100353592B1 (en) | 2002-09-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019960022930A KR100341082B1 (en) | 1995-06-23 | 1996-06-21 | Semiconductor ceramics and method for producing same |
| KR1020000002816A KR100353592B1 (en) | 1995-06-23 | 2000-01-21 | Semiconductor ceramic |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019960022930A KR100341082B1 (en) | 1995-06-23 | 1996-06-21 | Semiconductor ceramics and method for producing same |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP3198876B2 (en) |
| KR (2) | KR100341082B1 (en) |
| CN (1) | CN1065219C (en) |
| TW (1) | TW316985B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102145275B (en) * | 2011-01-19 | 2013-09-11 | 颜建平 | Tubular polymer reactor |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04154661A (en) * | 1990-10-17 | 1992-05-27 | Murata Mfg Co Ltd | Semiconductor porcelain and its production |
| JPH07142207A (en) * | 1993-11-16 | 1995-06-02 | Teika Corp | Barium titanate semiconductor ceramic and its manufacture |
-
1995
- 1995-06-23 JP JP15791995A patent/JP3198876B2/en not_active Expired - Lifetime
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1996
- 1996-05-16 TW TW085105783A patent/TW316985B/zh not_active IP Right Cessation
- 1996-06-21 KR KR1019960022930A patent/KR100341082B1/en not_active IP Right Cessation
- 1996-06-22 CN CN96106935A patent/CN1065219C/en not_active Expired - Lifetime
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- 2000-01-21 KR KR1020000002816A patent/KR100353592B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR970003722A (en) | 1997-01-28 |
| JPH0912355A (en) | 1997-01-14 |
| JP3198876B2 (en) | 2001-08-13 |
| CN1142476A (en) | 1997-02-12 |
| KR100341082B1 (en) | 2002-09-18 |
| TW316985B (en) | 1997-10-01 |
| CN1065219C (en) | 2001-05-02 |
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