KR100320933B1 - Chip inductor and method for manufacturing the same - Google Patents

Chip inductor and method for manufacturing the same Download PDF

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KR100320933B1
KR100320933B1 KR1019970066916A KR19970066916A KR100320933B1 KR 100320933 B1 KR100320933 B1 KR 100320933B1 KR 1019970066916 A KR1019970066916 A KR 1019970066916A KR 19970066916 A KR19970066916 A KR 19970066916A KR 100320933 B1 KR100320933 B1 KR 100320933B1
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magnetic layer
added
electrode
magnetic material
sintering accelerator
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KR19990048272A (en
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조성원
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이형도
삼성전기주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F17/0013—Printed inductances with stacked layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/28—Coils; Windings; Conductive connections
    • H01F27/2804—Printed windings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/28—Coils; Windings; Conductive connections
    • H01F27/29—Terminals; Tapping arrangements for signal inductances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/28—Coils; Windings; Conductive connections
    • H01F27/2804—Printed windings
    • H01F2027/2809—Printed windings on stacked layers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

PURPOSE: A chip inductor and a method for manufacturing the same are provided to improve a sintering feature and a permeability by forming a magnetic material having no sintered accelerating agent at an inside and forming a magnetic material having a sintered accelerating agent. CONSTITUTION: 10 casting sheets are soldered to form a base sheet(110). A magnetic material is coated on the base sheet(110) to form the first external magnetic material layer(111a). A magnetic material having no accelerating agent is coated at an inside of the first external magnetic material layer(111a) to form the first internal magnetic material layer(112a). A metal is printed on the first internal magnetic material layer(112a) to form an electrode(115). A magnetic material having the accelerating agent is coated on the first external magnetic material layer(111a) to form the second external magnetic material layer(111b). A magnetic material having no accelerating agent is coated at the first area of the first internal magnetic material layer(112a) to form the second internal magnetic material layer(112b) and the electrode(115) is printed.

Description

칩인덕터 및 제조방법Chip Inductor and Manufacturing Method

본 발명은 칩인덕터에 관한 것으로, 특히 전극이 형성되는 내부는 소결촉진제가 첨가되지 않은 자성체로 형성하고 외부는 소결촉진제가 첨가된 자성체로 형성하여 소결성이 향상됨과 동시에 투자율이 향상된 칩인덕터 및 그 제조방법에 관한 것이다.The present invention relates to a chip inductor. In particular, the inside of the electrode is formed of a magnetic body without addition of the sintering accelerator and the outside is formed of a magnetic body to which the sintering accelerator is added, thereby improving the sintering property and improving the permeability. It is about a method.

최근에 전자 및 통신기기의 발달과 더불어 환경 및 통신장애 등의 문제가 발생하고 있다. 이에 따라 무선통신 기기 및 멀티미디어 환경 등으로 인하여 악화된 전자기적 환경에 관한 각국의 전자기 장애규제가 강화되고 있는 추세이다. 이런 추세에 따라 근래 전자파 장애 제거소자에 대한 개발이 요구되고, 그 부품수요의 급증과 함께 기능의 복잡화, 고집적화 및 고효율화 측면으로 기술이 발전되고 있다. 이 가운데, 적층형 칩인덕터는 고주파 노이즈를 제거하는 필터로 개인용 컴퓨터, 전화기 및 통신장치에 주로 사용된다.Recently, with the development of electronic and communication devices, problems such as environmental and communication failures occur. Accordingly, the regulation of electromagnetic disturbances in each country regarding the electromagnetic environment worsened by the wireless communication device and the multimedia environment is being strengthened. In accordance with this trend, the development of the electromagnetic interference elimination device is required in recent years, and the technology is being developed in terms of complexity, high integration and high efficiency with the rapid increase in the demand for components. Among them, stacked chip inductors are mainly used in personal computers, telephones, and communication devices as filters for removing high frequency noise.

도 1은 종래 칩인덕터의 간략단면도이다. 도면에 나타낸 바와 같이, 자성체(1) 내부에는 복수의 권선을 가진 전극(2)이 형성되어 있고, 그 위부에는 전극(2)을 외부회로와 연결시키는 외부단자(3)가 형성되어 있다. 도면에는 자성체가 벌크(bulk)형태로 도시되어 있지만, 실제의 칩인덕터에서는 약 40∼50μm의 두께를 가진 복수의 자성체층이 형성된다. 또한, Ag와 같은 금속으로 이루어진 전극 역시 자성체층 위에 인쇄되며, 상하층의 자성체층의 전극과 연결되어 나선형의 전극을 이룬다. 도면에는 도시하지 않았지만, 상하의 자성체층에 형성된 전극을 연결하는 방법은 자성체층에 홀(hole)을 형성한 후 자석의 인쇄시 상기한 홀까지 금속으로 인쇄하여 연결하거나 자성체층 위에 자석을 형성하고 자석의 일부만을 남기고 자성체를 다시 적층한 후 하부층의 전극의 일부를 이어주는 형태로 전극을 회전방향으로 인쇄하여 연결한다.1 is a simplified cross-sectional view of a conventional chip inductor. As shown in the figure, an electrode 2 having a plurality of windings is formed inside the magnetic body 1, and an external terminal 3 connecting the electrode 2 to an external circuit is formed thereon. Although the magnetic material is shown in the form of a bulk in the figure, in the actual chip inductor, a plurality of magnetic material layers having a thickness of about 40-50 μm are formed. In addition, an electrode made of a metal such as Ag is also printed on the magnetic layer, and is connected to the electrodes of the magnetic layer of the upper and lower layers to form a spiral electrode. Although not shown in the drawing, a method of connecting the electrodes formed on the upper and lower magnetic layers may include forming holes in the magnetic layers and then printing and connecting the metal to the above-mentioned holes when printing the magnets, or forming magnets on the magnetic layers and The magnetic material is stacked again, leaving only a part of the electrode, and the electrode is printed in the rotational direction to connect a part of the electrode of the lower layer to be connected.

Ni-Zn-Cu계 페라이트(ferrite)로 이루어진 자성체를 소성할 때, Ag가 전극으로 주로 사용되기 때문에 소성온도는 약 960℃ 이하가 되어야만 한다. 그러나, 이 정도의 온도에서는 자성체가 원할하게 소결되지 않아 칩인덕터의 소결밀도가 저하된다. 소결밀도가 저하되면, 칩인덕터의 치밀화가 어려워지기 때문에 Ag의 석출이 발생하며 그 결과 도금불량이 발생하게 된다. 따라서, 상기한 소결밀도의 저하를 방지하기 위해, 자성체에 소결촉진제를 첨가하여 칩인덕터를 소성하는데, 상기한 소결촉진제는 투자율을 저하시켜 전기적 특성이 저하되는 문제가 있었다.When firing a magnetic body made of Ni-Zn-Cu ferrite, since the Ag is mainly used as an electrode, the firing temperature should be about 960 ° C or less. However, at this temperature, the magnetic body does not sinter smoothly, and the sintering density of the chip inductor decreases. When the sintered density decreases, densification of the chip inductor becomes difficult, and therefore, precipitation of Ag occurs, resulting in poor plating. Therefore, in order to prevent the reduction of the sintering density, the sintering accelerator is added to the magnetic body to fire the chip inductor. However, the sintering accelerator has a problem of lowering the permeability and lowering the electrical characteristics.

본 발명은 상기한 문제를 해결하기 위해 제안된 것으로, 전극이 형성되는 내부자성체층을 소결촉진제가 첨가되지 않은 자성체로 형성하고 상기한 내부자성체를 둘러싸는 외부자성체층을 소결촉진제가 첨가된 자성체로 형성하여 전기적특성이 향상되고 도금불량이 발생하지 않은 칩인덕터 및 그 제조방법을 제공하는 것을 목적으로 한다.The present invention has been proposed to solve the above-mentioned problem, and the internal magnetic layer in which the electrode is formed is formed of a magnetic material without addition of the sintering accelerator, and the outer magnetic layer surrounding the internal magnetic material is added to the magnetic material to which the sintering accelerator is added. It is an object of the present invention to provide a chip inductor, and a method of manufacturing the same, which are formed to improve electrical characteristics and do not cause plating defects.

상기한 목적을 달성하기 위해, 본 발명의 칩인덕터는 소결촉진제가 첨가된 자성체로 이루어진 복수의 캐스팅시트가 합착된 베이스시트와, 상기한 베이스시트의 가장자리 영역에 적층된 소결촉진제가 첨가된 복수의 외부자성체층과, 상기한 베이스시트 위 상기한 외부자성체층의 내부에 적층된 소결촉진제를 첨가하지 않은 복수의 내부자성체층과, 상기한 내부 자성체층 위에 인쇄되어 적어도 1회의 권선을 이루는 나선형상의 전극과, 상기한 외부자성체층 및 내부자성체층 위에 합착된 소결촉진제가 첨가된 복수의 자성체 캐스팅시트로 이루어진 커버시트와, 상기한 내부자성체층 위의 전극을 외부회로와 접속시키는 단자로 구성된다.In order to achieve the above object, the chip inductor of the present invention is a base sheet in which a plurality of casting sheets made of a magnetic body to which a sintering accelerator is added, and a plurality of sintering accelerators laminated in the edge region of the base sheet are added. The outer magnetic layer, the plurality of inner magnetic layers without addition of the sintering accelerator laminated in the outer magnetic layer on the base sheet, and the spiral electrode printed on the inner magnetic layer to form at least one winding. And a cover sheet made of a plurality of magnetic casting sheets to which the sintering accelerator bonded to the outer magnetic layer and the inner magnetic layer is added, and a terminal connecting the electrode on the inner magnetic layer to an external circuit.

또한, 본 발명에 따른 칩인덕터 제조방법은 소결촉진제가 첨가된 자성체로 이루어진 캐스팅시트를 합착하여 베이스시트를 형성하는 단계와, 상기한 베이스시트의 가장자리 영역에 소결촉진제가 첨가된 제1외부자성체층을 형성하는 단계와, 상기한 베이스시트 위 외부자성체층의 안쪽에 소결촉진제가 첨가되지 않은 제1내부자성체층을 형성하는 단계와, 상기한 제1내부자성체층 위에 금속을 인쇄하여 제1전극을 형성하는 단계와, 상기한 제1외부자성체층 위에 소결촉진제가 첨가된 제2외부자성체층을 형성하는 단계와, 상기한 제1내부자성체층의 일부 영역 위에 소결촉진제가 첨가되지 않은 제2내부자성체층을 형성하는 단계와, 상기한 제1내부자성체층과 제2내부자성체층 위에 상기한 제1전극과 접속되는 제2전극을 형성하여 나선형 전극의 1회 권선을 형성하는 단계와, 상기한 내부자성체층, 외부자성체층 및 전극형성단계를 반복하는 단계와, 상기한 외부자성체층 위에 소결촉진제가 첨가된 자성체를 도포하고 내부자성체층의 전체 영역에 소결촉진제가 첨가되지 않은 자성체를 도포하는 단계와, 상기한 내부자성체층 및 외부자성체층 위에 소결촉진제가 첨가된 자성체의 캐스팅시트로 이루어진 커버시트를 합착하는 단계와, 상기한 전극을 외부회로와 접속시키는 단자를 형성하는 단계로 구성된다.In addition, the method for manufacturing a chip inductor according to the present invention comprises the steps of forming a base sheet by bonding a casting sheet made of a magnetic material to which the sintering accelerator is added, and the first external magnetic layer to which the sintering accelerator is added to the edge region of the base sheet. Forming a first inner magnetic layer without a sintering accelerator added to the inside of the outer magnetic layer on the base sheet, and printing a metal on the first inner magnetic layer to form a first electrode. Forming a second external magnetic layer to which the sintering accelerator is added on the first external magnetic layer, and a second internal magnetic body to which the sintering accelerator is not added on the partial region of the first internal magnetic layer. Forming a layer, and forming a second electrode connected to the first electrode on the first inner magnetic layer and the second inner magnetic layer to form a single winding of the spiral electrode. Forming, repeating the above-described inner magnetic layer, outer magnetic layer, and electrode forming step; applying a magnetic body to which the sintering accelerator is added on the outer magnetic layer, and adding the sintering accelerator to the entire region of the inner magnetic layer. Applying a non-magnetic material, bonding a cover sheet made of a casting sheet of a magnetic material to which the sintering accelerator is added on the internal magnetic layer and the external magnetic layer, and forming a terminal connecting the electrode to an external circuit. It consists of steps.

도 1은 종래의 칩인덕터의 간략 단면도.1 is a simplified cross-sectional view of a conventional chip inductor.

도 2는 본 발명에 따른 칩인덕터의 간략 단면도.2 is a simplified cross-sectional view of a chip inductor according to the present invention.

도 3은 본 발명에 따른 칩인덕터를 제조하는 방법을 나타내는 도면.3 is a view showing a method of manufacturing a chip inductor according to the present invention.

* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings

110 : 베이스시트 111 : 소결촉진제 첨가 자성체층110: base sheet 111: magnetic layer with a sintering accelerator

112 : 소결촉진제 미첨가 자성체층 115 : 전극112: magnetic layer without sintering accelerator 115: electrode

118 : 단자118: terminal

이하, 첨부한 도면을 참조하여 본 발명에 따른 칩인덕터 및 그 제조방법을 상세히 설명한다.Hereinafter, a chip inductor and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

도 2는 본 발명에 따른 칩인덕터의 간략 단면도도이다. 도면에 나타낸 바와 같이, 전극(115)이 형성되는 칩인덕터의 내부에는 소결촉진제가 첨가되지 않은 자성체(112)가 도포되어 있으며, 그 외부에는 소결촉진제가 첨가된 자성체(111)가 도포되어 있다. 도면에는 전극이 서로 분리된 형상으로 도시되어 있지만, 실제의 전극은 자성체(112)의 각 층에 인쇄되어 전체적으로 복수의 권선을 갖는 나선형상으로 이루어져 있다. 칩인덕터의 외부에는 상기한 전극(115)을 외부회로와 접속시키는 단자(118)가 형성되어 있다.2 is a simplified cross-sectional view of a chip inductor according to the present invention. As shown in the figure, the magnetic body 112 without the sintering accelerator is applied to the inside of the chip inductor on which the electrode 115 is formed, and the magnetic body 111 with the sintering accelerator is applied to the outside thereof. Although the electrodes are shown in a shape separated from each other, the actual electrode is formed in a spiral shape printed on each layer of the magnetic body 112 and having a plurality of windings as a whole. Outside the chip inductor, a terminal 118 is formed to connect the electrode 115 to an external circuit.

상기한 구조의 칩인덕터에서, 전극이 형성되는 내부에는 소결촉진제가 첨가되지 않은 자성체(112)가 도포되어 있기 때문에, 투자율이 향상되어 좋은 전기적 특성을 갖는 칩인덕터를 얻을 수 있게 된다. 또한, 소결촉진제가 첨가되지 않은 자성체(112)를 외부에서 둘러쌓고 있는 자성체(111)에는 소결촉진제가 첨가되어 치밀도가 향상되기 때문에, Ag 석출에 의한 도금불량이 발생하지 않게 된다.In the chip inductor having the above structure, since the magnetic body 112 to which the sintering accelerator is not added is coated inside the electrode, the permeability is improved to obtain a chip inductor having good electrical characteristics. In addition, since the sintering accelerator is added to the magnetic body 111 which surrounds the magnetic body 112 to which the sintering accelerator is not added, and the density is improved, plating defects due to Ag precipitation do not occur.

도 3은 본 발명의 칩인덕터를 제조하는 방법을 나타내는 도면이다. 우선, 도 3(a)에 나타낸 바와 같이, 소결촉진제가 첨가된 Ni-Zn-Cu계 페라이트와 같은 자성체(이후, 촉진제첨가 자성체로 표시)로 이루어진 캐스팅시트(casting sheet)를 약 10장 합착하여 베이스시트(110)를 형성한다. 그 후, 도 3(b)에 나타낸 바와 같이, 상기한 베이스시트(110)의 가장 자리 영역에 역시 촉진제첨가 자성체를 스크린인쇄법(screen printing process)으로 도포하여 제1외부자성체층(111a)를 형성하고 상기한 베이스시트(10) 위의 제1외부자성체층(111a) 안쪽에 소결촉진제가 첨가되지 않은 자성체(이후, 촉진제미첨가 자성체로 표시)를 도포하여 제1내부자성체층(112a)를 형성한 후, 상기한 제1내부자성체층(112a) 위에 Ag와 같은 금속을 인쇄하여 전극(115)을 형성한다. 이때, 소결첨가제로는 주로 Bi2O3나 유리제를 사용한다.3 is a view showing a method of manufacturing a chip inductor of the present invention. First, as shown in FIG. 3 (a), about 10 sheets of casting sheets made of a magnetic material (hereinafter, denoted as an accelerator-added magnetic material) such as Ni-Zn-Cu ferrite to which a sintering accelerator is added are bonded together. The base sheet 110 is formed. Thereafter, as shown in FIG. 3 (b), the promoter-added magnetic material is also applied to the edge region of the base sheet 110 by the screen printing process to apply the first external magnetic layer 111a. A magnetic material (hereinafter referred to as a magnetic additive without an accelerator) is added to the first external magnetic layer 111a on the base sheet 10 to form the first internal magnetic layer 112a. After forming, a metal such as Ag is printed on the first internal magnetic layer 112a to form the electrode 115. In this case, mainly Bi 2 O 3 or glass is used as the sintering additive.

이어서, 도 3(c)에 나타낸 바와 같이 상기한 제1외부자성체층(111a) 위에 다시 촉진제첨가 자성체를 도포하여 제2외부자성체층(111b)을 형성하고, 도 3(d)에 나타낸 바와 같이 상기한 제1내부자성체층(112a)의 제1영역(I) 위에 촉진제미첨가 자성체를 도포하여 제2내부자성체층(112b)을 형성하고 전극(115)을 다시 인쇄한다. 전극은 도 3(d)에 나타낸 바와 같이, 제1내부자성층(112a)와 제2내부자성체층(112b) 위에 형성되어 도 3(b)의 공정에서 형성된 전극과 전기적으로 접속된다. 상기한 공정에 의해, 전극(115)이 나선형상으로 형성되어 1회의 권선을 이룬다.Subsequently, as shown in FIG. 3 (c), the accelerator-adding magnetic material is applied again on the first external magnetic layer 111 a to form the second external magnetic layer 111 b, and as shown in FIG. 3 (d). The promoter-free magnetic material is applied on the first region I of the first internal magnetic layer 112a to form the second internal magnetic layer 112b, and the electrode 115 is printed again. As shown in FIG. 3 (d), the electrode is formed on the first inner magnetic layer 112 a and the second inner magnetic layer 112 b and electrically connected to the electrode formed in the process of FIG. 3 (b). By the above process, the electrode 115 is formed in a spiral shape to form a single winding.

이후, 도 3(e)에 나타낸 바와 같이, 제2외부자성체층(111b) 위에 다시 촉진제첨가 자성체를 도포하여 제3외부자성체층(111c)를 형성하고, 상기한 제2내부자성체층(112b)의 제2영역(II) 위에 촉진제미첨가 자성체를 도포하여 제3내부자성체층(112c)을 형성한 후, 전극(115)을 인쇄한다.Thereafter, as shown in FIG. 3E, the accelerator-added magnetic material is applied again on the second external magnetic layer 111b to form the third external magnetic layer 111c, and the second internal magnetic layer 112b described above. After the accelerating agent-free magnetic material is applied on the second region II to form the third internal magnetic layer 112c, the electrode 115 is printed.

계속해서, 상기한 공정을 반복하여 도 3(f)에 나타낸 바와 같이 제4외부자성체층(111d)와 제4내부자성체층(112d)를 형성하고 전극(115)을 인쇄하여 나선형 전극의 2회 권선을 형성한다.Subsequently, the above process is repeated to form the fourth external magnetic layer 111d and the fourth internal magnetic layer 112d, as shown in FIG. 3 (f), and the electrode 115 is printed to print twice the spiral electrode. Form a winding.

상기한 외부자성체층, 내부자성체층 및 전극을 형성하는 공정을 반복하여 원하는 권선의 나선형 전극을 형성한 후, 도 4(g)에 나타낸 바와 같이, 제4외부자성체층(111d) 위에 촉진제첨가 자성체를 도포하여 제5외부자성체층(111e)을 형성하고, 제3내부자성체층(112c)의 제2영역(II)과 제4내부자성체층(112d)의 제1영역(I)에 촉진제미첨가 자성체를 도포하여 제5내부자성체층(112e)을 형성한 후, 도 4(h)에 나타낸 바와 같이 촉진첨가 자성체로 이루어진 커버시트(113)을 상기한 제5외부자성체층(111e)과 제5내부자성체층(112e)에 합착하여 칩인덕터를 완성한다. 도면에는 나타내지 않았지만, 상기한 커버시트(113) 후, 상기한 칩인덕터를 960℃ 이하의 온도에서 소성한 후 외부에 단자를 형성한다.After repeating the process of forming the outer magnetic layer, the inner magnetic layer and the electrode to form a spiral electrode of the desired winding, as shown in Fig. 4 (g), the promoter-added magnetic material on the fourth outer magnetic layer (111d) Is applied to form a fifth external magnetic layer 111e, and no accelerator is added to the second region (II) of the third internal magnetic layer (112c) and the first region (I) of the fourth internal magnetic layer (112d). After applying the magnetic material to form the fifth internal magnetic layer 112e, as shown in FIG. 4 (h), the fifth external magnetic layer 111e and the fifth external magnetic layer 111e are formed. The chip inductor is completed by bonding to the internal magnetic layer 112e. Although not shown in the drawing, after the cover sheet 113, the chip inductor is fired at a temperature of 960 ° C or lower, and terminals are formed outside.

커버시트(113)은 베이스시트(110)와 마찬가지로 소결촉진제가 첨가된 자성체로 이루어진 약 50μm 두께의 캐스팅시트를 약 10장 합착하여 형성한다.The cover sheet 113 is formed by bonding about 10 sheets of a casting sheet having a thickness of about 50 μm, which is made of a magnetic body to which a sintering accelerator is added, like the base sheet 110.

상기한 바와 같이, 본 발명의 칩인덕터는 소결촉진제를 첨가한 자성체를 베이스시트의 둘레에 우선 도포하고, 그 중앙의 제1영역(I) 및 제2영역(II)에 번갈아 가면서 소결촉진제가 첨가되지 않은 자성체를 도포하고 전극을 형성한 후, 다시 커버시트를 합착하여 완성한다.As described above, in the chip inductor of the present invention, the magnetic body to which the sintering accelerator is added is first applied to the circumference of the base sheet, and the sintering promoter is added to the first region I and the second region II alternately. After applying a non-magnetic magnetic material to form an electrode, the cover sheet is bonded again to complete.

상기한 바와 같이, 본 발명의 칩인덕터는 전극이 인쇄되는 내부가 소결촉진제가 첨가되지 않은 자성체가 적층되어 형성되고 그 외부가 촉진첨가제가 첨가된 자성체가 적층되어 형성되기 때문에, 투자율이 향상될 뿐만 아니라 외부가 단단하게 소결되어 전극이 외부로 석출되는 일이 발생하지 않게 된다. 따라서, 칩인덕터의 전기적특성이 대폭 향상될 뿐만 아니라 도금불량의 발생도 방지된다.As described above, the chip inductor of the present invention is formed by stacking a magnetic body without an sintering accelerator added to the inside of which the electrode is printed, and by stacking a magnetic body with an accelerator added thereto, thereby improving permeability. In addition, the outside is hardly sintered so that the electrode does not occur outside. Therefore, not only the electrical characteristics of the chip inductor are greatly improved, but also the occurrence of plating defects is prevented.

Claims (4)

소결촉진제가 첨가되며 외부를 둘러싸는 복수의 외부자성체층;A plurality of external magnetic layers to which the sintering accelerator is added and surrounds the outside; 상기한 외부자성체층의 내부에 적층된 소결촉진제를 첨가하지 않은 복수의 내부자성체층; 및A plurality of inner magnetic layers without adding a sintering accelerator laminated in the outer magnetic layer; And 상기한 내부 자성체층 위에 인쇄되어 적어도 1회의 권선을 이루는 나선형상의 전극으로 구성된 칩인덕터.A chip inductor comprising a spiral electrode printed on the inner magnetic layer to form at least one winding. 제1항에 있어서,The method of claim 1, 소결촉진제가 첨가된 복수의 자성체 캐스팅시트로 이루어져 상기한 외부자성체층과 내부자성체층이 적층되는 베이스시트; 및A base sheet composed of a plurality of magnetic casting sheets to which a sintering accelerator is added, wherein the external magnetic layer and the internal magnetic layer are laminated; And 소결촉진제가 첨가된 복수의 자성체 캐스팅시트로 이루어져 상기한 전극, 외부자성체층 및 내부자성체층에 합착되는 커버시트가 추가로 구성된 것을 특징으로 하는 칩인덕터.Chip inductor, characterized in that the cover sheet is further composed of a plurality of magnetic casting sheet to which the sintering accelerator is added to the electrode, the external magnetic layer and the inner magnetic layer. 소결촉진제가 첨가된 띠형상의 제1외부자성체층을 형성하는 단계;Forming a band-shaped first external magnetic layer to which the sintering accelerator is added; 상기한 외부자성체층의 안쪽에 소결촉진제가 첨가되지 않은 제1내부자성체층을 형성하는 단계;Forming a first inner magnetic layer in which the sintering accelerator is not added to the inside of the outer magnetic layer; 상기한 제1내부자성체층 위에 금속을 인쇄하여 제1전극을 형성하는 단계;Forming a first electrode by printing a metal on the first internal magnetic layer; 상기한 제1외부자성체층 위에 소결촉진제가 첨가된 제2외부자성체층을 형성하는 단계;Forming a second external magnetic layer to which the sintering accelerator is added on the first external magnetic layer; 상기한 제1내부자성체층의 일부 영역 위에 소결촉진제가 첨가되지 않은 제2내부자성체층을 형성하는 단계;Forming a second internal magnetic layer on which the sintering accelerator is not added, on a portion of the first internal magnetic layer; 상기한 제1내부자성체층과 제2내부자성체층 위에 상기한 제1전극과 접속되는 제2전극을 형성하여 나선형 전극의 1회 권선을 형성하는 단계;Forming a single winding of the spiral electrode by forming a second electrode connected to the first electrode on the first inner magnetic layer and the second inner magnetic layer; 상기한 내부자성체층, 외부자성체층 및 전극형성단계를 반복하는 단계; 및Repeating the inner magnetic layer, the outer magnetic layer and the electrode forming step; And 상기한 외부자성체층 위에 소결촉진제가 첨가된 자성체를 도포하고 내부자성체층의 전체 영역에 소결촉진제가 첨가되지 않은 자성체를 도포하는 단계로 구성된 칩인덕터 제조방법.A method of manufacturing a chip inductor comprising applying a magnetic material to which a sintering accelerator is added on the external magnetic layer and applying a magnetic material to which the sintering promoter is not added to the entire region of the inner magnetic layer. 제3항에 있어서,The method of claim 3, 상기한 제1내부자성체층과 제1외부자성체층을 소결촉진제가 첨가된 자성체로 이루어진 캐스팅시트가 합착된 베이스시트 위에 적층하는 단계; 및Stacking the first inner magnetic layer and the first outer magnetic layer on a base sheet to which a casting sheet made of a magnetic body to which a sintering accelerator is added; And 상기한 내부자성체층 및 외부자성체층 위에 소결촉진제가 첨가된 자성체의 캐스팅시트를 합착하는 단계가 추가로 포함된 것을 특징으로 하는 칩인덕터 제조방법.Bonding the casting sheet of the magnetic material to which the sintering accelerator is added on the inner magnetic layer and the outer magnetic layer, characterized in that it further comprises a chip inductor manufacturing method.
KR1019970066916A 1997-12-09 1997-12-09 Chip inductor and method for manufacturing the same KR100320933B1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0334407A (en) * 1989-06-30 1991-02-14 Tokin Corp Lamination type inductor
JPH0465807A (en) * 1990-07-06 1992-03-02 Tdk Corp Laminated inductor and its manufacture
JPH0513238A (en) * 1991-06-29 1993-01-22 Taiyo Yuden Co Ltd Laminated chip inductor
KR970012819A (en) * 1995-08-30 1997-03-29 강박광 Manufacturing method of multilayer chip inductor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0334407A (en) * 1989-06-30 1991-02-14 Tokin Corp Lamination type inductor
JPH0465807A (en) * 1990-07-06 1992-03-02 Tdk Corp Laminated inductor and its manufacture
JPH0513238A (en) * 1991-06-29 1993-01-22 Taiyo Yuden Co Ltd Laminated chip inductor
KR970012819A (en) * 1995-08-30 1997-03-29 강박광 Manufacturing method of multilayer chip inductor

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