KR100315458B1 - Method for manufacturing mos transistor - Google Patents

Method for manufacturing mos transistor Download PDF

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Publication number
KR100315458B1
KR100315458B1 KR1020000018198A KR20000018198A KR100315458B1 KR 100315458 B1 KR100315458 B1 KR 100315458B1 KR 1020000018198 A KR1020000018198 A KR 1020000018198A KR 20000018198 A KR20000018198 A KR 20000018198A KR 100315458 B1 KR100315458 B1 KR 100315458B1
Authority
KR
South Korea
Prior art keywords
gate
polysilicon
oxide
dopants
drain
Prior art date
Application number
KR1020000018198A
Other languages
Korean (ko)
Inventor
Geon Uk Park
Original Assignee
Anam Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anam Semiconductor Ltd filed Critical Anam Semiconductor Ltd
Priority to KR1020000018198A priority Critical patent/KR100315458B1/en
Application granted granted Critical
Publication of KR100315458B1 publication Critical patent/KR100315458B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: A fabrication method of MOS(Metal Oxide Silicon) transistors is provided to decrease power loss for driving the device by equally forming a titanium silicide and a polysilicon electrode for a gate. CONSTITUTION: After a gate oxide(13) is formed by a thermal oxidation of a silicon wafer(11), a polysilicon(14) is deposited on the entire surface of the resultant structure. An Ar sputtering is performed to reduce the size of the grain on the polysilicon(14). After a gate electrode is formed by patterning the polysilicon(14) and the gate oxide(13), a cap oxide(15) is formed on the resultant structure by another thermal oxidation. LDD(Lightly Doped Drain)(16) is formed by implanting lightly doped N-type dopants or P-type dopants on the silicon wafer(11) using the gate electrode as a mask. Sidewalls(17) are formed on both side of the gate by patterning the gate oxide(13), and then source/drain(18) electrodes are formed by implanting heavily doped dopants with the same dopants used in the LDD(16) formation. A titanium silicide is formed by annealing the titanium deposited structure on the source/drain electrodes(18) and the gate electrode after removing the cap oxide(15) on the same region.
KR1020000018198A 2000-04-07 2000-04-07 Method for manufacturing mos transistor KR100315458B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020000018198A KR100315458B1 (en) 2000-04-07 2000-04-07 Method for manufacturing mos transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020000018198A KR100315458B1 (en) 2000-04-07 2000-04-07 Method for manufacturing mos transistor

Publications (1)

Publication Number Publication Date
KR100315458B1 true KR100315458B1 (en) 2001-11-09

Family

ID=37531574

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020000018198A KR100315458B1 (en) 2000-04-07 2000-04-07 Method for manufacturing mos transistor

Country Status (1)

Country Link
KR (1) KR100315458B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100698080B1 (en) 2005-12-28 2007-03-23 동부일렉트로닉스 주식회사 Method for manufacturing in MOS transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100698080B1 (en) 2005-12-28 2007-03-23 동부일렉트로닉스 주식회사 Method for manufacturing in MOS transistor

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