KR100304866B1 - Photo transistor - Google Patents

Photo transistor Download PDF

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Publication number
KR100304866B1
KR100304866B1 KR1019930013138A KR930013138A KR100304866B1 KR 100304866 B1 KR100304866 B1 KR 100304866B1 KR 1019930013138 A KR1019930013138 A KR 1019930013138A KR 930013138 A KR930013138 A KR 930013138A KR 100304866 B1 KR100304866 B1 KR 100304866B1
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South Korea
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ohmic contact
electrode
layer
gate electrode
drain electrode
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KR1019930013138A
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Korean (ko)
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KR950004618A (en
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전대진
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구자홍
엘지전자주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE: A photo transistor is provided to improve an optical response speed by forming a source electrode and a drain electrode of the photo transistor as a vertical structure. CONSTITUTION: A drain electrode(12) is formed on an upper portion of an insulating substrate(11). A gate electrode is formed on a predetermined portion of the drain electrode(12). The gate electrode is formed by surrounding a plurality of insulating layers(13,15). The first ohmic contact layer(16) is formed on the drain electrode(12) of both ends of the gate electrode(14). An optical conductive layer(17) is formed on both ends of the insulating layer(15) of the first ohmic contact layer(16) and the gate electrode(13). The second ohmic contact layer(18) is formed on the optical conductive layer(16). A source electrode(19) is formed on the second ohmic contact layer(18).

Description

광트랜지스터Phototransistor

제1도는 종래의 광트랜지스터 구조도.1 is a conventional optical transistor structure diagram.

제2도는 종래의 광트랜지스터 특성을 나타낸 그래프.2 is a graph showing the characteristics of a conventional phototransistor.

제3도는 본 발명의 광트랜지스터 구조도.3 is a structure diagram of a phototransistor of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

11 : 기판 12 : 드레인전극11 substrate 12 drain electrode

13, 15 : 절연막 14 : 게이트전극13, 15 insulating film 14 gate electrode

16 : 제1오믹접촉층 17 : 광도전층16: first ohmic contact layer 17: photoconductive layer

18 : 제2오믹접촉층 19 : 소오스전극18: second ohmic contact layer 19: source electrode

본 발명은 광트랜지스터(Photo-transistor)에 관한 것으로, 특히 광응답도 및 광전류 구동특성을 개선시킨 광트랜지스터에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to phototransistors, and more particularly, to phototransistors having improved optical response and photocurrent driving characteristics.

종래의 비정질실리콘 광트랜지스터는 제1도에 도시한 바와 같이 유리기판 (1) 위에 크롬층(Cr)을 형성하고 패터닝하여 게이트(2)를 형성한 다음 결과물 전면에 절연층(3)으로 SiN을 증착한다.In the conventional amorphous silicon phototransistor, as shown in FIG. 1, a chromium layer Cr is formed and patterned on the glass substrate 1 to form a gate 2, and then SiN is formed as an insulating layer 3 on the entire surface of the resultant. Deposit.

다음에 진성비정질실리콘(4)과 n+a-SiH(5)를 연속으로 증착한 후 소정패턴으로 패터닝한 다음 소오스/드레인 전극용 금속을 증착하고 패터닝하여 소오스(7) 및 드레인(6) 전극을 형성한다.Next, intrinsic amorphous silicon (4) and n + a-SiH (5) are successively deposited and patterned in a predetermined pattern, and then metals for source / drain electrodes are deposited and patterned, so as to source (7) and drain (6) electrodes. To form.

이와 같은 광트랜지스터의 동작은 제1도에서와 같이 hν의 빛이 들어오면 진공비정질실리콘층(4)에서 전자와 정공이 형성되고 이 형성된 전자, 정공은 소오스와 드레인 사이에 걸어준 전압에 의해 드래프트(draft)되는데 이때 게이트전압에 따라서 드레인과 소오스에 흐르는 전류의 크기가 제2도와 같이 나타나게 된다.As shown in FIG. 1, when the light of hν enters, electrons and holes are formed in the vacuum amorphous silicon layer 4, and the formed electrons and holes are drafted by the voltage applied between the source and the drain. In this case, the magnitude of the current flowing in the drain and the source is shown as shown in FIG. 2 according to the gate voltage.

상술한 종래의 광트랜지스터는 발생된 광전하가 소오스와 드레인 사이의 거리, 즉 채널길이만큼 이동해야 하므로 광응답특성이 매우 느리고 전류도 상당히 작은 문제점이 있다.In the conventional phototransistor described above, since the generated photocharge has to move by the distance between the source and the drain, that is, the channel length, the photoresponsiveness is very slow and the current is also very small.

본 발명은 상술한 문제를 해결하기 위한 것으로, 광응답도 및 광전류구동 특성이 개선된 광트랜지스터를 제공하는 것을 그 목적으로 한다.The present invention has been made to solve the above problems, and an object thereof is to provide an optical transistor having improved optical response and photocurrent driving characteristics.

상기 목적을 달성하기 위해 본 발명의 광트랜지스터는 절연성기판과, 상기 기판상에 형성된 드레인전극, 상기 드레인전극상의 소정부분에 절연층으로 둘러싸여 형성된 게이트전극, 상기 게이트전극 양단부위의 드레인전극상에 형성된 제1오믹접촉층, 상기 제1오믹접촉층 및 게이트전극상의 절연층 양단의 상부에 걸쳐 형성되며 그 상부의 소정부위에 광투과창을 가진 광도전층, 상기 광도전층 상부의 광투과창 이외의 부분에 형성된 제2오믹접촉층, 및 상기 제2오믹접촉층상에 형성된 소오스전극을 구비하여 구성된다.In order to achieve the above object, the phototransistor of the present invention includes an insulating substrate, a drain electrode formed on the substrate, a gate electrode formed by enclosing an insulating layer on a predetermined portion of the drain electrode, and formed on the drain electrode at both ends of the gate electrode. A photoconductive layer formed over the first ohmic contact layer, the first ohmic contact layer, and an upper end of the insulating layer on the gate electrode, and having a light transmitting window at a predetermined portion thereof, and a portion other than the light transmitting window above the photoconductive layer. And a source electrode formed on the second ohmic contact layer.

이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

제3도에 본 발명의 광트랜지스터 구조를 도시한 바, (a)는 평면도이고 (b)는단면도이다.3 shows a phototransistor structure of the present invention, where (a) is a plan view and (b) is a sectional view.

본 발명의 광트랜지스터는 유리기판(11) 위에 금속을 증착하여 드레인전극 (12)을 형성하고, 그 위에 절연막(13)으로 SiN을 증착하고 이어서 게이트형성용 금속을 증착하고 패터닝하여 게이트전극(14)을 형성한 후, 전면에 다시 절연막(15)으로 SiN을 증착하고 패터닝하여 상기 게이트전극(14)을 절연시킴과 아울러 상기 드레인전극(12)의 소정부분은 노출되도록 한다.In the phototransistor of the present invention, a metal is deposited on the glass substrate 11 to form a drain electrode 12, a SiN is deposited on the insulating layer 13, and then a metal for gate formation is deposited and patterned to form a gate electrode 14. ), SiN is deposited and patterned on the entire surface of the gate electrode 14 to insulate the gate electrode 14, and a predetermined portion of the drain electrode 12 is exposed.

다음에 n+a-Si:H를 증착하고 패터닝하여 제1오믹접촉층(16)을 형성한 다음 결과물상에 n+a-Si:H를 연속 증착한 후 소정패턴으로 패터닝하여 a-Si:H로 된 광도전층(17)을 형성하고 이어서 소오스전극 형성용 금속을 증착하고 패터닝하여 소오스전극(19)을 형성하고 이 소오스전극(19)을 마스크로 하여 상기 n+a-Si:H를 선택적으로 식각하여 제2오믹접촉층(18)을 형성함과 동시에 상기 광도전층(17)의 소정부분을 노출시킴으로써 광이 투과되는 광투과창을 형성한다.Next, n + a-Si: H is deposited and patterned to form the first ohmic contact layer 16, and then n + a-Si: H is continuously deposited on the resultant, and then patterned into a predetermined pattern to form a-Si: A photoconductive layer 17 made of H is formed, and then a source electrode forming metal is deposited and patterned to form a source electrode 19. The source electrode 19 is used as a mask to selectively select n + a-Si: H. Etching to form a second ohmic contact layer 18 and at the same time to expose a predetermined portion of the photoconductive layer 17 to form a light transmission window through which light is transmitted.

이와 같이 본 발명의 광트랜지스터는 게이트전극(14)을 사이에 두고 소오스전극(19)과 드레인전극(12)이 각각 상, 하에 형성된 수직구조로 되어 있으며, 이의구동은 다음과 같다.As described above, the phototransistor of the present invention has a vertical structure in which the source electrode 19 and the drain electrode 12 are formed above and below with the gate electrode 14 interposed therebetween, and the driving thereof is as follows.

hν의 광이 상부로부터 입사될 때 상부 소오스전극이 형성되지 않은 부분의 a-Si:H 광도전층(17)에서 입사된 광에 의하여 캐리어(Carrier)가 발생되고, 이 발생된 광캐리어는 게이트전극(14)에 걸어준 전압에 의해 채널부위로 모여 소오스전극(19)과 드레인전극(12) 사이에 흐르는 전류에 영향을 주게 된다.When the light of hν is incident from the top, a carrier is generated by the light incident from the a-Si: H photoconductive layer 17 of the portion where the upper source electrode is not formed, and the generated photocarrier is a gate electrode. The voltage applied to (14) gathers at the channel portion and affects the current flowing between the source electrode 19 and the drain electrode 12.

즉, 게이트에 걸어준 전압에 따라서 소오스전극과 드레인전극 사이에 흐르는 전류의 양이 변하게 되며 또한 입사된 hν의 광강도(Intensity)에 따라서도 전류의양이 변하게 된다.That is, the amount of current flowing between the source electrode and the drain electrode is changed according to the voltage applied to the gate, and the amount of current is also changed depending on the intensity of the incident hv.

이상과 같이 본 발명은 광트랜지스터의 소오스전극과 드레인전극을 수직구조로 형성하므로써 광응답속도를 개선시킬 수 있으며 흐르는 광전류도 증가되어 큰 출력의 광전변환특성을 얻을 수 있다.As described above, the present invention can improve the optical response speed by forming the source electrode and the drain electrode of the phototransistor in a vertical structure, and the photocurrent conversion characteristic of the large output can be obtained by increasing the flowing photocurrent.

Claims (1)

절연성기판(11)과, 상기 기판(11)상에 형성된 드레인전극(12)과, 상기 드레인전극(12)상의 소정부분에 절연층(13, 15)으로 둘러싸여 형성된 게이트전극과, 상기 게이트전극(14) 양단 부위에 드레인전극(12)상에 형성된 제1오믹접촉층(16)과, 상기 제1오믹접촉층(16) 및 게이트전극(13)상의 절연층(15) 양단의 상부에 걸쳐 형성되며 그 상부의 소정부위에 광투과창을 가진 광도전층(17)과, 상기 광도전층(17) 상부의 광투과창 이외의 부분에 형성된 제2오믹접촉층(18), 및 상기 제2오믹접촉층(18)상에 형성된 소오스전극(19)을 구비하여 이루어진 것을 특징으로 하는 광트랜지스터.An insulating substrate 11, a drain electrode 12 formed on the substrate 11, a gate electrode formed by being surrounded by insulating layers 13 and 15 on a predetermined portion of the drain electrode 12, and the gate electrode ( 14) formed on both ends of the first ohmic contact layer 16 formed on the drain electrode 12 and on both ends of the insulating layer 15 on the first ohmic contact layer 16 and the gate electrode 13; And a photoconductive layer 17 having a light transmission window at a predetermined portion thereof, a second ohmic contact layer 18 formed at a portion other than the light transmission window above the photoconductive layer 17, and the second ohmic contact. And a source electrode (19) formed on the layer (18).
KR1019930013138A 1993-07-13 1993-07-13 Photo transistor KR100304866B1 (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60784B2 (en) * 1975-06-16 1985-01-10 三菱電機株式会社 Semiconductor device and its manufacturing method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60784B2 (en) * 1975-06-16 1985-01-10 三菱電機株式会社 Semiconductor device and its manufacturing method

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