KR100238942B1 - Lower electrode assembly for semiconductor etching equipment - Google Patents

Lower electrode assembly for semiconductor etching equipment Download PDF

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KR100238942B1
KR100238942B1 KR1019970000128A KR19970000128A KR100238942B1 KR 100238942 B1 KR100238942 B1 KR 100238942B1 KR 1019970000128 A KR1019970000128 A KR 1019970000128A KR 19970000128 A KR19970000128 A KR 19970000128A KR 100238942 B1 KR100238942 B1 KR 100238942B1
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lower electrode
focus ring
etching equipment
electrode assembly
wafer
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KR1019970000128A
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Korean (ko)
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KR19980065251A (en
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조헌철
이관성
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윤종용
삼성전자주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

공정챔버내에 설치되어 식각공정을 수행하고자하는 웨이퍼가 놓여지는 하부전극 조립체에 관한 것이다.The present invention relates to a lower electrode assembly installed in a process chamber and on which a wafer to be etched is placed.

본 발명은 웨이퍼가 놓여지는 하부전극(21)과, 상기 하부전극의 가장자리부에 설치되어 웨이퍼(W) 상에 플라즈마가 집중되어 잔류하도록 유도하는 포커스링(22)과, 상기 하부전극의 하부에 설치되어 하부전극과 함께 냉각통로(24)를 형성하는 베이스(23)와, 상기 냉각통로와 냉각매체 공급라인(25)를 연결하는 어뎁터(26)로 이루어진 반도체 식각설비의 하부전극 조립체에 있어서, 상기 어뎁터(26)를 단일부품으로 형성하고, 상기 냉각통로(24)의 유입포트(23a) 및 배출포트(23b)는 웨이퍼의 플렛존에 위치시켜 냉각통로의 양끝단을 밀착시켜 형성한 구성하며, 상기 하부전극과 밀착되는 포커스링의 저면의 일부에는 애노다이징 표면저리를 제거하여 하부전극과 전기적으로 연결되도록 접지시킨 구성이다.According to the present invention, a lower electrode 21 on which a wafer is placed, a focus ring 22 installed at an edge of the lower electrode to induce plasma to remain on the wafer W, and a lower portion of the lower electrode In the lower electrode assembly of the semiconductor etching equipment comprising a base 23 installed to form a cooling passage 24 together with the lower electrode, and the adapter 26 for connecting the cooling passage and the cooling medium supply line 25, The adapter 26 is formed as a single part, and the inlet port 23a and the outlet port 23b of the cooling passage 24 are positioned in the flat zone of the wafer so as to be in close contact with both ends of the cooling passage. The part of the bottom of the focus ring which is in close contact with the lower electrode is removed and the anodizing surface is removed so as to be electrically connected to the lower electrode.

따라서 부품이 간소화되어 원가가 절감되고, 예방정비시 조립 및 분해작업이 용이하여 작업성이 향상되며, 포커스링의 기능 및 냉각효율이 향상됨으로써 공정의 안정화로 생산수율이 향상되는 효과가 있다.Therefore, the parts are simplified and the cost is reduced, and the workability is improved by the easy assembly and disassembly work during the preventive maintenance, and the production efficiency is improved by stabilizing the process by improving the function and cooling efficiency of the focus ring.

Description

반도체 식각설비의 하부전극 조립체Bottom Electrode Assembly of Semiconductor Etching Equipment

본 발명은 반도체 식각설비의 하부전극 조립체에 관한 것으로서, 더욱 상세하게는 공정챔버내에 설치되어 식각공정을 수행하고자하는 웨이퍼가 놓여지는 하부전극 조립체에 관한 것이다.The present invention relates to a lower electrode assembly of a semiconductor etching facility, and more particularly, to a lower electrode assembly in which a wafer to be installed in a process chamber to perform an etching process is placed.

일반적으로 반도체장치는 포토 리소그래피(Photo Lithography), 식각, 박막형성 공정등 많은 공정을 반복적으로 수행하여 제조되고, 이러한 공정중 식각 공정은 웨이퍼상의 불필요한 막을 제거하는 공정으로써 크게 케미컬(Chemical)을 이용하는 습식 식각방법과 플라즈마(Plasma) 또는 이방성 건식 식각방법으로 구분된다.In general, semiconductor devices are manufactured by repeatedly performing many processes such as photolithography, etching, and thin film formation. During this process, an etching process is a process of removing unnecessary film on a wafer, and is a wet method using chemicals. It is divided into an etching method and a plasma or anisotropic dry etching method.

도1은 상기와 같은 식각 공정에서 플라즈마를 이용한 식각설비를 개략적으로 나타낸 것으로, 공정챔버(1) 내의 상,하부에 상부전극(2)과 하부전극(3)이 각각 구비되어 있다. 따라서 미가공된 웨이퍼(W)를 공정챔버(1) 내의 하부전극(3) 상에 올려놓고, 가스주입 및 압력이 설정값에 도달하게 되면, R.F(Radio Frequency)파워가 상부전극(2)에 인가되어 플라즈마 가공이 이루어지게 된다.FIG. 1 schematically shows an etching apparatus using a plasma in an etching process as described above. An upper electrode 2 and a lower electrode 3 are respectively provided on upper and lower portions of a process chamber 1. Therefore, the unprocessed wafer W is placed on the lower electrode 3 in the process chamber 1, and when gas injection and pressure reach a set value, RF (Radio Frequency) power is applied to the upper electrode 2. And plasma processing is performed.

도2는 이러한 식각설비에 있어서, 종래의 하부전극이 구비된 하부전극 조립체를 나타낸 것으로, 웨이퍼(W)가 놓여지는 하부전극(3)과, 하부전극(3)의 하부에 고정되는 고정링(4)으로 구성되고, 하부전극(3) 내부에는 냉각홈(3a)이 원주방향으로 형성되어 이와 밀착되는 고정링(4)의 상면과 함께 냉각통로(5)를 형성하게 되며, 고정링(4)의 일측에는 어뎁터조립체(6)가 설치되어 냉각통로(5)와 냉매 공급라인(7)을 연결하도록 된 구성이다.2 shows a lower electrode assembly having a conventional lower electrode in such an etching facility, and includes a lower electrode 3 on which a wafer W is placed and a fixing ring fixed to the lower portion of the lower electrode 3. 4) and the cooling groove (3a) is formed in the lower electrode (3) in the circumferential direction to form a cooling passage (5) together with the upper surface of the fixing ring (4) in close contact with the fixing ring (4). At one side of the) is an adapter assembly 6 is installed to connect the cooling passage 5 and the refrigerant supply line (7).

이러한 구성의 하부전극 조립체(9)는, 플라즈마 식각공정시 웨이퍼(W)의 막질(예를 들면 질화막, 산화막, 폴리(Poly), 패드(Pad)) 또는 포토 레지스트는 플라즈마 형성에 따른 화학 반응이 이루어져 이상퇴적(異狀堆積) 물질(부산물)을 발생하게 되고, 부산물은 일부 진공펌프(8)로 유동하며, 나머지는 가공 웨이퍼(W) 외각 근접부위부터 하부전극(3) 표면에 침적되어진다. 또한 부산물은 가공 웨이퍼(W) 누적매수 또는 식각시간 증가에 따라 침적량은 증가한다. 따라서 미가공 웨이퍼(W)가 부산물 위에 얹혀 들뜨게 되면, 냉각 및 불평형등으로 식각량의 재현성 저하 및 균일성불량, 아아크발생 등의 공정불량을 초래한다.The lower electrode assembly 9 having such a structure may have a chemical reaction due to plasma formation in the film quality (eg, nitride film, oxide film, poly pad, or pad) of the wafer W during the plasma etching process. Abnormal deposits (by-products) are generated, and the by-products flow to some vacuum pumps (8), and the remainder is deposited on the surface of the lower electrode (3) from the outer surface of the processing wafer (W). . In addition, the amount of by-products increases as the accumulated number of processed wafers (W) or etching time increases. Therefore, when the raw wafer W is floated on the by-product, it causes cooling and unbalance etc., resulting in poor reproducibility of etching amount, poor uniformity, and arc generation.

또한 하부전극(3)의 표면은 30㎛ 두께의 애노다이징(Anodizing) 처리되어 있으며, 이 애노다이징은 클리닝시 또는 공정중 플라즈마에 의해 손상되어 하부전극(3)의 재질인 알루미늄이 노출된다. 이로써 하부전극(3)과 상부전극(2) 사이의 절연파괴현상 발생으로 가공 웨이퍼(W)에 응집될 플라즈마가 분산되어 가공 웨이퍼의 품질이 저하된다.In addition, the surface of the lower electrode 3 is anodized with a thickness of 30 μm, and the anodizing is damaged by plasma during cleaning or during the process to expose aluminum, which is the material of the lower electrode 3. . As a result, the breakdown of the insulating electrode between the lower electrode 3 and the upper electrode 2 causes plasma to be agglomerated on the processed wafer W, thereby degrading the quality of the processed wafer.

그리고, 냉각통로(5)의 단면이 수직방향으로 길게 형성된 것이므로 냉각효율이 저하되고, 하부전극(3)의 냉각통로(5)와 냉각가스 공급라인(7)을 연결하는 어뎁터조립체가 매우 복잡한 구성으로 이루어져 분해 조립작업이 번거로워 하부전극 조립체의 정기점검시 작업성을 저하시키는 문제점이 있다.In addition, since the cross section of the cooling passage 5 is elongated in the vertical direction, the cooling efficiency is lowered, and the adapter assembly connecting the cooling passage 5 and the cooling gas supply line 7 of the lower electrode 3 is very complicated. Since the disassembly and assembly work is cumbersome, there is a problem of lowering workability during regular inspection of the lower electrode assembly.

도3 및 도4는 다른 타입의 하부전극 조립체를 나타낸 것으로, 웨이퍼(W)가 놓여지는 하부전극(11)과, 상기 하부전극(11)의 가장자리부에 설치되어 플라즈마가 웨이퍼(W)로 집중될 수 있도록 하는 포커스링(12)과, 상기 하부전극(11)의 하부에 설치되는 베이스(13)로 이루어지고, 하부전극(11)과 베이스(13)가 접하는 부위에 냉각통로(14)가 원주방향으로 형성되어 있으며, 베이스(13)에는 상기 냉각통로(14)로 통하는 유입포트(13a) 및 배출포트(13b)가 형성된 구성이다.3 and 4 illustrate different types of lower electrode assemblies, in which a lower electrode 11 on which the wafer W is placed and an edge portion of the lower electrode 11 are concentrated to concentrate plasma on the wafer W. As shown in FIG. It consists of a focus ring 12 and a base 13 which is installed below the lower electrode 11, so that the cooling passage 14 is in contact with the lower electrode 11 and the base 13 It is formed in the circumferential direction, the base 13 has a configuration in which the inlet port 13a and the discharge port 13b leading to the cooling passage 14 are formed.

이러한 구성의 하부전극 조립체(10)는 냉각통로(14)가 수평방향으로 형성되어 냉각효율이 전술한 종래예보다 향상되지만 도4에 도시된 바와 같이 냉각매체의 유입포트(13a)와 배출포트(13b)가 형성된 부위는 냉각통로(14)의 양끝단 사이가 멀리 이격되어 있어 이부분에서의 냉각효율이 저하된다.The lower electrode assembly 10 of this configuration has a cooling passage 14 formed in a horizontal direction, which improves the cooling efficiency than the above-described conventional example, but as shown in FIG. 4, the inlet port 13a and the discharge port of the cooling medium ( 13b) is formed between the two ends of the cooling passage 14 is spaced far apart, the cooling efficiency in this portion is reduced.

또한 포커스링(12)에 의해서는 식각공정시 발생된 부산물이 하부전극(11)의 상면에 쌓이는 것을 방지하게 되고, 포커스링(12)에 부산물이 쌓이게 되면, 주기적으로 교체함으로써 부산물에 의한 공정불량을 방지하도록 된 것이나, 포커스링(12)의 상면이 편평한 구조이므로 플라즈마를 웨이퍼(W) 상으로 유도하여 집중시키고 오래 잔류하도록 하는 기능이 저하되는 문제점이 있다.In addition, the focus ring 12 prevents the by-products generated during the etching process from accumulating on the upper surface of the lower electrode 11, and when the by-products accumulate on the focus ring 12, the process by the by-products by periodically replacing However, since the upper surface of the focus ring 12 has a flat structure, the function of inducing and concentrating the plasma onto the wafer W and causing it to remain for a long time is deteriorated.

본 발명은 상기와 같은 종래의 문제점을 해결하기 위한 것으로, 그 목적은 하부전극 조립체의 구성을 간소화하여 정기 점검시 분해조립이 용이하도록 하여 작업성을 향상시킬 수 있고, 웨이퍼의 냉각효율을 향상시킬 수 있는 반도체 식각설비의 하부전극 조립체를 제공하는 것이다.The present invention is to solve the conventional problems as described above, the object is to simplify the configuration of the lower electrode assembly to facilitate the disassembly and assembly during regular inspection to improve workability, improve the cooling efficiency of the wafer It is to provide a lower electrode assembly of the semiconductor etching equipment.

본 발명의 다른 목적은 포커스링의 구조를 개선하여 플라즈마가 웨이퍼상에 집중되도록 유도하고, 오래 잔류하도록 함으로써 식각공정을 안정화하고, 식각량의 재현성 및 균일성을 향상시킬 수 있는 반도체 식각설비의 하부전극 조립체에 의해 달성될 수 있다.Another object of the present invention is to improve the structure of the focus ring to induce the plasma to be concentrated on the wafer, and to remain for a long time to stabilize the etching process, the lower portion of the semiconductor etching equipment that can improve the reproducibility and uniformity of the etching amount It can be achieved by an electrode assembly.

도1은 일반적인 식각설비를 개략적으로 나타낸 구성도이다.1 is a schematic view showing a general etching facility.

도2는 종래의 하부전극 조립체를 나타낸 단면구조도이다.2 is a cross-sectional view showing a conventional lower electrode assembly.

도3은 종래의 다른 하부전극 조립체를 나타낸 단면구조도이다.Figure 3 is a cross-sectional view showing another conventional lower electrode assembly.

도4는 도3의 평면도이다.4 is a plan view of FIG.

도5는 본 발명에 따른 식각설비의 하부전극 조립체를 나타낸 단면구조도이다.5 is a cross-sectional structural view showing a lower electrode assembly of an etching apparatus according to the present invention.

도6은 도5의 평면도이다.6 is a plan view of FIG.

도7은 본 발명에 따른 하부전극 조립체에서 어뎁터를 나타낸 평면도이다.7 is a plan view illustrating an adapter in a lower electrode assembly according to the present invention.

도8은 본 발명에 따른 하부전극 조립체에서 포커스링의 조립상태를 나타낸 요부 확대단면도이다.Figure 8 is an enlarged cross-sectional view showing the main portion showing the assembly state of the focus ring in the lower electrode assembly according to the present invention.

도9A 내지 9D는 본 발명에 따른 하부전극 조립체에서 포커스링의 변형예를 나타낸 단면구조도이다.9A to 9D are cross-sectional structural views showing a modification of the focus ring in the lower electrode assembly according to the present invention.

※도면의 주요부분에 대한 부호의 설명※ Explanation of symbols for main parts of drawing

1 : 공정챔버2 : 상부전극1: process chamber 2: upper electrode

3, 11, 21 : 하부전극5, 14, 24 : 냉각통로3, 11, 21: lower electrode 5, 14, 24: cooling passage

12, 22 : 포커스링 13, 23 : 베이스12, 22: focus ring 13, 23: base

13a, 23a : 유입포트13b, 23b : 배출포트13a, 23a: inlet port 13b, 23b: outlet port

26 : 어뎁터27 : 고정나사26: adapter 27: fixing screw

28 : 스페이서29, 30 : 절연층28: spacer 29, 30: insulating layer

상기의 목적은 웨이퍼가 놓여지는 하부전극과, 상기 하부전극의 가장자리부에 설치되어 웨이퍼상에 플라즈마가 집중되어 잔류하도록 유도하는 포커스링과, 상기 하부전극의 하부에 설치되어 하부전극과 함께 냉각통로를 형성하는 베이스와, 상기 냉각통로와 냉각매체 공급라인를 연결하는 어뎁터로 이루어진 반도체 식각설비의 하부전극 조립체에 있어서, 상기 어뎁터의 일측에 나사부를 형성하여 냉각통로와 연통된 베이스의 유입포트에 나사결합하고, 어뎁터의 타측에는 톱니형상의 결합부를 형성하여 냉각매체 공급라인이 연결되도록 하며, 어뎁터의 외측형상은 나사결합시 회전이 용이하도록 다각형상으로 형성하여 구성됨을 특징으로 하는 반도체 식각설비의 하부전극 조립체에 의해 달성될 수 있다.The object is to provide a lower electrode on which the wafer is placed, a focus ring installed at the edge of the lower electrode to induce plasma to remain on the wafer, and a cooling passage provided below the lower electrode. In the lower electrode assembly of the semiconductor etching equipment consisting of a base and an adapter connecting the cooling passage and the cooling medium supply line, the screw is formed on one side of the adapter screwed to the inlet port of the base in communication with the cooling passage In addition, the other side of the adapter to form a sawtooth coupling portion so that the cooling medium supply line is connected, the outer shape of the adapter is formed by forming a polygonal shape to facilitate rotation when screwing the lower electrode of the semiconductor etching equipment, characterized in that Achieved by assembly Can.

또한 상기 포커스링의 단면구조는 다양하게 형성하여 기능을 더욱 향상시키고, 냉각통로의 유입포트 및 배출포트는 웨이퍼의 플렛존에 위치되도록 하고 간격을 밀착시켜 형성함으로써 냉각효율을 향상시키도록 하는 것이 바람직하다.In addition, the cross-sectional structure of the focus ring is variously formed to further improve the function, and the inflow port and the discharge port of the cooling passage are preferably positioned in the flat zone of the wafer and formed to be in close contact with each other to improve the cooling efficiency. Do.

이하, 본 발명의 구체적인 실시예를 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도5 및 도6은 본 발명에 따른 반도체 식각설비의 하부전극 조립체를 나타낸 단면구조도 및 평면도로서, 웨이퍼(W)가 놓여지는 하부전극(21)과, 상기 하부전극(21)의 가장자리부에 설치되는 포커스링(22)과, 하부전극(21)의 저면에 밀착되어 고정되는 베이스(23)로 이루어진 구성이다.5 and 6 are cross-sectional structural views and a plan view showing a lower electrode assembly of a semiconductor etching apparatus according to the present invention, in which a lower electrode 21 on which a wafer W is placed and an edge portion of the lower electrode 21 are shown. The focus ring 22 is installed, and the base 23 is fixed to the bottom surface of the lower electrode 21 is fixed.

또한 상기 베이스(23)의 상면과 하부전극(21)의 저면이 밀착되어 이들 사이에 냉각통로(24)가 원주방향으로 형성되고, 베이스(23)에는 상기 냉각통로(24)와 연통하는 유입포트(23a) 및 배출포트(23b)가 형성되며, 상기 유입포트(23a)와 냉각매체 공급라인(25)은 어뎁터(26)에 의해 연결되어진다.In addition, the upper surface of the base 23 and the bottom surface of the lower electrode 21 are in close contact with each other, and a cooling passage 24 is formed in the circumferential direction therebetween, and the base 23 has an inflow port communicating with the cooling passage 24. 23a and a discharge port 23b are formed, and the inflow port 23a and the cooling medium supply line 25 are connected by the adapter 26.

이때 유입포트(23a) 및 배출포트(23b)는 웨이퍼(W)의 플랫존 위치에 위치시켜 형성하고, 냉각통로(24)의 양끝단은 최대한 근접시켜 플랫존 부위의 냉각효율을 향상시키도록 되어 있다. 어뎁터(26)는 몸체(26a) 양단에 유입포트(23a)와 나사결합하는 나사부(26b)와 냉각매체 공급라인(25)에 삽입되어 연결되는 톱니형상의 결합부(26c)가 형성된 단일부품으로 이루어지며, 몸체(26a)의 단면형상은 다각형, 예를 들면 도7에 도시된 바와 같이 육각형상으로 형성하여 나사결합시 회전을 용이하게 한다.At this time, the inlet port (23a) and the discharge port (23b) is formed to be located in the flat zone position of the wafer (W), both ends of the cooling passage 24 to be as close as possible to improve the cooling efficiency of the flat zone portion. have. The adapter 26 is a single part formed with a threaded portion 26b for screwing the inlet port 23a at both ends of the body 26a and a toothed coupling portion 26c inserted into and connected to the cooling medium supply line 25. The cross-sectional shape of the body 26a is polygonal, for example, formed in a hexagonal shape as shown in FIG. 7 to facilitate rotation when screwing.

따라서 어뎁터(26)의 나사부(26b)를 베이스(23)의 유입포트(23a)에 나사결합하고, 어뎁터(26)의 톱니형상의 결합부(26c)를 냉각매체 공급라인(25)에 삽입시켜 연결함으로써 간단하게 이루어지는 것으로, 부품이 단일화되어 조립 및 분리가 용이하며, 원가를 절감할 수 있게 된다.Therefore, the threaded portion 26b of the adapter 26 is screwed into the inlet port 23a of the base 23, and the toothed coupling portion 26c of the adapter 26 is inserted into the cooling medium supply line 25. By simply connecting, the parts are unified, so that they can be easily assembled and separated and the cost can be reduced.

또한 하부전극(21)은 알루미늄 재질로 제조되는 것으로, 상면은 도8에 도시된 바와 같이 40∼60㎛ 두께로 소프트 애노다이징 표면처리하여 절연층(29)을 형성하고, 포커스링(22)은 전면에 역시 40∼60㎛ 두께로 소프트 애노다이징 표면처리하여 절연층(30)을 형성하며, 포커스링(22)의 내주연 및 외주연의 상측 모서리에 라운딩형상을 형성한다.In addition, the lower electrode 21 is made of aluminum, and the upper surface is soft anodized surface treatment to a thickness of 40 ~ 60㎛ as shown in Figure 8 to form an insulating layer 29, the focus ring 22 The surface of the silver is also 40 to 60㎛ thick anodized surface treatment to form an insulating layer 30, and forms a rounded shape on the upper edge of the inner and outer circumference of the focus ring 22.

그리고 도8에 도시된 바와 같이 포커스링(22)은 하부전극(21)에 고정나사(27)로 결합되는 것으로, 포커스링(22)에 받침부(22a)가 형성되도록 소정깊이의 홈부를 형성하고, 상기 받침부(22a)상에 고정나사(27)의 저면과 부합하는 형상의 경사면(28a)이 형성된 스페이서(28)를 개재하며, 고정나사(27)를 스페이서(28), 받침부(22a)로 관통시켜 하부전극(21)에 나사결합함으로써 고정되도록 한 구성이다. 이때 고정나사(27) 및 스페이서(28)의 표면에도 애노다이징 표면처리를 하는 것이 바람직하다.As shown in FIG. 8, the focus ring 22 is coupled to the lower electrode 21 by a fixing screw 27, and a groove having a predetermined depth is formed in the focus ring 22 so that the supporting part 22a is formed. And a spacer 28 having an inclined surface 28a having a shape corresponding to the bottom surface of the fixing screw 27 on the supporting portion 22a, and the fixing screw 27 having the spacer 28 and the supporting portion ( It is configured to be fixed by screwing to the lower electrode 21 by penetrating through 22a). At this time, the surface of the fixing screw 27 and the spacer 28 is preferably anodized.

따라서 포커스링(22)의 조립 및 분해가 고정나사(27)에 용이하게 이루어지고, 고정나사(27)의 조임작업시 스페이서(28)에 의해 포커스링(22)의 받침부(22a)가 가압되어 하부전극(21)과 포커스링(22)가 고정되는 것이며, 스페이서(28)에 의해 포커스링(22)이 마모되는 것을 방지할 수 있다. 또한 정기적인 점검으로 고정나사(27)를 풀고 조일 때 스페이서(28)의 접촉면이 마모되는 경우 스페이서(28)만 교환하여 사용하는 것이므로 매우 경제적이다.Therefore, the assembly and disassembly of the focus ring 22 can be easily performed on the fixing screw 27, and the supporting portion 22a of the focus ring 22 is pressed by the spacer 28 when the fixing screw 27 is tightened. As a result, the lower electrode 21 and the focus ring 22 are fixed, and the focus ring 22 may be prevented from being worn by the spacer 28. In addition, if the contact surface of the spacer 28 is worn when the fixing screw 27 is loosened and tightened by regular inspection, it is very economical because only the spacer 28 is used.

그리고, 하부전극(21)과 밀착되는 포커스링(22)의 저면의 일부에는 애노다이징 표면처리된 절연층(30)의 일부를 제거하여 하부전극(21)과 전기적으로 연결되도록 접지시킴으로써 포커스링(22)도 하부전극(21)의 기능을 수행하게 되므로 플라즈마를 웨이퍼(W) 상에 집중시키고 오래 잔류할 수 있도록 유도하는 기능이 더욱 향상되어지며, 포커스링(22)의 내주연은 하부전극(21)과 소정의 틈새(a)를 갖도록 이격시켜 식각공정시 발생하는 부산물이 틈새(a)로 들어가 쌓일 수 있도록 하는 것이 바람직하다.In addition, a portion of the bottom surface of the focus ring 22 in close contact with the lower electrode 21 is removed by a portion of the insulating layer 30 having anodized surface treatment and grounded to be electrically connected to the lower electrode 21. Since the lower electrode 21 also functions as the lower electrode 21, the function of concentrating the plasma on the wafer W and guiding it to remain for a long time is further improved, and the inner circumference of the focus ring 22 is the lower electrode. (21) and the predetermined gap (a) is preferably spaced so that by-products generated during the etching process can enter the gap (a) and accumulate.

도9A 내지 도9D는 포커스링(22)의 단면형상을 나타낸 것으로, 포커스링(22)의 단면구조를 다양한 형상으로 형성하여 기능을 향상시킬 수 있도록 한다. 즉 도9A는 내주연측 두께는 낮게 하고, 외주연측 두께는 상대적으로 높게 형성한 것이고, 도9B는 내주연측 두께는 높게 하고, 외주연측 두께는 상대적으로 낮게 형성한 것이다.9A to 9D show the cross-sectional shape of the focus ring 22. The cross-sectional structure of the focus ring 22 can be formed in various shapes to improve the function. In other words, Fig. 9A shows that the inner circumferential side thickness is low and the outer circumferential side thickness is relatively high, while Fig. 9B shows the inner circumferential side thickness is high and the outer circumferential side thickness is relatively low.

또한 도9C는 내주연측 두께는 낮게 하고, 외주연측 두께는 상대적으로 높게 형성하며, 상면을 곡면으로 형성한 것이고, 도9D는 내주연측 두께는 높게 하고, 외주연측 두께는 상대적으로 낮게 형성하며, 상면은 곡면으로 형성한 것이다. 본 발명은 상기예의 형상에 한정하는 것은 아니고, 이와 유사한 형태의 다른 형상으로 형성할 수도 있다.In addition, Fig. 9C shows that the inner peripheral side thickness is low, the outer peripheral side thickness is relatively high, and the upper surface is formed in a curved surface, and FIG. 9D shows the inner peripheral side thickness is high, and the outer peripheral side thickness is relatively low. The upper surface is formed into a curved surface. This invention is not limited to the shape of the said example, It can also be formed in another shape of the similar form.

이상에서와 같이 본 발명의 반도체 식각설비의 하부전극 조립체에 의하면, 부품이 간소화되어 원가가 절감되고, 예방정비시 조립 및 분해작업이 용이하여 작업성이 향상되며, 포커스링의 기능 및 냉각효율이 향상됨으로써 공정의 안정화로 생산수율이 향상되는 효과가 있다.As described above, according to the lower electrode assembly of the semiconductor etching apparatus of the present invention, the parts are simplified and the cost is reduced, and the workability is improved by the easy assembly and disassembly during preventive maintenance, and the function and cooling efficiency of the focus ring are improved. As a result, the production yield is improved by stabilization of the process.

이상에서 본 발명은 기재된 구체예에 대해서만 상세히 설명되었지만 본 발명의 기술사상 범위 내에서 다양한 변형 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속함은 당연한 것이다.Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical scope of the present invention, and such modifications and modifications are within the scope of the appended claims.

Claims (10)

웨이퍼가 놓여지는 하부전극과, 상기 하부전극의 가장자리부에 설치되어 웨이퍼상에 플라즈마가 집중되어 잔류하도록 유도하는 포커스링과, 상기 하부전극의 하부에 설치되어 하부전극과 함께 냉각통로를 형성하는 베이스와, 상기 냉각통로와 냉각매체 공급라인를 연결하는 어뎁터로 이루어진 반도체 식각설비의 하부전극 조립체에 있어서,A lower electrode on which the wafer is placed, a focus ring installed at an edge of the lower electrode to induce plasma to remain on the wafer, and a base provided below the lower electrode to form a cooling passage together with the lower electrode In the lower electrode assembly of the semiconductor etching equipment comprising an adapter connecting the cooling passage and the cooling medium supply line, 상기 어뎁터의 일측에 나사부를 형성하여 냉각통로와 연통된 베이스의 유입포트에 나사결합하고, 어뎁터의 타측에는 톱니형상의 결합부를 형성하여 냉각매체 공급라인이 연결되도록 하며, 어뎁터의 외측형상은 나사결합시 회전이 용이하도록 다각형상으로 형성하여 구성됨을 특징으로 하는 반도체 식각설비의 하부전극 조립체.A screw is formed on one side of the adapter to be screwed to the inlet port of the base communicating with the cooling passage, and the other side of the adapter is formed with a sawtooth coupling portion to connect the cooling medium supply line, and the outer shape of the adapter is screwed together. The lower electrode assembly of the semiconductor etching equipment, characterized in that formed in a polygonal shape to facilitate rotation. 제 1 항에 있어서,The method of claim 1, 상기 냉각통로의 유입포트 및 배출포트는 웨이퍼의 플렛존에 위치되도록 하고, 냉각통로의 양끝단을 밀착시켜 형성함을 특징으로 하는 상기 반도체 식각설비의 하부전극 조립체.The inlet port and the outlet port of the cooling passage is positioned in the flat zone of the wafer, the lower electrode assembly of the semiconductor etching equipment, characterized in that formed by close contact with both ends of the cooling passage. 제 1 항에 있어서,The method of claim 1, 상기 하부전극의 상면은 40∼60㎛ 두께의 소프트 애노다이징 표면처리하여 절연층이 형성됨을 특징으로 하는 상기 반도체 식각설비의 하부전극 조립체.The upper electrode of the lower electrode assembly of the semiconductor etching equipment, characterized in that the insulating layer is formed by a soft anodized surface treatment of 40 ~ 60㎛ thickness. 제 1 항에 있어서,The method of claim 1, 상기 포커스링은 전면에 40∼60㎛ 두께의 애노다이징 표면처리하여 절연층을 형성하며, 포커스링의 내주연 및 외주연의 상측 모서리에 라운딩형상이 형성됨을 특징하는 상기 반도체 식각설비의 하부전극 조립체.The focus ring is an anodized surface treatment of 40 ~ 60㎛ thickness on the front surface to form an insulating layer, the lower electrode of the semiconductor etching equipment, characterized in that the rounded shape is formed on the upper edge of the inner and outer circumference of the focus ring Assembly. 제 4 항에 있어서,The method of claim 4, wherein 상기 포커스링에 받침부가 형성되도록 소정깊이의 홈부를 형성하고, 상기 받침부상에 고정나사의 저면과 부합하는 경사면이 형성된 스페이서를 개재하며, 고정나사를 스페이서, 받침부로 관통시켜 하부전극에 나사결합함으로써 고정되도록 구성됨을 특징으로 하는 상기 반도체 식각설비의 하부전극 조립체.A groove having a predetermined depth is formed in the focus ring so that the supporting portion is formed, and a spacer having an inclined surface corresponding to the bottom surface of the fixing screw is formed on the supporting portion, and the fixing screw is screwed into the lower electrode by passing through the spacer and the supporting portion. The lower electrode assembly of the semiconductor etching equipment, characterized in that configured to be fixed. 제 5 항에 있어서,The method of claim 5, 상기 스페이서에 40∼60㎛ 두께의 애노다이징 표면처리하여 됨을 특징으로 하는 상기 반도체 식각설비의 하부전극 조립체.And anodizing surface treatment having a thickness of 40 to 60 μm on the spacers. 제 4 항에 있어서,The method of claim 4, wherein 상기 하부전극과 밀착되는 포커스링의 저면의 일부는 절연층을 제거하여 하부전극과 전기적으로 연결되도록 접지시킴을 특징으로 하는 상기 반도체 식각설비의 하부전극 조립체.A portion of the bottom surface of the focus ring in close contact with the lower electrode is grounded to be electrically connected to the lower electrode by removing the insulating layer. 제 4 항에 있어서,The method of claim 4, wherein 상기 포커스링의 내주연은 하부전극의 외주연과 소정의 틈새를 갖도록 이격시켜 설치함을 특징으로 하는 상기 반도체 식각설비의 하부전극 조립체.The inner circumferential edge of the focus ring is installed so as to be spaced apart from the outer circumference of the lower electrode to have a predetermined gap. 제 4 항에 있어서,The method of claim 4, wherein 상기 포커스링의 단면형상은, 내주연측 두께와 외주연측 두께가 서로 상이한 두께로 형성됨을 특징으로 하는 상기 반도체 식각설비의 하부전극 조립체.The cross-sectional shape of the focus ring is a lower electrode assembly of the semiconductor etching equipment, characterized in that the inner peripheral side thickness and the outer peripheral side thickness is formed to be different from each other. 제 9 항에 있어서,The method of claim 9, 상기 포커스링의 상면은 라운딩형상으로 형성됨을 특징으로 하는 상기 반도체 식각설비의 하부전극 조립체.The upper surface of the focus ring is a lower electrode assembly of the semiconductor etching equipment, characterized in that formed in a rounded shape.
KR1019970000128A 1997-01-06 1997-01-06 Lower electrode assembly for semiconductor etching equipment KR100238942B1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100650926B1 (en) 2004-10-13 2006-11-29 주식회사 에이디피엔지니어링 Plasma processing apparatus
KR20190067908A (en) * 2016-11-01 2019-06-17 베리안 세미콘덕터 이큅먼트 어소시에이츠, 인크. Removable substrate planar structure ring

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KR100574915B1 (en) * 1999-04-06 2006-04-28 삼성전자주식회사 Plasma chamber for preventing a abnormal abrasion of focus ring
KR100734776B1 (en) * 2005-10-04 2007-07-04 주식회사 아이피에스 Apparatus for processing substrate with plasma
KR101660647B1 (en) 2015-07-24 2016-10-10 박인희 Rotary barbecue roaster

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100650926B1 (en) 2004-10-13 2006-11-29 주식회사 에이디피엔지니어링 Plasma processing apparatus
KR20190067908A (en) * 2016-11-01 2019-06-17 베리안 세미콘덕터 이큅먼트 어소시에이츠, 인크. Removable substrate planar structure ring
KR102375180B1 (en) 2016-11-01 2022-03-16 베리안 세미콘덕터 이큅먼트 어소시에이츠, 인크. ion beam device

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