KR100221634B1 - Method of alignment - Google Patents

Method of alignment Download PDF

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Publication number
KR100221634B1
KR100221634B1 KR1019970011399A KR19970011399A KR100221634B1 KR 100221634 B1 KR100221634 B1 KR 100221634B1 KR 1019970011399 A KR1019970011399 A KR 1019970011399A KR 19970011399 A KR19970011399 A KR 19970011399A KR 100221634 B1 KR100221634 B1 KR 100221634B1
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South Korea
Prior art keywords
pattern
measurement pattern
alignment
layer
forming
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KR1019970011399A
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Korean (ko)
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KR19980075242A (en
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김철호
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구본준
엘지반도체주식회사
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Priority to KR1019970011399A priority Critical patent/KR100221634B1/en
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • G03F9/708—Mark formation
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • G03F9/7076—Mark details, e.g. phase grating mark, temporary mark
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H01L2223/5446—Located in scribe lines

Abstract

본 발명은 반도체장치의 정렬방법에 관한 것으로서 기판 상의 소자영역 주변의 스크라이브 라인 상에 측정 패턴을 형성하는 공정과, 상기 측정 패턴이 덮혀지도록 상기 기판 상에 물질층을 증착하는 공정과, 상기 물질층 상에 광에 대하여 감광물질과 유사한 굴절률과 투과율을 갖는 유기물질을 도포하여 반반사층을 형성하는 공정과, 상기 반반사층 상에 감광막을 도포한 후 노광 및 현상하여 상기 측정 패턴을 에워쌀 뿐만 아니라 덮는 정렬 패턴을 형성하는 공정을 구비한다.The present invention relates to a method of aligning a semiconductor device, comprising: forming a measurement pattern on a scribe line around a device region on a substrate; depositing a material layer on the substrate so that the measurement pattern is covered; Forming a semi-reflective layer by coating an organic material having a refractive index and transmittance similar to that of the photosensitive material with respect to light; A process of forming an alignment pattern is provided.

Description

정렬 방법Sort method

본 발명은 반도체장치의 정렬 방법에 관한 것으로서, 특히, 하부 반반사층(bottom anti reflective coating layer)에 의해 하부의 패턴에서 난반사되는 것을 방지하여 정렬도를 향상시킬 수 있는 반도체장치의 정렬 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of aligning a semiconductor device, and more particularly, to a method of aligning a semiconductor device capable of improving the degree of alignment by preventing diffuse reflection in a lower pattern by a bottom anti reflective coating layer. .

반도체장치가 고집적화 및 고밀도화에 따라 단위 소자의 크기가 감소되고, 이에 따라, 도선 등의 선폭이 작아지고 있다. 그러므로, 반도체장치의 제조 공정에서 정확한 마스크의 정렬을 요구하게 된다. 마스크 정렬은 기판에 형성된 이전 패턴에 마스크를 정렬시키는 것으로 소자의 신뢰성 및 생산 수율에 영향을 준다.As semiconductor devices become more integrated and denser, the size of the unit element is reduced, and as a result, the line width of the conducting wire is reduced. Therefore, accurate mask alignment is required in the manufacturing process of the semiconductor device. Mask alignment aligns the mask to the previous pattern formed on the substrate, affecting the reliability and production yield of the device.

기판의 소자영역에 박막 또는 패턴을 형성할 때 소자영역을 제외한 주변의 스크라이브 라인(scribe line)에 이전에 형성된 정렬 정도를 측정하기 위한 측정 패턴을 기준으로 하여 마스크를 정렬한다.When the thin film or the pattern is formed in the device region of the substrate, the mask is aligned based on the measurement pattern for measuring the alignment degree previously formed on the scribe line around the device region except for the device region.

도 1a 내지 c는 종래 기술에 따른 반도체장치의 정렬 방법을 도시하는 공정도이다.1A to C are process charts showing an alignment method of a semiconductor device according to the prior art.

도 1a를 참조하면, 기판(11) 상에 패턴을 형성하기 위한 물질, 예를 들면, 불순물이 도핑된 다결정실리콘 또는 알루미늄 등의 금속과 같은 도전성 물질이나, 또는, 산화실리콘 등의 절연물질을 증착한다. 그리고, 패턴을 형성하기 위한 물질을 포토리쏘그래피(photolihogrphy) 방법으로 패터닝하여 소자영역(도시되지 않음)에 패턴을 형성하면서 주변의 스크라이브 라인 상에 측정 패턴(13)을 형성한다.Referring to FIG. 1A, a material for forming a pattern on the substrate 11, for example, a conductive material such as a metal such as polycrystalline silicon or aluminum doped with impurities or an insulating material such as silicon oxide is deposited. do. Subsequently, the material for forming the pattern is patterned by a photolihogrphy method to form a pattern in the device region (not shown), thereby forming the measurement pattern 13 on the surrounding scribe line.

도 1b를 참조하면, 소자영역 상의 패턴과 주변의 스크라이브 라인 상의 측정 패턴(13)이 덮혀지도록 기판(11) 상에 물질층(15)을 증착한 후, 이 물질층(15) 상에 반반사층(7)을 형성한다. 물질층(15)은 불순물이 도핑된 다결정실리콘 또는 알루미늄 등의 금속과 같은 도전성 물질이나, 또는, 산화실리콘 등의 절연물질로 형성하되 측정 패턴(13)과 전기적 특성이 서로 다른 물질로 형성된다. 또한, 측정 패턴(13) 및 물질층(15) 모두 절연물질로 이루어질 수도 있다. 상기에서 반반사층(17)은 광에 대하여 감광물질과 유사한 굴절률과 투과율을 갖는 물질로 형성한다.Referring to FIG. 1B, after depositing the material layer 15 on the substrate 11 to cover the pattern on the device region and the measurement pattern 13 on the surrounding scribe line, the antireflective layer on the material layer 15 is formed. (7) is formed. The material layer 15 is formed of a conductive material such as polycrystalline silicon or a metal doped with impurities, or an insulating material such as silicon oxide, but is formed of a material having different electrical characteristics from the measurement pattern 13. In addition, both the measurement pattern 13 and the material layer 15 may be made of an insulating material. The anti-reflective layer 17 is formed of a material having a refractive index and transmittance similar to that of the photosensitive material with respect to light.

도 1c를 참조하면, 반반사층(17) 상에 감광막을 도포한 후 소자영역에 이 후의 패턴(도시되지 않음)을 형성하기 위해 물질층(15)을 식각 할 때 마스크로 사용하기 위해 노광 및 현상한다. 이 때, 주변의 스크라이브 라인의 반반사층(17) 상에도 감광막이 측정 패턴(13)을 에워싸도록 노광 및 현상하여 정렬 패턴(19)을 형성한다. 이 때, 측정 패턴(13)과 정렬 패턴(19) 사이의 거리가 일정하면 감광막을 노광하는 마스크가 정렬된 것으로 판정하고 식각 등의 공정을 진행하게 된다.Referring to FIG. 1C, after the photoresist is applied on the semi-reflective layer 17, exposure and development for use as a mask when etching the material layer 15 to form a subsequent pattern (not shown) in the device region. do. At this time, the photosensitive film is exposed and developed so as to surround the measurement pattern 13 on the semi-reflective layer 17 of the surrounding scribe line to form the alignment pattern 19. At this time, if the distance between the measurement pattern 13 and the alignment pattern 19 is constant, it is determined that the mask for exposing the photosensitive film is aligned, and the process such as etching is performed.

그러나, 상술한 종래의 반도체장치의 정렬방법은 반반사층이 측정 패턴의 측면에 의해 경사지게 두껍게 형성되므로 정렬 측정시 조사되는 광이 난반사되어 반사되는 광 신호에 노이즈(noise)가 발생되어 정렬 에러를 발생시키는 문제점이 있었다.However, in the above-described conventional semiconductor device alignment method, since the semi-reflective layer is formed to be inclined thickly by the side of the measurement pattern, noise is generated in the reflected light signal due to the diffuse reflection of light irradiated during alignment measurement, thereby causing an alignment error. There was a problem letting.

따라서, 본 발명의 목적은 정렬 측정시 반반사층에 의해 반사되는 광 신호에 노이즈가 발생을 억제하여 정렬 에러를 방지할 수 있는 정렬 방법을 제공함에 있다.Accordingly, an object of the present invention is to provide an alignment method capable of preventing an alignment error by suppressing occurrence of noise in an optical signal reflected by a semi-reflective layer during alignment measurement.

상기 목적을 달성하기 위한 본 발명에 따른 반도체장치의 정렬 방법은 기판 상의 소자영역 주변의 스크라이브 라인 상에 측정 패턴을 형성하는 공정과, 상기 측정 패턴이 덮혀지도록 상기 기판 상에 물질층을 증착하는 공정과, 상기 물질층 상에 광에 대하여 감광물질과 유사한 굴절률과 투과율을 갖는 유기물질을 도포하여 반반사층을 형성하는 공정과, 상기 반반사층 상에 감광막을 도포한 후 노광 및 현상하여 상기 측정 패턴을 에워쌀 뿐만 아니라 덮는 정렬 패턴을 형성하는 공정을 구비한다.According to an aspect of the present invention, there is provided a method of aligning a semiconductor device, the method including forming a measurement pattern on a scribe line around a device region on a substrate, and depositing a material layer on the substrate so that the measurement pattern is covered. And forming a semi-reflective layer by coating an organic material having a refractive index and transmittance similar to that of the photosensitive material with respect to the light on the material layer, and applying a photosensitive film on the semi-reflective layer, and then exposing and developing the measurement pattern. And forming a covering alignment pattern as well as surrounding.

이하, 첨부한 도면을 참조하여 본 발명을 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

제1a~c도는 종래 기술에 따른 반도체장치의 정렬 방법을 도시하는 공정도.1A to C are process drawings showing a semiconductor device alignment method according to the prior art.

제2a~c도는 본 발명에 따른 반도체장치의 정렬 방법을 도시하는 공정도.2A to 2C are process drawings showing the alignment method of the semiconductor device according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

21 : 기판 23 : 측정 패턴21 substrate 23 measurement pattern

25 : 물질층 27 : 반반사층25 material layer 27 antireflective layer

29 : 정렬 패턴29: alignment pattern

도 2a 내지 c는 본 발명에 따른 반도체장치의 정렬 방법을 도시하는 공정도이다.2A to C are process drawings showing the alignment method of the semiconductor device according to the present invention.

도 2a를 참조하면, 기판(21) 상에 패턴을 형성하기 위한 물질, 예를 들면, 불순물이 도핑된 다결정실리콘 또는 알루미늄 등의 금속과 같은 도전성 물질, 또는, 산화실리콘 등의 절연물질을 증착한다. 그리고, 패턴을 형성하기 위한 물질을 포토리쏘그래피 방법으로 패터닝하여 소자영역(도시되지 않음)에 패턴을 형성하면서 주변의 스크라이브 라인 상에 측정 패턴(33)을 형성한다.Referring to FIG. 2A, a material for forming a pattern on the substrate 21, for example, a conductive material such as a metal such as polycrystalline silicon or aluminum doped with impurities or an insulating material such as silicon oxide is deposited. . Then, the material for forming the pattern is patterned by a photolithography method to form a pattern in the device region (not shown), thereby forming the measurement pattern 33 on the surrounding scribe line.

도 2b를 참조하면, 소자영역 상의 패턴과 주변의 스크라이브 라인 상의 측정 패턴(23)이 덮혀지도록 기판(21) 상에 물질층(25)을 증착한 후, 이 물질층(25) 상에 반반사층(27)을 형성한다. 상기에서 물질층(25)을 불순물이 도핑된 다결정실리콘 또는 알루미늄 등의 금속과 같은 도전성 물질, 또는, 산화실리콘 등의 절연물질로 형성한다. 이 때, 물질층(25)을 측정 패턴(23)과 전기적 특성이 서로 다른 물질로 형성되어야 한다. 예를 들면, 측정 패턴(23)이 불순물이 도핑된 다결정실리콘 또는 알루미늄 등의 금속과 같은 도전성 물질로 형성되면 물질층(25)을 산화실리콘 등의 절연물질로 형성하고, 측정 패턴(23)이 산화실리콘 등의 절연물질로 형성되면 물질층(25)은 불순물이 도핑된 다결정실리콘 또는 알루미늄 등의 금속과 같은 도전성 물질로 형성한다. 또한, 측정 패턴(23)과 물질층(25)을 산화실리콘 등의 절연물질로 형성할 수도 있다. 그리고, 반반사층(27)은 광에 대하여 감광물질과 유사한 굴절률과 투과율을 갖는 유기물질로 형성한다.Referring to FIG. 2B, after depositing the material layer 25 on the substrate 21 to cover the pattern on the device region and the measurement pattern 23 on the surrounding scribe line, the antireflective layer on the material layer 25 is formed. (27) is formed. The material layer 25 is formed of a conductive material, such as a metal such as polycrystalline silicon or aluminum doped with impurities, or an insulating material such as silicon oxide. In this case, the material layer 25 should be formed of a material having a different electrical pattern from the measurement pattern 23. For example, when the measurement pattern 23 is formed of a conductive material such as polycrystalline silicon doped with impurities or a metal such as aluminum, the material layer 25 is formed of an insulating material such as silicon oxide, and the measurement pattern 23 is When formed of an insulating material such as silicon oxide, the material layer 25 is formed of a conductive material such as polycrystalline silicon doped with impurities or a metal such as aluminum. In addition, the measurement pattern 23 and the material layer 25 may be formed of an insulating material such as silicon oxide. The antireflective layer 27 is formed of an organic material having a refractive index and a transmittance similar to that of the photosensitive material with respect to light.

도 2c를 참조하면, 반반사층(27) 상에 감광막을 표면이 평탄하게 도포한 후 소자영역에 이 후의 패턴(도시되지 않음)을 형성하기 위해 물질층(25)을 식각 할 때 마스크로 사용하기 위해 노광 및 현상한다. 이 때, 주변의 스크라이브 라인의 감광막도 노광 및 현상하여 측정 패턴(23)을 에워쌀 뿐만 아니라 측정 패턴(23)을 덮는 정렬 패턴(29)을 형성한다. 이 때, 정렬 패턴(29)을 측정 패턴(23)의 측면에 경사지게 형성된 반반사층(27)의 상부를 덮도록 형성한다. 그러므로, 정렬 측정시 조사되는 광이 반반사층(27)의 측정 패턴(23)의 측면에 경사지게 형성된 부분에서 난반사되는 것을 방지한다.Referring to FIG. 2C, after the photoresist is evenly coated on the semi-reflective layer 27, it is used as a mask when etching the material layer 25 to form a subsequent pattern (not shown) in the device region. In order to expose and develop. At this time, the photosensitive film of the surrounding scribe line is also exposed and developed to form the alignment pattern 29 covering not only the measurement pattern 23 but also covering the measurement pattern 23. At this time, the alignment pattern 29 is formed so as to cover the upper portion of the semi-reflective layer 27 inclined on the side surface of the measurement pattern 23. Therefore, the light irradiated at the time of alignment measurement is prevented from being diffusely reflected at the part formed inclined at the side surface of the measurement pattern 23 of the semi-reflective layer 27.

따라서, 본 발명은 정렬 측정시 반사되는 광 신호에 노이즈가 발생을 억제하여 정렬 에러를 방지할 수 있는 잇점이 있다.Therefore, the present invention has the advantage that it is possible to prevent the occurrence of the alignment error by suppressing the occurrence of noise in the optical signal reflected during the alignment measurement.

Claims (5)

기판 상의 소자영역 주변의 스크라이브 라인 상에 측정 패턴을 형성하는 공정과, 상기 측정 패턴이 덮혀지도록 상기 기판 상에 물질층을 증착하는 공정과, 상기 물질층 상에 광에 대하여 감광물질과 유사한 굴절률과 투과율을 갖는 유기물질을 도포하여 반반사층을 형성하는 공정과, 상기 반반사층 상에 감광막을 도포한 후 노광 및 현상하여 상기 측정 패턴을 에워쌀 뿐만 아니라 덮는 정렬 패턴을 형성하는 공정을 구비하는 정렬 방법.Forming a measurement pattern on a scribe line around a device region on the substrate, depositing a layer of material on the substrate so that the measurement pattern is covered, and having a refractive index similar to that of a photosensitive material with respect to light on the material layer; Forming a semi-reflective layer by applying an organic material having a transmittance, and applying a photosensitive film on the semi-reflective layer, followed by exposure and development to form an alignment pattern covering not only the measurement pattern but also covering the measurement pattern. . 제1항에 있어서, 상기 측정 패턴 및 물질층을 불순물이 도핑된 다결정실리콘 또는 알루미늄 등의 금속과 같은 도전성 물질, 또는, 산화실리콘 등의 절연물질로 형성하는 정렬 방법.The alignment method according to claim 1, wherein the measurement pattern and the material layer are formed of a conductive material such as a metal such as polycrystalline silicon or aluminum doped with impurities, or an insulating material such as silicon oxide. 제2항에 있어서, 상기 측정 패턴과 물질층을 전기적 특성이 서로 다른 물질로 형성하는 정렬 방법.The alignment method of claim 2, wherein the measurement pattern and the material layer are formed of materials having different electrical properties. 제2항에 있어서, 상기 측정 패턴과 물질층을 절연물질로 형성하는 정렬 방법.The alignment method of claim 2, wherein the measurement pattern and the material layer are formed of an insulating material. 제1항에 있어서, 상기 정렬 패턴을 감광물질로 형성하는 정렬 방법.The method of claim 1, wherein the alignment pattern is formed of a photosensitive material.
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