KR0144643B1 - Fabrication method of polysilicon thin film by metal coating - Google Patents
Fabrication method of polysilicon thin film by metal coatingInfo
- Publication number
- KR0144643B1 KR0144643B1 KR1019940038136A KR19940038136A KR0144643B1 KR 0144643 B1 KR0144643 B1 KR 0144643B1 KR 1019940038136 A KR1019940038136 A KR 1019940038136A KR 19940038136 A KR19940038136 A KR 19940038136A KR 0144643 B1 KR0144643 B1 KR 0144643B1
- Authority
- KR
- South Korea
- Prior art keywords
- thin film
- silicon thin
- substrate
- amorphous
- polycrystalline silicon
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Abstract
본 발명은 다결정 규소박막의 제조방법에 관한 것이다. 좀더 구체적으로, 본 발명은비정질 규소박막에 금속을 흡착시켜 열처리함으로써, 낮은 온도에서 대면적의 다결정 규소박막을 경제적으로 제조할 수 있는 방법에 관한 것이다. 본 발명의 제조방법은 기판을 세척하고 LPCVD 또는 PECVD법에 의해 비정질 규소박막을 증착시키는 공정; 전기 공정에서 수득한 비정질 규소박막이 증착된 기판에 스핀코팅법으로 규소박막 상에 금속용액을 흡착시키는 공정; 및, 불활성가스 분위기 하에서 전기 공정에서 수득한 금속용액이 흡착된 규소박막을 450 내지 600℃의 온도에서 열처리하는 공정을 포함하며, 본 발명에 의해 종래의 방법보다 100℃ 이상 낮은 온도에서 다결정 규소박막을 제조할 수 있으므로, 석영 등의 고가의 기판 대신 저렴한 유리기판을사용할 수 있는 동시에 대면적의 다결정 규소박막을 경제적으로 제조할 수 있다는 것이 확인되었다.The present invention relates to a method for producing a polycrystalline silicon thin film. More specifically, the present invention relates to a method for economically manufacturing a large-area polycrystalline silicon thin film at a low temperature by adsorbing a metal to an amorphous silicon thin film and heat treatment. The manufacturing method of the present invention comprises the steps of washing the substrate and depositing an amorphous silicon thin film by LPCVD or PECVD; Adsorbing a metal solution on the silicon thin film by spin coating to a substrate on which the amorphous silicon thin film obtained in the above step is deposited; And heat-treating the silicon thin film to which the metal solution obtained in the electrical process is adsorbed under an inert gas atmosphere at a temperature of 450 to 600 ° C., and the polycrystalline silicon thin film at a temperature lower than 100 ° C. than the conventional method by the present invention. Since it can be produced, it was confirmed that an inexpensive glass substrate can be used in place of an expensive substrate such as quartz, and at the same time, a large area polycrystalline silicon thin film can be economically produced.
Description
제1도는 본 발명의 다결정 규소박막의 제조방법에 대한 공정도이다.1 is a process chart for the method for producing a polycrystalline silicon thin film of the present invention.
제2도는 본 발명에 의해 제조된 다결정 규소박막에 대한 X-선 그래프이다.2 is an X-ray graph of the polycrystalline silicon thin film produced by the present invention.
제3도는 종래의 방법에 의해 제조된 규소박막에 대한 X-선 그래프이다.3 is an X-ray graph of a silicon thin film produced by a conventional method.
본 발명은 다결정 규소박막의 제조방법에 관한 것이다. 좀더 구체적으로, 본 발명은 비정질 규소박막에 금속을 흡착시켜 열처리함으로써, 낮은 온도에서 대면적의 다결정 규소박막을 경제적으로 제조할 수 있는 방법에 관한 것이다.The present invention relates to a method for producing a polycrystalline silicon thin film. More specifically, the present invention relates to a method for economically manufacturing a large-area polycrystalline silicon thin film at a low temperature by adsorbing a metal to the amorphous silicon thin film and heat treatment.
최근, LCD용 TFT, SRAM용 TFT, 태양전지, SIO(silicon on insulator) 및 이미지센서(image sensor) 등과 같은 전자소자에 필수적인 다결정 규소박막의 수요가 증대함에 따라, 경제적으로 다결정 규소박막을 제조하기 위하여 비정질 규소박막을 저온에서 결정화시키려는 일련의 시도가 행하여져 왔으며, 이러한 종래의 기술에 대하여는 다음과 같은 문헌에 개시되어 있다.Recently, as the demand for polycrystalline silicon thin films essential for electronic devices such as TFTs for LCDs, TFTs for SRAMs, solar cells, silicon on insulators (SIOs), and image sensors has increased, economically manufacturing polycrystalline silicon thin films For this purpose, a series of attempts have been made to crystallize an amorphous silicon thin film at a low temperature, and this conventional technique is disclosed in the following literature.
일본국 특허공개 소 4-144122호 및 소 3-25633호에는 저압화학증착(low pressure chemical vapor deposition, LPCVD)법에 의하여 비정질 규소박막을 기판상에 증착시킨 다음, 약 600℃ 이상의 고온에서 열처리(annealing)하여 결정화함으로써 다결정 규소박막을 제조하는 방법이 개시되어 있다.Japanese Patent Application Laid-Open Nos. 4-144122 and 3-25633 disclose the deposition of an amorphous silicon thin film on a substrate by low pressure chemical vapor deposition (LPCVD), followed by heat treatment at a high temperature of about 600 ° C. or higher ( A method of producing a polycrystalline silicon thin film by annealing) to crystallize is disclosed.
인버슨(R. B. Inverson) 등은 LPCVD법 등의 증착방법으로 기판상에 다결정 규소박막을 증착시키고 이식(implanation)시켜 비정질화시킨 다음, 약 600℃에서 열처리하여 입자크기가 증가된 다결정 규소박막을 제조하는 방법을 개시하고 있다.[참조; R. B. Inverson et al, J. Appl. Phus., 65:1675(1987)].RB Inverson et al. Deposited polycrystalline silicon thin films on substrates by LPCVD method, implanted them, and then amorphized them, followed by heat treatment at about 600 ℃ to produce polycrystalline silicon thin films with increased particle size. The method of the present invention is disclosed. In R. B. Inverson et al, J. Appl. Phus., 65: 1675 (1987).
또한, 나카자와(Nakazawa) 등은 플라즈마화학증착(plasma enhance chemica l vapor deposition)법에 의해 Si2H6가스를 사용하여 비정질 규소 박막을 기판상에 증착시킨 다음, 약 600℃ 이상의 고온에서 열처리하여 다결정 규소박막을 제조하는 방법을 개시하고 있다.[참조: Nakazawa et al, J. Appl. Phys., 68(3):1029(1990)].In addition, Nakazawa et al. Deposited an amorphous silicon thin film on a substrate by using Si 2 H 6 gas by plasma enhance chemica l vapor deposition, and then heat-treated at a temperature of about 600 ° C. or higher to polycrystalline. A method for producing a silicon thin film is disclosed. See Nakazawa et al, J. Appl. Phys., 68 (3): 1029 (1990)].
그러나, 상기한 종래의 기술에서는 비정질 규소박막을 결정화시키기 위하여 600℃ 이상의 고온에서 열처리하였기 때문에 유리기판 등의 저렴한 기판을 사용할 수 없으므로 경제적으로 다결정 규소박막을 제조할수 없었고, 고가의 Si2H6가스를 사용하여 다결정 규소박막의 제조단가가 높아지며, 대면적의 규소박막을 제조할 수 없다는 문제점을 지니고 있었다.However, in the above-described conventional technique, since an inexpensive substrate such as a glass substrate cannot be used because it is heat-treated at a high temperature of 600 ° C. or higher to crystallize the amorphous silicon thin film, a polysilicon thin film cannot be manufactured economically, and expensive Si 2 H 6 gas The production cost of the polycrystalline silicon thin film was increased by using the, and had a problem that a large area silicon thin film could not be manufactured.
결국, 본 발명의 목적은 종래의 방법 보다 낮은 온도에서 비정질 규소박막을 열처리하고 Si2H6대신에 저가의 SiH4가스를 사용함으로써, 유리기판 등의 저가의 기판을 사용할 수 있는 동시에 대면적의 다결정 규소박막을 경제적으로 제조할 수 있는 방법을 제공함에 있다.As a result, an object of the present invention is to heat the amorphous silicon thin film at a lower temperature than the conventional method and to use a low-cost SiH 4 gas instead of Si 2 H 6 , so that a low-cost substrate such as a glass substrate can be used and a large area can be used. The present invention provides a method for economically manufacturing a polycrystalline silicon thin film.
본 발명의 발명자들은 유리와 같은 저가의 기판을 사용하여 대면적의 다결정 규소박막을 제조할 수 있는 방법을 개발하기 위하여 예의 연구를 거듭한 결과, 통상적인 증착방법으로 비정질 규소박막을 제조한 다음, 그 위에 금속용액을 스핀코팅(spin coating)법으로 흡착시키고 고상 결정화킴으로써, 종래기술보다 낮은 온도에서도 다결정 규소박막을 제조할 수 있다는 것을 발견하고, 본 발명을 완성하기에 이르렀다.본 발명의 제조방법에서는 통상적인 PECVD 및 LPCVD 등의 증착방법에 의하여 기판상에 비정질 규소박막을 증착시키고 스핀코터를 사용하여 100 내지 9,000rpm으로 회전시키면서 그 위에 10 내지 5,000ppm 농도의 금속용액을 흡착시킨 다음, 450 내지 600℃의 온도에서 열처리함으로써 비정질 규소박막을 고상 결정화시켜 다결정 규소박막을 제조한다.The inventors of the present invention intensively studied to develop a method for producing a large-area polycrystalline silicon thin film using a low-cost substrate such as glass, and as a result, prepared an amorphous silicon thin film by a conventional deposition method, By adsorbing a metal solution thereon by spin coating and solidifying crystallization, it was found that a polycrystalline silicon thin film can be produced even at a lower temperature than the prior art, and the present invention has been completed. In the method, an amorphous silicon thin film is deposited on a substrate by a conventional deposition method such as PECVD and LPCVD, and a metal coating solution having a concentration of 10 to 5,000 ppm is adsorbed thereon while rotating at 100 to 9,000 rpm using a spin coater, and then 450 The amorphous silicon thin film is subjected to a solid phase crystallization by heat treatment at a temperature of from about 600 ° C. to produce a polycrystalline silicon thin film.
이하, 본 발명의 제조방법을 공정별로 보다 상세히 설명하고자 한다.Hereinafter, the manufacturing method of the present invention will be described in more detail for each process.
[제1공정:비정질 규소박막의 증착][First Step: Deposition of Amorphous Silicon Thin Film]
기판을 황산으로 세척하고 세척된 기판을 LPCVD 또는 PECVD 챔버(chamber)에 넣어 기판을 예열시킨 다음, 비정질 규소박막을 증착시키고 규소박막을 황산과 불산의 혼합용액으로 세척한다. 이때, 기판으로는 유리판; 석영판; 실리콘 웨이퍼; SiO2, 질화규소, 실리콘 옥시니트리드 및 산화탄탈 등의 비정질 산화물이 피복된 유리판; 전기 비정질 산화물이 피복된 석영판; 및, 전기 비정질 산화물이 피복된 실리콘 웨이퍼 등을 사용하는 것이 바람직하다. PECVD법을 사용하여 비정질 규소박막을 증착시에는 SiH4, Si2H6또는 전기 가스를 Ar, He, H2또는 N2가스로 희석시킨 가스를 사용하는 것이 바람직하며, 보다 바람직하게는 SiH4를 사용한다. 이때 증착시 기판의 온도는 15 내지 600℃, 증착막의 두께는 수십Å 내지 수십㎛, 가스의 유속은 1 내지 500sccm, 고주파 전력량(RF power)은 1 내지 600W로 유지하는 것이바람직하다. 또한, LPCVD법을 사용하여 비정질 규소박막을 증착시에는 전기한 원료가스를 사용하는 것이 바람직하며, 증착시 기판의 온도는 480 내지 580℃, 가스의 유속은 100 내지 500sccm, 증착압력은 1 내지 100mTorr로 유지하는 것이 바람직하다.The substrate is washed with sulfuric acid and the washed substrate is placed in an LPCVD or PECVD chamber to preheat the substrate, an amorphous silicon thin film is deposited, and the silicon thin film is washed with a mixed solution of sulfuric acid and hydrofluoric acid. At this time, the substrate is a glass plate; Quartz plate; Silicon wafers; Glass plates coated with amorphous oxides such as SiO 2 , silicon nitride, silicon oxynitride and tantalum oxide; A quartz plate coated with an electrically amorphous oxide; And it is preferable to use the silicon wafer etc. which coat | covered the electric amorphous oxide. When the amorphous silicon thin film is deposited using PECVD, it is preferable to use SiH 4 , Si 2 H 6, or a gas diluted with an Ar, He, H 2, or N 2 gas, more preferably SiH 4. Use At this time, the temperature of the substrate during deposition is 15 to 600 ℃, the thickness of the deposited film is several tens of kPa to several tens of micrometers, the flow rate of the gas is 1 to 500sccm, RF power is preferably maintained at 1 to 600W. In addition, when the amorphous silicon thin film is deposited by using the LPCVD method, it is preferable to use the raw material gas. In the deposition, the substrate temperature is 480 to 580 ° C, the gas flow rate is 100 to 500 sccm, and the deposition pressure is 1 to 100 mTorr. Is preferably maintained.
[제2공정: 금속의 흡착 ][Step 2: Adsorption of Metals]
스핀코터를 사용하여 전기 공정으로 부터 수득한 비정질 규소박막이 증착된 기판을 회전시키면서, 그 위에 금속용액을 흡착시킨다. 이때, 금속용액으로는 구리(Cu) 또는 금(Au)을 1wt%의 질산 수용액에 용해시킨 10 내지 5,000ppm의 구리 용액 또는 금 용액을 사용하는 것이 바람직하다. 또한, 스핀코팅시 스핀코터의 회전속도는 100 내지 9,000rppm이 바람직하다.A spin coater is used to rotate the substrate on which the amorphous silicon thin film obtained from the electrical process is deposited, thereby adsorbing a metal solution thereon. At this time, it is preferable to use a 10 to 5,000 ppm copper solution or a gold solution in which copper (Cu) or gold (Au) is dissolved in a 1 wt% nitric acid solution. In addition, the rotational speed of the spin coater during spin coating is preferably 100 to 9,000 rpm.
[제3공정: 결정화][Step 3: Crystallization]
전기 공정으로부터 수득한 금속용액이 흡착된 규소박막을 아르곤 또는 질소 등의 불활성가스 분위기 하에서 450 내지 600℃의 온도에서 10 내지 30시간 동안 열처리하여 결정화시킴으로서, 본 발명의 다결정 규소박막을 제조한다. 상기한 본 발명의 제조방법에 대한 공정도를 제1도에 나타내었다.The polycrystalline silicon thin film of the present invention is prepared by crystallizing the silicon thin film obtained by the electrical process by heat treatment for 10 to 30 hours at a temperature of 450 to 600 ° C. under an inert gas atmosphere such as argon or nitrogen. The process diagram for the manufacturing method of the present invention described above is shown in FIG.
이하, 본 발명을 [실시예]에 의하여 보다 구체적으로 설명하고자 한다. 이들 [실시예]는 오로지 본 발명을 설명하기 위한 것으로 본 발명의 범위가 이들 [실시예]에 국한되지 않는다는 것은 당업계에서 통상의 지식을 가진 자에게 있어서 자명할 것이다.Hereinafter, the present invention will be described in more detail with reference to Examples. These [Examples] are only for explaining the present invention, and it will be apparent to those skilled in the art that the scope of the present invention is not limited to these [Examples].
[실시예 1]Example 1
SiO2가 피복된 SI 웨이퍼를 황산으로 세척하고 LPCD 챔버에 넣어 기판을 예열시킨다음, SiH4/H2가스를 사용하여 545℃의 증착온도, 350/400sccm의 SiH4/H2가스유속 및 50mTorr의 증착압력 하에서 비정질 규소박막을 1,500Å의 두께로 증착시키고 황산과 불산의 혼합용액으로 세척하였다. 스핀코터를 사용하여 비정질 규소박막의 께로 증착된 기판을 5,000의 회전속도로 회전시키면서, 그 위에 1wt%의 질산 수용액에 용해시킨 1,000ppm의 구리용액을 흡착시키고, 아르곤 분위기 하에서 525℃의 온도에서 20시간 동안 열처리하여 결정화시켜 다결정 규소박막을 제조하였다. 본 [실시예]에서 제조된 규소박막의 X-선 그래프를 제2도에 나타내었다. 제2도에서 알 수 있는 바와 같이, (111) 및 (220)의 결정화 방향이 뚜렷한 것으로부터 본 발명에 의해 다결정 규소박막이 제조되었음을 확인할 수 있었다.SiO 2 is cleaning the coated SI wafer with sulfuric acid and was put pre-heating the substrate to LPCD chamber then, SiH SiH 4 / H 2 gas flow rate of the evaporation temperature, 350 / 400sccm of 545 ℃ using 4 / H 2 gas and 50mTorr An amorphous silicon thin film was deposited to a thickness of 1,500 kPa under a deposition pressure of and washed with a mixed solution of sulfuric acid and hydrofluoric acid. Using a spin coater, the substrate deposited with the amorphous silicon thin film was rotated at a rotational speed of 5,000, and thereon, 1000 ppm of copper solution dissolved in 1 wt% of nitric acid solution was adsorbed thereon, and the mixture was heated at 20 ° C. at 525 ° C. under an argon atmosphere. Crystallized by heat treatment for a time to produce a polycrystalline silicon thin film. An X-ray graph of the silicon thin film prepared in [Example] is shown in FIG. As can be seen in FIG. 2, it was confirmed that the polycrystalline silicon thin film was produced according to the present invention because the crystallization directions of (111) and (220) were clear.
[비교예 1]Comparative Example 1
증착된 비정질 규소박막 상에 금속을 흡착시키지 않은 것을 제외하고는, 전기 [실시예 1]과 동일하게 실시하여 규소박막을 제조하였다. 본 [비교예]에서 제조된 규소박막의 X-선 그래프를 제3도에 나타내었다. 제2도의 그래프와 비교할 때, 제3도의 X-선 그래프에서는 결정화 방향에 대한 피크를 관찰할 수 없었다(56°부근의 (311) 피크는 기판 자체에 대한 피크임). 전기 [실시예] 및 [비교예]로부터 ,본 발명의 제조방법과 동일한 온도에서 비정질 규소박막을 열처리하여도 금속용액을 흡착시키지 않은 경우에는, 다결정 규소박막을 제조할 수 없음을 확인할 수 있었다.A silicon thin film was prepared in the same manner as in Example 1 except that no metal was adsorbed onto the deposited amorphous silicon thin film. An X-ray graph of the silicon thin film prepared in [Comparative Example] is shown in FIG. Compared with the graph of FIG. 2, the peak for the crystallization direction could not be observed in the X-ray graph of FIG. 3 ((311) peak near 56 ° is the peak for the substrate itself). From the above Examples and Comparative Examples, even when the amorphous silicon thin film was heat-treated at the same temperature as the production method of the present invention, it was confirmed that the polycrystalline silicon thin film could not be produced.
이상에서 상세히 설명하고 입증하였듯이, 본 발명에 의해 종래의 방법보다 100℃이상 낮은 온도에서 다결정 규소박막을 제조할 수 있으므로, 석영 등의 고가의 기판 대신 저렴한 유리기판을 사용할 수 있는 동시에 대면적의 다결정 규소박막을 경제적으로 제조할 수 있다는 것이 확인되었다.As described and demonstrated in detail above, since the present invention can produce a polycrystalline silicon thin film at a temperature lower than 100 ° C. compared with the conventional method, an inexpensive glass substrate can be used instead of an expensive substrate such as quartz and a large-area polycrystalline It has been confirmed that the silicon thin film can be produced economically.
Claims (6)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940038136A KR0144643B1 (en) | 1994-12-28 | 1994-12-28 | Fabrication method of polysilicon thin film by metal coating |
JP7339545A JPH08250423A (en) | 1994-12-28 | 1995-12-26 | Preparation of poly crystalline silicon |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940038136A KR0144643B1 (en) | 1994-12-28 | 1994-12-28 | Fabrication method of polysilicon thin film by metal coating |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960026120A KR960026120A (en) | 1996-07-22 |
KR0144643B1 true KR0144643B1 (en) | 1998-08-17 |
Family
ID=19404427
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940038136A KR0144643B1 (en) | 1994-12-28 | 1994-12-28 | Fabrication method of polysilicon thin film by metal coating |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPH08250423A (en) |
KR (1) | KR0144643B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100598291B1 (en) * | 2000-06-20 | 2006-07-07 | 주식회사 하이닉스반도체 | Method of forming a copper wiring in a semiconductor device |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5127101B2 (en) * | 2001-06-28 | 2013-01-23 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
KR20030007024A (en) * | 2001-07-11 | 2003-01-23 | 조진한 | A manufacturing method for monolayer/multilayer ultrathin films using spin coating |
KR101167998B1 (en) * | 2009-11-27 | 2012-07-26 | 주식회사 테라세미콘 | Apparatus for forming poly-crystalline silicon and method thereof |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02148774A (en) * | 1988-11-29 | 1990-06-07 | Kyocera Corp | Manufacture of optical sensor |
US5135886A (en) * | 1990-12-06 | 1992-08-04 | At&T Bell Laboratories | Integrated circuit fabrication utilizing amorphous layers |
DE59010916D1 (en) * | 1990-12-21 | 2000-11-30 | Siemens Ag | Process for the production of a smooth polycrystalline silicon layer doped with arsenic for highly integrated circuits |
JPH0555140A (en) * | 1991-08-22 | 1993-03-05 | Sharp Corp | Manufacture of polycrystalline silicon film |
JPH05182919A (en) * | 1992-01-07 | 1993-07-23 | Fujitsu Ltd | Manufacture of polycrytalline silicon thin film |
JPH05291149A (en) * | 1992-04-13 | 1993-11-05 | Canon Inc | Plasma cvd device |
JPH06244103A (en) * | 1993-02-15 | 1994-09-02 | Semiconductor Energy Lab Co Ltd | Manufacture of semiconductor |
JP3190483B2 (en) * | 1993-05-21 | 2001-07-23 | 株式会社半導体エネルギー研究所 | Semiconductor device manufacturing method |
JP3450376B2 (en) * | 1993-06-12 | 2003-09-22 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP4141508B2 (en) * | 1993-12-03 | 2008-08-27 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP3418647B2 (en) * | 1994-12-09 | 2003-06-23 | 株式会社半導体エネルギー研究所 | Semiconductor device manufacturing method and crystal growth promoter |
-
1994
- 1994-12-28 KR KR1019940038136A patent/KR0144643B1/en not_active IP Right Cessation
-
1995
- 1995-12-26 JP JP7339545A patent/JPH08250423A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100598291B1 (en) * | 2000-06-20 | 2006-07-07 | 주식회사 하이닉스반도체 | Method of forming a copper wiring in a semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
KR960026120A (en) | 1996-07-22 |
JPH08250423A (en) | 1996-09-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100412743B1 (en) | Method of manufacturing thin-film transistor | |
JP2005101650A (en) | Forming method of ferroelectric memory circuit | |
JPH0878691A (en) | Method and apparatus for processing gate insulating film | |
US7557375B2 (en) | Method for fabricating crystalline silicon | |
US5470619A (en) | Method of the production of polycrystalline silicon thin films | |
US5387542A (en) | Polycrystalline silicon thin film and low temperature fabrication method thereof | |
JPS63133650A (en) | Method of forming silicide adhesive layer on polycrystalline silicon layer | |
JPH10247723A (en) | Manufacture of semiconductor device capacitor | |
KR0144643B1 (en) | Fabrication method of polysilicon thin film by metal coating | |
US6703289B2 (en) | Method for forming crystalline silicon layer and crystalline silicon semiconductor device | |
JPH08125197A (en) | Method and system for fabricating semiconductor device | |
KR19990013304A (en) | How to crystallize amorphous membrane | |
KR100469503B1 (en) | How to crystallize amorphous film | |
JP3125931B2 (en) | Semiconductor fabrication method | |
JPH0828509B2 (en) | Method of forming active region of thin film transistor | |
JPH0878695A (en) | Method of processing gate insulation film and device for processing gate insulation film | |
JPH0722130B2 (en) | Silicon thin film and method for producing the same | |
JPH0855995A (en) | Semiconductor device and its manufacture | |
JPH1131791A (en) | Electrode structure with bi laminar ferroelectric thin film, manufacture thereof, and ferroelectric thin film memory device | |
JP2000182957A5 (en) | ||
RU1389603C (en) | Method of manufacturing metallization of integral circuits | |
JP2592984B2 (en) | Manufacturing method of silicon thin film | |
KR100786801B1 (en) | The method for fabricating high-quality polycrystalline silicon thin films by applying the epitaxial silicon layer and electronic device comprising the same | |
JP3445573B2 (en) | Semiconductor device | |
JP2001196311A (en) | Manufacturing method of polycrystalline semiconductor thin film using metal catalyst |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20020328 Year of fee payment: 5 |
|
LAPS | Lapse due to unpaid annual fee |