KR0129192B1 - Patterning method of semiconductor device - Google Patents

Patterning method of semiconductor device

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Publication number
KR0129192B1
KR0129192B1 KR1019890003219A KR890003219A KR0129192B1 KR 0129192 B1 KR0129192 B1 KR 0129192B1 KR 1019890003219 A KR1019890003219 A KR 1019890003219A KR 890003219 A KR890003219 A KR 890003219A KR 0129192 B1 KR0129192 B1 KR 0129192B1
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South Korea
Prior art keywords
photoresist
pattern
metal layer
energy
coated
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KR1019890003219A
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Korean (ko)
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KR900015267A (en
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허훈
박근원
김승운
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문정환
금성 일렉트론 주식회사
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Priority to KR1019890003219A priority Critical patent/KR0129192B1/en
Publication of KR900015267A publication Critical patent/KR900015267A/en
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Publication of KR0129192B1 publication Critical patent/KR0129192B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

A forming method of a sloped pattern of semiconductor devices is disclosed. The method comprises the steps of: spin-coating a photoresist(51); soft-baking the coated photoresist(51); exposing the photoresist through a reticle(52); hard-baking the resultant structure; and applying an exposing energy to the surface of the photoresist(51) in the vertical direction to the photoresist, wherein the exposing energy is more than 30 percents that of the critical energy of the photoresist profile, thereby forming a negatively sloped pattern.

Description

반도체 소자의 패턴 형성방법Pattern formation method of semiconductor device

제1도의 (a) 내지 (h)는 일반적인 패턴의 형성과정을 보인 설명도.(A) to (h) of FIG. 1 are explanatory diagrams showing a process of forming a general pattern.

제2도의 (a) 내지 (f)는 본 발명의 패턴 형성과정을 보인 설명도.Figure 2 (a) to (f) is an explanatory diagram showing a pattern formation process of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

51 : 포토레지스트 52 : 레티클51: photoresist 52: reticle

53 : 패턴 54 : 금속층53 pattern 54 metal layer

본 발명은 반도체 소자의 금속층 증착을 위한 패턴의 형성공정에 관한 것으로, 특히 이미지 리버설 포토레지스트를 이용하여 Al과 같은 메탈 인터커넥션에 적당하도록한 반도체소자의 패턴 형성방법에 관한 것이다. 일반적으로 금속층의 에칭 처리공정없이 메탈 인터커넥션을 가능케하기 위한 패턴의 처리공정은, 선택적인 금속층 증착을 위해 포토레지스터를 이용하여 패턴이 부경사(Negative Slope)지게 하여 금속층을 증착하고, 이어서 고온의 아세톤이나 솔벤트에 시편을 담금질시켜 금속층이 팽창되게 함으로써 특정부위에 원하는 패턴의 금속층 증착이 이루어지게 되어 있었다.The present invention relates to a process for forming a pattern for depositing a metal layer of a semiconductor device, and more particularly, to a method for forming a pattern of a semiconductor device suitable for metal interconnection such as Al using an image reversal photoresist. In general, a pattern processing process for enabling metal interconnection without etching the metal layer is performed by depositing a metal layer by using a photoresistor to allow a negative slope of the pattern for selective metal layer deposition, followed by high temperature. By quenching the specimen in acetone or solvent to expand the metal layer was deposited to a specific pattern of metal layer on a specific site.

이러한 부경사의 포토레지스터 패턴을 얻기 위해서는 제1도의 (a)~(h)와 같은 방법이 사용된다. 단일층의 포토레지스터 처리공정은 (a)와 같이 포토레지스트(2)가 코팅되고, 클로로벤젠(1)에 디핑(Dipping)후 노과시키면, 클로로벤젠(1)의 확산 구배가 형성되며, 이것이 현상(Develop)되어 (b)와 같이 부경사진 패턴(3)이 얻어지고, 이 상부에 금속층(4)이 증착되었다. 또 (c)와 같이 같은 종류의 포토레지스트를 두번 코팅후 디벨로퍼 솔로빌리티(Developer Solubility)의 차이를 이용해서 부경사진 형태의 패턴(12a)(12b)이 이루어지고, 이어서 (d)와 같이 금속층(13)이 증착되었다. 또, (e)와 같이 포토레지스트(21a)가 코팅되고 그 상부에 100-200Å 정도의 Al 금속층(22)이 도포되며, 다시 그 상부에 상기 포토레지스트(21a)와 동질의 포토레지스트(21b)가 코팅되어 이 포토레지스트(21b)가 현상된 후 그 금속층(22)이 에칭된다. 이후 상기 포토레지스트(21a)가 현상되면 (f)와 같이 부경사진 형태의 패턴(23)이 이루어진다.In order to obtain such a subsidiary photoresist pattern, a method similar to those of (a) to (h) in FIG. 1 is used. In the single layer photoresist treatment process, the photoresist 2 is coated as shown in (a), and when the chlorobenzene 1 is subjected to dipping after dipping, a diffusion gradient of chlorobenzene 1 is formed. (Develop) to obtain the inclined pattern 3 as shown in (b), and the metal layer 4 was deposited on this. In addition, after coating the same type of photoresist twice as shown in (c), patterns 12a and 12b in the form of inclined are formed using the difference in developer solubility, followed by the metal layer (d) as shown in (d). 13) was deposited. In addition, as shown in (e), the photoresist 21a is coated, and an Al metal layer 22 having a thickness of about 100-200 상부 is applied on the upper portion thereof, and again, the photoresist 21b of the same quality as the photoresist 21a on the upper portion thereof. Is coated to develop the photoresist 21b and then the metal layer 22 is etched. Thereafter, when the photoresist 21a is developed, a pattern 23 having an inclined shape is formed as shown in (f).

끝으로, (g)와 같이 두 종류의 상이한 포토레지스트(31a)(31b)가 각기 코팅되고, 이어서 그 포토레지스트(31a)(31b)가 현상되는데, 이 때 하측 포토레지스트(31a)의 현상비율(Develop Rate)이 상측 포토레지슨트(31b)의 현상비율보다 더 클 경우 (아)와 같이 부경사진 형태의 패턴(32)이 얻어진다. 그러나 이와같은 처리공정은 그 과정이 복잡할뿐더러 포토레지스트간의 인터믹싱(Intermixing)이 발생되어 정확도가 높은 금속층 증착이 어렵게 되는 문제점이 있었다.Finally, as shown in (g), two different photoresists 31a and 31b are coated respectively, and then the photoresists 31a and 31b are developed, at which time the development ratio of the lower photoresist 31a is developed. When (Develop Rate) is larger than the developing ratio of the upper photoresist 31b, a pattern 32 in the form of a subtilt is obtained as shown in (H). However, such a process has a problem that the process is not only complicated, but also intermixing between photoresist occurs, making it difficult to deposit metal layers with high accuracy.

본 발명은 이와같은 문제점을 해결하기 위하여 에칭 과정없이 단일층의 포토레지스트로 부경사진 형태의 패턴을 얻을 수 있는 패턴형성방법을 창안한 것으로 이를 첨부한 제2도의 (a)-(f)를 참조하여 설명하면 다음과 같다.In order to solve this problem, the present invention has been devised a pattern forming method for obtaining a pattern of a sub-sloped form with a single layer of photoresist without etching. Refer to (a)-(f) of FIGS. The description is as follows.

먼저 (a)와 같이 이미지리버설 포토레지스트(51)를 코팅하여 소프트베이크(Soft Bake) 처리를 하게 되는데,이 이미지리버설 포토레지스트(51)는 일반적인 포토레지스트와 달리 포지티브(Positive)와 네가티브 톤(Negative Tone)을 함께 가지고 있는 포토레지스터이며, 베이크(bake) 또는 노출(Expose)에 의해 톤을 결정한다. 또한 (a)스텝의 리버스 베이크는 노광된 포토레지스트(51)의 톤을 네가티브로 바꾸어주는 베이크처리이다.First, as shown in (a), the image reversal photoresist 51 is coated to perform a soft bake process. Unlike the general photoresist, the image reversal photoresist 51 has a positive and negative tone. It is a photoresist with Tone, and its tone is determined by bake or exposure. The reverse bake in step (a) is a bake process that changes the tone of the exposed photoresist 51 to negative.

이어서, (b)와 같이 코팅된 포토레지스트(51)를 레티클(Reticle)(52)을 통해 보광시킨 후 리버스(Reverse)베이크 처리를 한다. 또, (c)와 같이 리버스 베이크처리된 포토레지스트(51)를 자외선(U, V)에 노출시키는데, 여기서 하이 애스펙트(High Aspect)(≒1)를 나타내는 임계치의 노광에너지보다 적은 노광에너지를 인가하면 스컴(Scum)이 존재하게 되지만, 임계치 이상의 노광에너지를 인가하게 되면 그 에너지량에 따라 네가티브 슬로프 프로파일을 나타내기 시작한다. 즉, 가장 수직적으로 포토레지스트 프로파일을 나타내는 임계치 에너지보다 약 30% 이상의 과도에너지를 인가한 후 현상하면 (d)와 같이 부경사진 형태의 패턴(53)이 얻어진다.Subsequently, the photoresist 51 coated as shown in (b) is light-retained through the reticle 52 and then reverse baked. In addition, as shown in (c), the reverse-baked photoresist 51 is exposed to ultraviolet rays U and V, where an exposure energy of less than a threshold exposure energy indicating a high aspect X1 is applied. When the cumcum (Scum) is present, if the exposure energy of the threshold value or more is applied, the negative slope profile starts to appear according to the amount of energy. That is, when the excessive energy of about 30% or more than the threshold energy representing the photoresist profile is applied vertically and then developed, a pattern 53 having a negatively inclined shape is obtained as shown in (d).

이어서 (e)와 같이 금속층(54)을 증착하여 (f)와 같이 그 패턴(53)을 들어냄으로써 금속층(53)의 증착공정을 완료한다.Subsequently, the deposition of the metal layer 53 is completed by depositing the metal layer 54 as shown in (e) and lifting the pattern 53 as shown in (f).

이상에서 상세히 설명한 바와같이, 본 발명은 단일층의 포토레지스터로 부경사진 형태의 패턴을 형성시킴으로써 패턴의 형성공정을 단축시키고 스텝이 많이 존재하는 표면에 후막상태의 금속층을 선택적으로 증착시킬 수 있는 이점이 있다.As described in detail above, the present invention shortens the pattern forming process by forming a pattern in the form of an inclined form with a single layer photoresist and selectively deposits a thick metal layer on a surface having many steps. There is this.

Claims (1)

이미지리버설포토레지스터(51)를 코팅하여 소프트베이크 처리를 하고, 이어서 레티클(52)을 통해 노광시킴과 아울러 베이크 처리를 하며, 이후 그 이미지리버설포토레지스트(51) 상부에 투사시키는 노광에너지를 가장 수직적으로 포토레지스트 프로파일을 나타내는 임계치 에너지보다 약 30% 이상 인가한 후 리버설 베이크와 플루드 익스포스를 통해 부(-)경사진 패턴을 이용하여 메탈 리프트 오프 기술에 응용하는 반도체 소자의 패턴 형성방법.The image reversal photoresist 51 is coated and subjected to a soft bake treatment, and then exposed through a reticle 52 and baked. Then, the exposure energy projected onto the image reversal photoresist 51 is most vertical. And applying about 30% or more of the threshold energy representing the photoresist profile to the metal lift-off technique using a negative inclined pattern through reversal bake and flood exposure.
KR1019890003219A 1989-03-15 1989-03-15 Patterning method of semiconductor device KR0129192B1 (en)

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KR1019890003219A KR0129192B1 (en) 1989-03-15 1989-03-15 Patterning method of semiconductor device

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KR1019890003219A KR0129192B1 (en) 1989-03-15 1989-03-15 Patterning method of semiconductor device

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KR900015267A KR900015267A (en) 1990-10-26
KR0129192B1 true KR0129192B1 (en) 1998-04-07

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