JPS648647A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS648647A
JPS648647A JP62162273A JP16227387A JPS648647A JP S648647 A JPS648647 A JP S648647A JP 62162273 A JP62162273 A JP 62162273A JP 16227387 A JP16227387 A JP 16227387A JP S648647 A JPS648647 A JP S648647A
Authority
JP
Japan
Prior art keywords
bump
electrode
paste
recess
coated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62162273A
Other languages
Japanese (ja)
Inventor
Michihiko Inaba
Nobuo Iwase
Satoshi Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62162273A priority Critical patent/JPS648647A/en
Publication of JPS648647A publication Critical patent/JPS648647A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13011—Shape comprising apertures or cavities, e.g. hollow bump
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13012—Shape in top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13016—Shape in side view
    • H01L2224/13018—Shape in side view comprising protrusions or indentations
    • H01L2224/13019—Shape in side view comprising protrusions or indentations at the bonding interface of the bump connector, i.e. on the surface of the bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/13076—Plural core members being mutually engaged together, e.g. through inserts

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To directly form a bump on an electrode without base metal by forming a recess on the bump, feeding conductive paste which contains as a main ingredient at least one of Cu, Ag and Au therein, aligning the bump with the electrode, then bonding it to the electrode, and thereafter curing the paste to bond a semiconductor chip to a substrate. CONSTITUTION:The depth of a recess 20 is required to be 1/10 or higher of the height of a bump. Its size is desired to be 1/2 or less by calculating it with its remaining area. The center of an electrode is coated in advance with resist so as not to bond an Au-plating or Cu-plating. After it is Au-plated to form the bump, a recess may be formed by pressing. Then, a chip 1 with a bump 4 is placed on a substrate 7 uniformly coated with paste 6. After it is coated with the paste, the bump is etched or wiped to remove the remaining paste. Thereafter, the electrode 2 of the chip 1 is aligned to the electrode 8 of a lead 9, and bonded.
JP62162273A 1987-07-01 1987-07-01 Manufacture of semiconductor device Pending JPS648647A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62162273A JPS648647A (en) 1987-07-01 1987-07-01 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62162273A JPS648647A (en) 1987-07-01 1987-07-01 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS648647A true JPS648647A (en) 1989-01-12

Family

ID=15751329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62162273A Pending JPS648647A (en) 1987-07-01 1987-07-01 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS648647A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0521523A (en) * 1991-07-17 1993-01-29 Matsushita Electric Works Ltd Semiconductor device mounting substrate
EP0863426A1 (en) * 1997-03-06 1998-09-09 Sharp Kabushiki Kaisha Liquid crystal display device
JPH11126793A (en) * 1997-10-24 1999-05-11 Matsushita Electric Ind Co Ltd Mounting body and its manufacture
US6137063A (en) * 1998-02-27 2000-10-24 Micron Technology, Inc. Electrical interconnections
US6879027B2 (en) * 2000-11-30 2005-04-12 Kabushiki Kaisha Shinkawa Semiconductor device having bumps
US7735713B2 (en) * 2005-12-21 2010-06-15 Tdk Corporation Method for mounting chip component and circuit board
JP2017034031A (en) * 2015-07-30 2017-02-09 シチズン電子株式会社 Semiconductor element and light-emitting device
JP2019004064A (en) * 2017-06-16 2019-01-10 ウシオオプトセミコンダクター株式会社 Multi-beam semiconductor laser element and multi-beam semiconductor laser device

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0521523A (en) * 1991-07-17 1993-01-29 Matsushita Electric Works Ltd Semiconductor device mounting substrate
EP0863426A1 (en) * 1997-03-06 1998-09-09 Sharp Kabushiki Kaisha Liquid crystal display device
US6111628A (en) * 1997-03-06 2000-08-29 Sharp Kabushiki Kaisha Liquid crystal display device including plural bump electrodes
JPH11126793A (en) * 1997-10-24 1999-05-11 Matsushita Electric Ind Co Ltd Mounting body and its manufacture
US6137063A (en) * 1998-02-27 2000-10-24 Micron Technology, Inc. Electrical interconnections
US6355504B1 (en) 1998-02-27 2002-03-12 Micron Technology, Inc. Electrical interconnections, methods of conducting electricity, and methods of reducing horizontal conductivity within an anisotropic conductive adhesive
US6365842B1 (en) 1998-02-27 2002-04-02 Micron Technology, Inc. Electrical circuits, circuits, and electrical couplings
US6579744B1 (en) 1998-02-27 2003-06-17 Micron Technology, Inc. Electrical interconnections, methods of conducting electricity, and methods of reducing horizontal conductivity within an anisotropic conductive adhesive
US6879027B2 (en) * 2000-11-30 2005-04-12 Kabushiki Kaisha Shinkawa Semiconductor device having bumps
US7735713B2 (en) * 2005-12-21 2010-06-15 Tdk Corporation Method for mounting chip component and circuit board
JP2017034031A (en) * 2015-07-30 2017-02-09 シチズン電子株式会社 Semiconductor element and light-emitting device
JP2019004064A (en) * 2017-06-16 2019-01-10 ウシオオプトセミコンダクター株式会社 Multi-beam semiconductor laser element and multi-beam semiconductor laser device

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