JPS648309B2 - - Google Patents

Info

Publication number
JPS648309B2
JPS648309B2 JP55045145A JP4514580A JPS648309B2 JP S648309 B2 JPS648309 B2 JP S648309B2 JP 55045145 A JP55045145 A JP 55045145A JP 4514580 A JP4514580 A JP 4514580A JP S648309 B2 JPS648309 B2 JP S648309B2
Authority
JP
Japan
Prior art keywords
measurement range
switch
analog
switch circuit
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55045145A
Other languages
Japanese (ja)
Other versions
JPS56141564A (en
Inventor
Fujinao Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DIC Corp
Original Assignee
Dainippon Ink and Chemicals Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dainippon Ink and Chemicals Co Ltd filed Critical Dainippon Ink and Chemicals Co Ltd
Priority to JP4514580A priority Critical patent/JPS56141564A/en
Publication of JPS56141564A publication Critical patent/JPS56141564A/en
Publication of JPS648309B2 publication Critical patent/JPS648309B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
    • G01R15/08—Circuits for altering the measuring range
    • G01R15/09—Autoranging circuits

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)

Description

【発明の詳細な説明】 本発明は重合度計など広範囲な導電率等の変化
を測定する場合の測定レンジを自動的に設定する
回路の改良に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a circuit that automatically sets a measurement range when measuring changes in conductivity over a wide range, such as with a polymerization degree meter.

樹脂の重合反応の程度を反応物の導電率の測定
により計測する重合度計では導電率の変化がたと
えば100倍以上の広範囲に亘りしかも測定精度も
要求されている。このため、計測に当つては測定
レンジをたとえば０〜0.5μv／cm（第１測定レン
ジと称す）、０〜0.1μv／cm（第２測定レンジと称
す）、０〜0.02μv／cm（第３測定レンジと称す）、
０〜0.004μv／cm（第４測定レンジと称す）の如
く数種類に分け、重合反応程度に応じて好適な測
定レンジを切換えている。具体的には重合反応が
進行すると導電率が低くなるため第１図に示すよ
うに、測定出力が第１測定レンジ、第２測定レン
ジ、および第３測定レンジで20％すなわち
0.1μv／cm、0.02μv／cm、および0.004μv／cm以下
になると１ステツプ低い測定レンジすなわち第２
測定レンジ、第３測定レンジ、および第４測定レ
ンジに移行させるのである。この測定レンジを切
換えるための回路を第２図に示す。この第２図に
おいて、スイツチ回路１内に備えられた４個のア
ナログスイツチ１ａ〜１ｄは４ステツプの測定レ
ンジに対応し、このアナログスイツチ１ａ〜１ｄ
には導電率計の出力である基準化された信号が入
力される。一方、アナログスイツチ１ａ〜１ｄの
共通出力端は出力端子が逆相入力端子に直接帰還
されたバツフアアンプ２の正相入力端子に接続さ
れる。バツフアアンプ２の出力は比較的３の逆相
入力端子に接続され、この比較器３の正相入力端
子には各測定レンジの20％に該当する電圧E0が
理想的な値として加えられる。比較器３の出力は
一入力端がクロツク（CLOCK）に接続された
ANDゲート４の他入力端に接続され、ANDゲー
ト４の出力はカウンタ５に接続される。また、バ
ツフアアンプ２の出力は比較器６の正相入力端子
に接続され、この比較器６の逆相入力端子には各
測定レンジの100％に該当する電圧E1が加えられ
る。比較器６の出力がリセツト端子に接続される
カウンタ５はクロツクの計数により４個の出力端
子が順にHighレベルになり、４番目の出力端子
はCLOCK ENABLE端子にも接続されて４番目
の出力端子がHighレベルとなるクロツクが入力
しても出力は変化しない。４個の出力端子はスイ
ツチ回路１の４個のアナログスイツチ１ａ〜１ｄ
に対応しており、カウンタ５の４出力がアナログ
スイツチ１ａ〜１ｄのコントロール端子に入力さ
れて、Highレベルになると対応するアナログス
イツチがオンし測定レンジが切換えられることに
なる。 In a polymerization degree meter that measures the degree of polymerization reaction of a resin by measuring the conductivity of the reactant, the conductivity changes over a wide range of, for example, 100 times or more, and measurement accuracy is also required. For this reason, during measurement, the measurement ranges are, for example, 0 to 0.5μv/cm (referred to as the first measurement range), 0 to 0.1μv/cm (referred to as the second measurement range), and 0 to 0.02μv/cm (referred to as the second measurement range). 3 measurement range),
It is divided into several types such as 0 to 0.004 μv/cm (referred to as the fourth measurement range), and a suitable measurement range is switched depending on the degree of polymerization reaction. Specifically, as the polymerization reaction progresses, the electrical conductivity decreases, so as shown in Figure 1, the measurement output decreases by 20% in the first measurement range, second measurement range, and third measurement range.
Below 0.1 μv/cm, 0.02 μv/cm, and 0.004 μv/cm, the measurement range is one step lower, that is, the second
The measurement range is shifted to the measurement range, the third measurement range, and the fourth measurement range. A circuit for switching this measurement range is shown in FIG. In FIG. 2, four analog switches 1a to 1d provided in the switch circuit 1 correspond to a four-step measurement range.
A standardized signal, which is the output of the conductivity meter, is input to . On the other hand, the common output terminals of the analog switches 1a to 1d are connected to the positive phase input terminal of a buffer amplifier 2 whose output terminal is directly fed back to the negative phase input terminal. The output of the buffer amplifier 2 is connected to the negative phase input terminal of the comparator 3, and a voltage E 0 corresponding to 20% of each measurement range is applied to the positive phase input terminal of the comparator 3 as an ideal value. One input terminal of the output of comparator 3 is connected to the clock (CLOCK).
It is connected to the other input terminal of AND gate 4, and the output of AND gate 4 is connected to counter 5. Further, the output of the buffer amplifier 2 is connected to the positive phase input terminal of the comparator 6, and the voltage E1 corresponding to 100% of each measurement range is applied to the negative phase input terminal of the comparator 6. The output of the comparator 6 is connected to the reset terminal of the counter 5, and the four output terminals of the counter 5 are set to high level in sequence by counting the clock, and the fourth output terminal is also connected to the CLOCK ENABLE terminal, so that the fourth output terminal becomes the high level. The output does not change even if a clock with high level is input. The four output terminals are the four analog switches 1a to 1d of the switch circuit 1.
The four outputs of the counter 5 are input to the control terminals of the analog switches 1a to 1d, and when they reach the high level, the corresponding analog switches are turned on and the measurement range is switched.

重合反応の初めには比較器６の正相入力端子へ
の電圧値が電圧E0より高くカウンタ５がリセツ
トされてアナログスイツチ１ａがオンされる。そ
して、重合反応の進行により第１測定レンジから
第２測定レンジに該当するアナログスイツチ１
ｂ、第２測定レンジから第３測定レンジに該当す
るアナログスイツチ１ｃ、および第３測定レンジ
から第４測定レンジに該当するアナログスイツチ
１ｄという具合に順に切換えられるが、この判別
は比較器３の逆相入力端子への電圧値が正相入力
端子への電圧E0より小さくなるとき行なわれ、
ANDゲート４からのクロツク出力によりカウン
タ５の計数が開始する。次のアナログスイツチの
オンにて次のステツプの測定レンジが切換えられ
ると比較器３の逆相入力端子への電圧値が電圧
E0より大きくなり、その測定レンジで20％にな
るまでそのままの状態が保持される。第４測定レ
ンジではCLOCK ENABLEの接続により20％以
下になつてもそのままの状態が保持される。 At the beginning of the polymerization reaction, the voltage value to the positive phase input terminal of the comparator 6 is higher than the voltage E0 , the counter 5 is reset, and the analog switch 1a is turned on. Then, as the polymerization reaction progresses, the analog switch 1 is switched from the first measurement range to the second measurement range.
b, analog switch 1c corresponding to the second measurement range to the third measurement range, analog switch 1d corresponding to the third measurement range to the fourth measurement range, and so on. Performed when the voltage value to the phase input terminal becomes smaller than the voltage E 0 to the positive phase input terminal,
Counter 5 starts counting by the clock output from AND gate 4. When the measurement range of the next step is changed by turning on the next analog switch, the voltage value to the negative phase input terminal of comparator 3 changes to
E becomes greater than 0 and remains that way until it reaches 20% in that measurement range. In the 4th measurement range, by connecting CLOCK ENABLE, the current state is maintained even if it drops below 20%.

以上第２図にて従来の回路例を説明した。かか
る回路においては測定レンジの切換が20％になつ
た時点で行われるのであるが、各測定レンジ相互
間に生ずる直線性の違いによる誤差、温度変動に
よる誤差等のために各測定レンジにおける20％の
値は次のステツプの測定レンジでは100％以上に
なる場合が生ずる。このため最悪の場合には指針
が振り切れてしまうことも起こる。したがつて、
この振り切れ防止のため実際上電圧E0の値を20
％でなく15％に該当する値に設定しているが、こ
の場合今度測定レンジの切換えが理想的で正常に
切換わると次の測定レンジでは最大75％の範囲し
か使用できなくなり、第１測定レンジを除いて75
％〜100％の間は使用できないこととなる。この
一部使用できないことはその分無駄を生ずるもの
であるが、そればかりでなく誤差を考えるとき通
常各測定レンジともフルスケールに対する誤差が
規定されるので、出力が小さな程読み取り値に対
する誤差が大きくなり、よつて75％〜100％の範
囲が使用できないと実質的に読み取り値に対する
誤差が大きくなる。 The conventional circuit example has been described above with reference to FIG. In such a circuit, switching of measurement ranges is performed when the measurement range reaches 20%, but due to errors due to linearity differences between measurement ranges, errors due to temperature fluctuations, etc. The value of may exceed 100% in the measurement range of the next step. Therefore, in the worst case, the guideline may deviate. Therefore,
In order to prevent this swing-out, the value of voltage E 0 is actually set to 20
The setting is set to a value corresponding to 15% instead of %, but in this case, if the next measurement range is ideally switched and is successfully switched, the next measurement range will only be able to use a maximum of 75%, and the first measurement range will be 15%. 75 excluding microwave
It cannot be used between % and 100%. Not being able to use some of these results in a corresponding amount of waste, but when considering errors, the error relative to the full scale is usually specified for each measurement range, so the smaller the output, the greater the error in the reading value. Therefore, if the range of 75% to 100% cannot be used, the error in the reading value will substantially increase.

そこで、本発明は上述の欠点に鑑み、出力の振
り切れを防止すると同時に各測定レンジ共100％
の範囲の使用を行なつて誤差をできるだけ小さく
した測定レンジ設定回路の提供を目的とし、現在
使用している測定レンジの次のステツプの測定レ
ンジの100％を検出して測定レンジを切換えると
いう新規な着想に基づき発明されたものである。 Therefore, in view of the above-mentioned drawbacks, the present invention prevents the output from swinging out, and at the same time provides 100% accuracy in each measurement range.
The aim is to provide a measurement range setting circuit that minimizes the error by using the current measurement range, and is a new method that switches the measurement range by detecting 100% of the measurement range of the next step of the currently used measurement range. It was invented based on this idea.

この目的を達成するための本発明の構成は、２
個のスイツチ回路夫々に備えられた複数のアナロ
グスイツチのうち各スイツチ回路の相対応する上
記アナログスイツチをカウンタの計数にて同時に
制御し、一方のスイツチ回路の上記アナログスイ
ツチには複数の測定レンジに対応する信号線を個
別に接続し、上記一方のスイツチ回路のアナログ
スイツチに相対応する他方のスイツチ回路の上記
アナログスイツチには上記一方のスイツチ回路に
係る上記信号線に対し一ステツプ低い測定レンジ
に該当する信号線を個別に接続し、上記他方のス
イツチ回路の共通出力線を比較器の一入力端子に
接続し、上記比較器の他の入力端子には上記複数
の測定レンジの100％に該当する基準電圧を接続
し、上記一入力端子が上記基準電圧以下になると
き上記比較器の出力にてクロツクを上記カウンタ
に入力したことを特徴とする。 The configuration of the present invention to achieve this objective is as follows:
Of the plurality of analog switches provided in each of the switch circuits, the corresponding analog switches of each switch circuit are simultaneously controlled by counting by a counter, and the analog switches of one switch circuit are controlled in multiple measurement ranges. Corresponding signal lines are connected individually, and the analog switch of the other switch circuit corresponding to the analog switch of the one switch circuit has a measurement range that is one step lower than the signal line of the one switch circuit. Connect the corresponding signal lines individually, connect the common output line of the other switch circuit above to one input terminal of the comparator, and connect the signal line corresponding to 100% of the multiple measurement ranges above to the other input terminal of the comparator. A reference voltage is connected to the counter, and when the one input terminal becomes lower than the reference voltage, a clock is inputted to the counter at the output of the comparator.

ここで、第３図を参照して本発明による測定レ
ンジ設定回路の実施例を説明する。第３図は本発
明の一実施例であり、説明の便宜上第２図と同一
素子には同一符号を付す。スイツチ回路は２個備
えられ、各々のスイツチ回路１および７には複数
個（図では４個）のアナログスイツチ１ａ〜１ｄ
および７ａ〜７ｄが配置されている。このアナロ
グスイツチ１ａ〜１ｄおよび７ａ〜７ｄの相対応
するもの、すなわちアナログスイツチ１ａと７
ａ，１ｂと７ｂ，１ｃと７ｃ、および１ｄと７ｄ
にはカウンタ５の４個の出力端子が個別に接続さ
れており、第１出力端子にはアナログスイツチ１
ａと７ａ、第２出力端子にはアナログスイツチ１
ｂと７ｂ、第３出力端子にはアナログスイツチ１
ｃと７ｃ、およびCLOCK ENABLEに接続され
た第４出力端子にはアナログスイツチ１ｄと７ｄ
が夫々接続されている。スイツチ回路１の各アナ
ログスイツチ１ａ〜１ｄには四つの測定レンジす
なわちアナログスイツチ１ａに第１測定レンジ、
アナログスイツチ１ｂに第２測定レンジ、アナロ
グスイツチ１ｃに第３測定レンジ、およびアナロ
グスイツチ１ｄに第４測定レンジが夫々対応して
おり、アナログスイツチ１ａ〜１ｄの各信号線８
ａ〜８ｄには導電率計の出力である基準化された
信号が乗せられる。また、他方のスイツチ回路７
のアナログスイツチ７ａ〜７ｄにはスイツチ回路
１のアナログスイツチ１ａ〜１ｄおよび信号線８
ａ〜８ｄに対し１ステツプ低い測定レンジに該当
する信号線９ａ〜９ｄが個別に接続されている。
すなわち、アナログスイツチ７ａにはアナログス
イツチ１ｂに当る第２測定レンジの信号線９ａ
が、アナログスイツチ７ｂにはアナログスイツチ
１ｃに当る第３測定レンジの信号線９ｂが、アナ
ログスイツチ７ｃおよび７ｄにはアナログスイツ
チ１ｄに当る第４測定レンジの共通接続された信
号線９ｃおよび９ｄが、それぞれ接続されてい
る。したがつて、カウンタ５による制御でたとえ
ばアナログスイツチ１ａおよび７ａがオンしてい
るときアナログスイツチ１ａには第１測定レンジ
に当る信号が至りアナログスイツチ７ａには第２
測定レンジに当る信号が至ることになる。 An embodiment of the measurement range setting circuit according to the present invention will now be described with reference to FIG. FIG. 3 shows one embodiment of the present invention, and for convenience of explanation, the same elements as in FIG. 2 are given the same reference numerals. Two switch circuits are provided, and each switch circuit 1 and 7 has a plurality of (four in the figure) analog switches 1a to 1d.
and 7a to 7d are arranged. Corresponding analog switches 1a to 1d and 7a to 7d, that is, analog switches 1a and 7
a, 1b and 7b, 1c and 7c, and 1d and 7d
The four output terminals of the counter 5 are individually connected to the first output terminal, and the analog switch 1 is connected to the first output terminal.
a and 7a, analog switch 1 is connected to the second output terminal.
b and 7b, analog switch 1 is connected to the third output terminal.
analog switches 1d and 7d are connected to the 4th output terminal connected to c and 7c and CLOCK ENABLE.
are connected to each other. Each of the analog switches 1a to 1d of the switch circuit 1 has four measurement ranges, that is, the analog switch 1a has a first measurement range,
A second measurement range corresponds to the analog switch 1b, a third measurement range corresponds to the analog switch 1c, and a fourth measurement range corresponds to the analog switch 1d.
A standardized signal which is the output of the conductivity meter is placed on a to 8d. Also, the other switch circuit 7
The analog switches 7a to 7d of the switch circuit 1 are connected to the analog switches 1a to 1d of the switch circuit 1 and the signal line 8.
Signal lines 9a to 9d corresponding to measurement ranges one step lower than a to 8d are individually connected.
That is, the analog switch 7a is connected to the signal line 9a of the second measurement range corresponding to the analog switch 1b.
However, the signal line 9b of the third measurement range corresponding to the analog switch 1c is connected to the analog switch 7b, and the commonly connected signal lines 9c and 9d of the fourth measurement range corresponding to the analog switch 1d are connected to the analog switches 7c and 7d. each connected. Therefore, when analog switches 1a and 7a are turned on under the control of counter 5, analog switch 1a receives a signal corresponding to the first measurement range, and analog switch 7a receives a signal corresponding to the second measurement range.
The signal that falls within the measurement range will reach this point.

スイツチ回路１のアナログスイツチ１ａ〜１ｄ
の共通出力端子はバツフアアンプ２の正相入力端
子に接続される。バツフアアンプ２の出力端子は
逆相入力端子に直接帰還されるとともに、逆相入
力端子が各測定レンジの100％に該当する基準電
圧E0に接続された比較器６の正相入力端子に接
続されている。比較器６の出力端子はカウンタ５
のリセツト端子に至つている。 Analog switches 1a to 1d of switch circuit 1
A common output terminal of the buffer amplifier 2 is connected to a positive phase input terminal of the buffer amplifier 2. The output terminal of the buffer amplifier 2 is directly fed back to the negative phase input terminal, and the negative phase input terminal is connected to the positive phase input terminal of the comparator 6, which is connected to the reference voltage E0 corresponding to 100% of each measurement range. ing. The output terminal of comparator 6 is counter 5
It is connected to the reset terminal.

スイツチ回路７のアナログスイツチ７ａ〜７ｄ
の共通出力端は正相入力端子に上記基準電圧E0
が接続された比較器３の逆相入力端子に接続さ
れ、比較器３の出力端子は一方の端子にクロツク
が接続されたANDゲート４の他方の入力端子に
接続されている。そして、ANDゲート４の出力
はカウンタ５の計数に寄与する。 Analog switches 7a to 7d of switch circuit 7
The common output terminal of the above reference voltage E 0 is connected to the positive phase input terminal.
The output terminal of the comparator 3 is connected to the other input terminal of an AND gate 4, which has one terminal connected to a clock. The output of the AND gate 4 contributes to the count of the counter 5.

今、比較器６よりリセツト出力が送出されると
カウンタ５の第１出力端子よりアナログスイツチ
１ａおよび７ａのオン指令が送出される。アナロ
グスイツチ１ａのオンにより第１測定レンジにて
重合の進行程度である導電率が計測されるととも
にアナログスイツチ７ａのオンにより第２測定レ
ンジでの導電率の基準化された信号が比較器３に
入力される。この信号は正常時には第１測定レン
ジの20％の付近まで基準電圧E0より大きな値を
採り、第２測定レンジによる導電率が100％以下
になると信号が基準電圧E0の値以下となるので、
その時点でANDゲート４が開きクロツクがカウ
ンタ５に送出される。カウンタ５の計数により第
２出力端子にhighレベルが生ずるとき、アナログ
スイツチ１ｂおよび７ｂが１ａ，７ａに代わりオ
ンとなる。この場合には第２測定レンジにて導電
率が計測されるとともに、第３測定レンジでの導
電率の基準化された信号が批較器３に入力され
る。同様にして第３測定レンジによる導電率の信
号が基準電圧E0に該当する100％以下になると、
再びカウンタ５が計数を開始する。ついで、カウ
ンタ５の第３出力端子に生ずるhighレベルでアナ
ログスイツチ１ｃおよび７ｃがオンし第３測定レ
ンジで導電率が計測され第４測定レンジでの導電
率の基準化された信号が比較器３に入力される。
第４測定レンジによる導電率の信号が基準電圧
E0に該当する100％以下になると、カウンタ５の
計数による第４出力端子のhighレベルにてアナロ
グスイツチ１ｄおよび７ｄがオンする。こうして
第４測定レンジで導電率が計測される。かかる計
測後、新たな測定物に対して重合程度を計測する
とき比較器６の正相出力端子に100％以上に該当
する電圧が加わりリセツト出力がカウンタ５に送
出される。このようにして計測は現実の測定レン
ジにて行ない測定レンジの切換えは一ステツプ低
い測定レンジにて測定レンジスケールの100％の
検出により行なうため、出力の振り切れの防止は
もちろん各測定レンジ共100％の範囲にて使用で
きることになる。また、第２図に示す従来の回路
と比べて第３図に示す本実施例の回路はスイツチ
回路７が更に必要であるが、基準電圧E0は１種
類で足りるため、回路の複雑さからみて同程度で
良いことになる。 Now, when a reset output is sent from the comparator 6, an ON command for analog switches 1a and 7a is sent from the first output terminal of the counter 5. When the analog switch 1a is turned on, the conductivity, which is the degree of progress of polymerization, is measured in the first measurement range, and when the analog switch 7a is turned on, a standardized signal of the conductivity in the second measurement range is sent to the comparator 3. is input. Under normal conditions, this signal takes a value larger than the reference voltage E0 up to around 20% of the first measurement range, and when the conductivity in the second measurement range becomes less than 100%, the signal becomes less than the value of the reference voltage E0 . ,
At that point, AND gate 4 opens and a clock is sent to counter 5. When a high level is generated at the second output terminal due to the count of the counter 5, analog switches 1b and 7b are turned on instead of 1a and 7a. In this case, the conductivity is measured in the second measurement range, and a standardized signal of the conductivity in the third measurement range is input to the comparator 3. Similarly, when the conductivity signal from the third measurement range falls below 100%, which corresponds to the reference voltage E 0 ,
The counter 5 starts counting again. Then, the analog switches 1c and 7c are turned on at the high level generated at the third output terminal of the counter 5, the conductivity is measured in the third measurement range, and the standardized signal of the conductivity in the fourth measurement range is sent to the comparator 3. is input.
The conductivity signal from the fourth measurement range is the reference voltage.
When the value falls below 100%, which corresponds to E 0 , the analog switches 1d and 7d are turned on at the high level of the fourth output terminal based on the count of the counter 5. In this way, conductivity is measured in the fourth measurement range. After such measurement, when measuring the degree of polymerization for a new object to be measured, a voltage corresponding to 100% or more is applied to the positive phase output terminal of the comparator 6, and a reset output is sent to the counter 5. In this way, measurements are performed in the actual measurement range, and measurement range switching is performed by detecting 100% of the measurement range scale in the measurement range one step lower, which not only prevents the output from swinging out, but also ensures that each measurement range is 100%. It can be used within the range. Furthermore, compared to the conventional circuit shown in FIG . 2, the circuit of this embodiment shown in FIG. If you look at it, it will be good if it is about the same level.

本実施例においては重合度計を前提として導電
率が低くなる場合につき説明した。本発明におい
ては広範囲の測定レンジを必要とする場合につい
て導電率に限らず順に低い測定レンジを切換える
場合について適用可能である。 In this example, the case where the conductivity becomes low has been explained based on the premise of a polymerization degree meter. The present invention is applicable not only to conductivity, but also to cases where a wide range of measurement ranges are required, and where measurement ranges are sequentially switched from lower to lower.

以上実施例にて説明したように本発明によれば
測定レンジを計測のための測定レンジとレンジ切
換えのための測定レンジとに分離し、切換えのた
めの測定レンジにおける測定レンジスケールの
100％以下を検出して測定レンジを切換えたこと
により、出力の振り切れ防止が可能となるばかり
でなく各測定レンジスケールを全部使用できて実
質的な計測精度を向上させることができた。 As explained above in the embodiments, according to the present invention, the measurement range is separated into a measurement range for measurement and a measurement range for range switching, and the measurement range scale in the measurement range for switching is
By detecting 100% or less and switching the measurement range, it is not only possible to prevent the output from swinging out, but it is also possible to use all the scales in each measurement range, thereby improving the actual measurement accuracy.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は４ステツプの測定レンジ相互の関係を
示す説明図、第２図は従来の測定レンジ設定回路
の一例を示す回路図、第３図は本発明による測定
レンジ設定回路の一実施例を示す回路図である。 図面中、１，７はスイツチ回路、１ａ，１ｂ，
１ｃ，１ｄ，７ａ，７ｂ，７ｃ，７ｄはアナログ
スイツチ、３，６は比較器５はカウンタ、８ａ，
８ｂ，８ｃ，８ｄ，９ａ，９ｂ，９ｃ，９ｄは信
号線である。 Fig. 1 is an explanatory diagram showing the relationship between the four-step measurement ranges, Fig. 2 is a circuit diagram showing an example of a conventional measurement range setting circuit, and Fig. 3 is an embodiment of the measurement range setting circuit according to the present invention. FIG. In the drawing, 1 and 7 are switch circuits, 1a, 1b,
1c, 1d, 7a, 7b, 7c, 7d are analog switches; 3, 6 are comparators; 5 is a counter; 8a,
8b, 8c, 8d, 9a, 9b, 9c, and 9d are signal lines.

Claims (1)

【特許請求の範囲】[Claims] １ ２個のスイツチ回路夫々に備えられた複数の
アナログスイツチのうち各スイツチ回路の相対応
する上記アナログスイツチをカウンタの計数にて
同時に制御し、一方のスイツチ回路の上記アナロ
グスイツチには複数の測定レンジに対応する信号
線を個別に接続し、上記一方のスイツチ回路のア
ナログスイツチに相対応する他方のスイツチ回路
の上記アナログスイツチには上記一方のスイツチ
回路に係る上記信号線に対し一ステツプ低い測定
レンジに該当する信号線を個別に接続し、上記他
方のスイツチ回路の共通出力線を比較器の一入力
端子に接続し、上記比較器の他の入力端子には上
記複数の測定レンジの100％に該当する基準電圧
を接続し、上記一入力端子が上記基準電圧以下に
なるとき上記比較器の出力にてクロツクを上記カ
ウンタに入力した測定レンジ設定回路。1. Out of the plurality of analog switches provided in each of the two switch circuits, the corresponding analog switches of each switch circuit are simultaneously controlled by counting by a counter, and the analog switches of one switch circuit are controlled at the same time. The signal lines corresponding to the ranges are connected individually, and the analog switch of the other switch circuit corresponding to the analog switch of the one switch circuit is connected to the analog switch of the one switch circuit, which is one step lower than the signal line of the one switch circuit. Connect the signal lines corresponding to the ranges individually, connect the common output line of the other switch circuit above to one input terminal of the comparator, and connect 100% of the multiple measurement ranges to the other input terminal of the comparator. A measurement range setting circuit that connects a reference voltage corresponding to the above, and inputs a clock to the counter at the output of the comparator when the one input terminal becomes lower than the reference voltage.
JP4514580A 1980-04-08 1980-04-08 Measuring range setting circuit Granted JPS56141564A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4514580A JPS56141564A (en) 1980-04-08 1980-04-08 Measuring range setting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4514580A JPS56141564A (en) 1980-04-08 1980-04-08 Measuring range setting circuit

Publications (2)

Publication Number Publication Date
JPS56141564A JPS56141564A (en) 1981-11-05
JPS648309B2 true JPS648309B2 (en) 1989-02-13

Family

ID=12711105

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4514580A Granted JPS56141564A (en) 1980-04-08 1980-04-08 Measuring range setting circuit

Country Status (1)

Country Link
JP (1) JPS56141564A (en)

Also Published As

Publication number Publication date
JPS56141564A (en) 1981-11-05

Similar Documents

Publication Publication Date Title
US4365302A (en) High accuracy AC electric energy metering system
US4141065A (en) Electric controller system with bumpless transfer
US4077035A (en) Two-stage weighted capacitor circuit for analog-to-digital and digital-to-analog converters
GB1570527A (en) Electrical circuit arrangements for monitoring the level of an analogue signal by comparing the levels of earlier and later digital samples thereof
JP2593106B2 (en) Maximum / minimum value detector for input signal
WO1982000390A1 (en) Use of single reference voltage for analog to digital or digital to analog conversion of bipolar signals
US3747089A (en) Analog to digital converter
KR19980065966A (en) Battery capacity indicator
EP0075441A2 (en) Voltage dividing circuit
JPH10508460A (en) Digital fine-tuning of on-chip analog components
US4739305A (en) Double integral type A/D converter
EP0117132B1 (en) Double integrating-type analog-to-digital converter
US5256979A (en) Method and apparatus for measuring an unknown voltage, and power meter employing the same
JPS5815982B2 (en) Analog ↓-digital conversion circuit
US5194868A (en) Dual slope integrating a/c converter
JP2007304006A (en) Secondary battery charge/discharge inspection device and method
CN100459434C (en) Digital-to-analog converter with integrated test circuit
JPS648309B2 (en)
EP0663597A2 (en) Dual comparator trigger circuit with independent voltage level adjustment
EP0247117A1 (en) Improvements in or relating to transducer interfaces
US3453615A (en) Analog-to-digital converters
US3725905A (en) Monolithic analog-to-digital converter
JPH0160966B2 (en)
SU1232962A1 (en) Digital thermometer
JPS61221539A (en) Apparatus and method for controlling battery charger